Loading...
1/* cpwd.c - driver implementation for hardware watchdog
2 * timers found on Sun Microsystems CP1400 and CP1500 boards.
3 *
4 * This device supports both the generic Linux watchdog
5 * interface and Solaris-compatible ioctls as best it is
6 * able.
7 *
8 * NOTE: CP1400 systems appear to have a defective intr_mask
9 * register on the PLD, preventing the disabling of
10 * timer interrupts. We use a timer to periodically
11 * reset 'stopped' watchdogs on affected platforms.
12 *
13 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
14 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
15 */
16
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/fs.h>
20#include <linux/errno.h>
21#include <linux/major.h>
22#include <linux/init.h>
23#include <linux/miscdevice.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/timer.h>
27#include <linux/slab.h>
28#include <linux/mutex.h>
29#include <linux/io.h>
30#include <linux/of.h>
31#include <linux/of_device.h>
32#include <linux/uaccess.h>
33
34#include <asm/irq.h>
35#include <asm/watchdog.h>
36
37#define DRIVER_NAME "cpwd"
38#define PFX DRIVER_NAME ": "
39
40#define WD_OBPNAME "watchdog"
41#define WD_BADMODEL "SUNW,501-5336"
42#define WD_BTIMEOUT (jiffies + (HZ * 1000))
43#define WD_BLIMIT 0xFFFF
44
45#define WD0_MINOR 212
46#define WD1_MINOR 213
47#define WD2_MINOR 214
48
49/* Internal driver definitions. */
50#define WD0_ID 0
51#define WD1_ID 1
52#define WD2_ID 2
53#define WD_NUMDEVS 3
54
55#define WD_INTR_OFF 0
56#define WD_INTR_ON 1
57
58#define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
59#define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
60#define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
61
62/* Register value definitions
63 */
64#define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
65#define WD1_INTR_MASK 0x02
66#define WD2_INTR_MASK 0x04
67
68#define WD_S_RUNNING 0x01 /* Watchdog device status running */
69#define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
70
71struct cpwd {
72 void __iomem *regs;
73 spinlock_t lock;
74
75 unsigned int irq;
76
77 unsigned long timeout;
78 bool enabled;
79 bool reboot;
80 bool broken;
81 bool initialized;
82
83 struct {
84 struct miscdevice misc;
85 void __iomem *regs;
86 u8 intr_mask;
87 u8 runstatus;
88 u16 timeout;
89 } devs[WD_NUMDEVS];
90};
91
92static DEFINE_MUTEX(cpwd_mutex);
93static struct cpwd *cpwd_device;
94
95/* Sun uses Altera PLD EPF8820ATC144-4
96 * providing three hardware watchdogs:
97 *
98 * 1) RIC - sends an interrupt when triggered
99 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
100 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
101 *
102 *** Timer register block definition (struct wd_timer_regblk)
103 *
104 * dcntr and limit registers (halfword access):
105 * -------------------
106 * | 15 | ...| 1 | 0 |
107 * -------------------
108 * |- counter val -|
109 * -------------------
110 * dcntr - Current 16-bit downcounter value.
111 * When downcounter reaches '0' watchdog expires.
112 * Reading this register resets downcounter with
113 * 'limit' value.
114 * limit - 16-bit countdown value in 1/10th second increments.
115 * Writing this register begins countdown with input value.
116 * Reading from this register does not affect counter.
117 * NOTES: After watchdog reset, dcntr and limit contain '1'
118 *
119 * status register (byte access):
120 * ---------------------------
121 * | 7 | ... | 2 | 1 | 0 |
122 * --------------+------------
123 * |- UNUSED -| EXP | RUN |
124 * ---------------------------
125 * status- Bit 0 - Watchdog is running
126 * Bit 1 - Watchdog has expired
127 *
128 *** PLD register block definition (struct wd_pld_regblk)
129 *
130 * intr_mask register (byte access):
131 * ---------------------------------
132 * | 7 | ... | 3 | 2 | 1 | 0 |
133 * +-------------+------------------
134 * |- UNUSED -| WD3 | WD2 | WD1 |
135 * ---------------------------------
136 * WD3 - 1 == Interrupt disabled for watchdog 3
137 * WD2 - 1 == Interrupt disabled for watchdog 2
138 * WD1 - 1 == Interrupt disabled for watchdog 1
139 *
140 * pld_status register (byte access):
141 * UNKNOWN, MAGICAL MYSTERY REGISTER
142 *
143 */
144#define WD_TIMER_REGSZ 16
145#define WD0_OFF 0
146#define WD1_OFF (WD_TIMER_REGSZ * 1)
147#define WD2_OFF (WD_TIMER_REGSZ * 2)
148#define PLD_OFF (WD_TIMER_REGSZ * 3)
149
150#define WD_DCNTR 0x00
151#define WD_LIMIT 0x04
152#define WD_STATUS 0x08
153
154#define PLD_IMASK (PLD_OFF + 0x00)
155#define PLD_STATUS (PLD_OFF + 0x04)
156
157static struct timer_list cpwd_timer;
158
159static int wd0_timeout;
160static int wd1_timeout;
161static int wd2_timeout;
162
163module_param(wd0_timeout, int, 0);
164MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
165module_param(wd1_timeout, int, 0);
166MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
167module_param(wd2_timeout, int, 0);
168MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
169
170MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
171MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
172MODULE_LICENSE("GPL");
173MODULE_SUPPORTED_DEVICE("watchdog");
174
175static void cpwd_writew(u16 val, void __iomem *addr)
176{
177 writew(cpu_to_le16(val), addr);
178}
179static u16 cpwd_readw(void __iomem *addr)
180{
181 u16 val = readw(addr);
182
183 return le16_to_cpu(val);
184}
185
186static void cpwd_writeb(u8 val, void __iomem *addr)
187{
188 writeb(val, addr);
189}
190
191static u8 cpwd_readb(void __iomem *addr)
192{
193 return readb(addr);
194}
195
196/* Enable or disable watchdog interrupts
197 * Because of the CP1400 defect this should only be
198 * called during initialzation or by wd_[start|stop]timer()
199 *
200 * index - sub-device index, or -1 for 'all'
201 * enable - non-zero to enable interrupts, zero to disable
202 */
203static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
204{
205 unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
206 unsigned char setregs =
207 (index == -1) ?
208 (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
209 (p->devs[index].intr_mask);
210
211 if (enable == WD_INTR_ON)
212 curregs &= ~setregs;
213 else
214 curregs |= setregs;
215
216 cpwd_writeb(curregs, p->regs + PLD_IMASK);
217}
218
219/* Restarts timer with maximum limit value and
220 * does not unset 'brokenstop' value.
221 */
222static void cpwd_resetbrokentimer(struct cpwd *p, int index)
223{
224 cpwd_toggleintr(p, index, WD_INTR_ON);
225 cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT);
226}
227
228/* Timer method called to reset stopped watchdogs--
229 * because of the PLD bug on CP1400, we cannot mask
230 * interrupts within the PLD so me must continually
231 * reset the timers ad infinitum.
232 */
233static void cpwd_brokentimer(unsigned long data)
234{
235 struct cpwd *p = (struct cpwd *) data;
236 int id, tripped = 0;
237
238 /* kill a running timer instance, in case we
239 * were called directly instead of by kernel timer
240 */
241 if (timer_pending(&cpwd_timer))
242 del_timer(&cpwd_timer);
243
244 for (id = 0; id < WD_NUMDEVS; id++) {
245 if (p->devs[id].runstatus & WD_STAT_BSTOP) {
246 ++tripped;
247 cpwd_resetbrokentimer(p, id);
248 }
249 }
250
251 if (tripped) {
252 /* there is at least one timer brokenstopped-- reschedule */
253 cpwd_timer.expires = WD_BTIMEOUT;
254 add_timer(&cpwd_timer);
255 }
256}
257
258/* Reset countdown timer with 'limit' value and continue countdown.
259 * This will not start a stopped timer.
260 */
261static void cpwd_pingtimer(struct cpwd *p, int index)
262{
263 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING)
264 cpwd_readw(p->devs[index].regs + WD_DCNTR);
265}
266
267/* Stop a running watchdog timer-- the timer actually keeps
268 * running, but the interrupt is masked so that no action is
269 * taken upon expiration.
270 */
271static void cpwd_stoptimer(struct cpwd *p, int index)
272{
273 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) {
274 cpwd_toggleintr(p, index, WD_INTR_OFF);
275
276 if (p->broken) {
277 p->devs[index].runstatus |= WD_STAT_BSTOP;
278 cpwd_brokentimer((unsigned long) p);
279 }
280 }
281}
282
283/* Start a watchdog timer with the specified limit value
284 * If the watchdog is running, it will be restarted with
285 * the provided limit value.
286 *
287 * This function will enable interrupts on the specified
288 * watchdog.
289 */
290static void cpwd_starttimer(struct cpwd *p, int index)
291{
292 if (p->broken)
293 p->devs[index].runstatus &= ~WD_STAT_BSTOP;
294
295 p->devs[index].runstatus &= ~WD_STAT_SVCD;
296
297 cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT);
298 cpwd_toggleintr(p, index, WD_INTR_ON);
299}
300
301static int cpwd_getstatus(struct cpwd *p, int index)
302{
303 unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS);
304 unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);
305 unsigned char ret = WD_STOPPED;
306
307 /* determine STOPPED */
308 if (!stat)
309 return ret;
310
311 /* determine EXPIRED vs FREERUN vs RUNNING */
312 else if (WD_S_EXPIRED & stat) {
313 ret = WD_EXPIRED;
314 } else if (WD_S_RUNNING & stat) {
315 if (intr & p->devs[index].intr_mask) {
316 ret = WD_FREERUN;
317 } else {
318 /* Fudge WD_EXPIRED status for defective CP1400--
319 * IF timer is running
320 * AND brokenstop is set
321 * AND an interrupt has been serviced
322 * we are WD_EXPIRED.
323 *
324 * IF timer is running
325 * AND brokenstop is set
326 * AND no interrupt has been serviced
327 * we are WD_FREERUN.
328 */
329 if (p->broken &&
330 (p->devs[index].runstatus & WD_STAT_BSTOP)) {
331 if (p->devs[index].runstatus & WD_STAT_SVCD) {
332 ret = WD_EXPIRED;
333 } else {
334 /* we could as well pretend
335 * we are expired */
336 ret = WD_FREERUN;
337 }
338 } else {
339 ret = WD_RUNNING;
340 }
341 }
342 }
343
344 /* determine SERVICED */
345 if (p->devs[index].runstatus & WD_STAT_SVCD)
346 ret |= WD_SERVICED;
347
348 return ret;
349}
350
351static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
352{
353 struct cpwd *p = dev_id;
354
355 /* Only WD0 will interrupt-- others are NMI and we won't
356 * see them here....
357 */
358 spin_lock_irq(&p->lock);
359
360 cpwd_stoptimer(p, WD0_ID);
361 p->devs[WD0_ID].runstatus |= WD_STAT_SVCD;
362
363 spin_unlock_irq(&p->lock);
364
365 return IRQ_HANDLED;
366}
367
368static int cpwd_open(struct inode *inode, struct file *f)
369{
370 struct cpwd *p = cpwd_device;
371
372 mutex_lock(&cpwd_mutex);
373 switch (iminor(inode)) {
374 case WD0_MINOR:
375 case WD1_MINOR:
376 case WD2_MINOR:
377 break;
378
379 default:
380 mutex_unlock(&cpwd_mutex);
381 return -ENODEV;
382 }
383
384 /* Register IRQ on first open of device */
385 if (!p->initialized) {
386 if (request_irq(p->irq, &cpwd_interrupt,
387 IRQF_SHARED, DRIVER_NAME, p)) {
388 printk(KERN_ERR PFX "Cannot register IRQ %d\n",
389 p->irq);
390 mutex_unlock(&cpwd_mutex);
391 return -EBUSY;
392 }
393 p->initialized = true;
394 }
395
396 mutex_unlock(&cpwd_mutex);
397
398 return nonseekable_open(inode, f);
399}
400
401static int cpwd_release(struct inode *inode, struct file *file)
402{
403 return 0;
404}
405
406static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
407{
408 static const struct watchdog_info info = {
409 .options = WDIOF_SETTIMEOUT,
410 .firmware_version = 1,
411 .identity = DRIVER_NAME,
412 };
413 void __user *argp = (void __user *)arg;
414 struct inode *inode = file->f_path.dentry->d_inode;
415 int index = iminor(inode) - WD0_MINOR;
416 struct cpwd *p = cpwd_device;
417 int setopt = 0;
418
419 switch (cmd) {
420 /* Generic Linux IOCTLs */
421 case WDIOC_GETSUPPORT:
422 if (copy_to_user(argp, &info, sizeof(struct watchdog_info)))
423 return -EFAULT;
424 break;
425
426 case WDIOC_GETSTATUS:
427 case WDIOC_GETBOOTSTATUS:
428 if (put_user(0, (int __user *)argp))
429 return -EFAULT;
430 break;
431
432 case WDIOC_KEEPALIVE:
433 cpwd_pingtimer(p, index);
434 break;
435
436 case WDIOC_SETOPTIONS:
437 if (copy_from_user(&setopt, argp, sizeof(unsigned int)))
438 return -EFAULT;
439
440 if (setopt & WDIOS_DISABLECARD) {
441 if (p->enabled)
442 return -EINVAL;
443 cpwd_stoptimer(p, index);
444 } else if (setopt & WDIOS_ENABLECARD) {
445 cpwd_starttimer(p, index);
446 } else {
447 return -EINVAL;
448 }
449 break;
450
451 /* Solaris-compatible IOCTLs */
452 case WIOCGSTAT:
453 setopt = cpwd_getstatus(p, index);
454 if (copy_to_user(argp, &setopt, sizeof(unsigned int)))
455 return -EFAULT;
456 break;
457
458 case WIOCSTART:
459 cpwd_starttimer(p, index);
460 break;
461
462 case WIOCSTOP:
463 if (p->enabled)
464 return -EINVAL;
465
466 cpwd_stoptimer(p, index);
467 break;
468
469 default:
470 return -EINVAL;
471 }
472
473 return 0;
474}
475
476static long cpwd_compat_ioctl(struct file *file, unsigned int cmd,
477 unsigned long arg)
478{
479 int rval = -ENOIOCTLCMD;
480
481 switch (cmd) {
482 /* solaris ioctls are specific to this driver */
483 case WIOCSTART:
484 case WIOCSTOP:
485 case WIOCGSTAT:
486 mutex_lock(&cpwd_mutex);
487 rval = cpwd_ioctl(file, cmd, arg);
488 mutex_unlock(&cpwd_mutex);
489 break;
490
491 /* everything else is handled by the generic compat layer */
492 default:
493 break;
494 }
495
496 return rval;
497}
498
499static ssize_t cpwd_write(struct file *file, const char __user *buf,
500 size_t count, loff_t *ppos)
501{
502 struct inode *inode = file->f_path.dentry->d_inode;
503 struct cpwd *p = cpwd_device;
504 int index = iminor(inode);
505
506 if (count) {
507 cpwd_pingtimer(p, index);
508 return 1;
509 }
510
511 return 0;
512}
513
514static ssize_t cpwd_read(struct file *file, char __user *buffer,
515 size_t count, loff_t *ppos)
516{
517 return -EINVAL;
518}
519
520static const struct file_operations cpwd_fops = {
521 .owner = THIS_MODULE,
522 .unlocked_ioctl = cpwd_ioctl,
523 .compat_ioctl = cpwd_compat_ioctl,
524 .open = cpwd_open,
525 .write = cpwd_write,
526 .read = cpwd_read,
527 .release = cpwd_release,
528 .llseek = no_llseek,
529};
530
531static int __devinit cpwd_probe(struct platform_device *op)
532{
533 struct device_node *options;
534 const char *str_prop;
535 const void *prop_val;
536 int i, err = -EINVAL;
537 struct cpwd *p;
538
539 if (cpwd_device)
540 return -EINVAL;
541
542 p = kzalloc(sizeof(*p), GFP_KERNEL);
543 err = -ENOMEM;
544 if (!p) {
545 printk(KERN_ERR PFX "Unable to allocate struct cpwd.\n");
546 goto out;
547 }
548
549 p->irq = op->archdata.irqs[0];
550
551 spin_lock_init(&p->lock);
552
553 p->regs = of_ioremap(&op->resource[0], 0,
554 4 * WD_TIMER_REGSZ, DRIVER_NAME);
555 if (!p->regs) {
556 printk(KERN_ERR PFX "Unable to map registers.\n");
557 goto out_free;
558 }
559
560 options = of_find_node_by_path("/options");
561 err = -ENODEV;
562 if (!options) {
563 printk(KERN_ERR PFX "Unable to find /options node.\n");
564 goto out_iounmap;
565 }
566
567 prop_val = of_get_property(options, "watchdog-enable?", NULL);
568 p->enabled = (prop_val ? true : false);
569
570 prop_val = of_get_property(options, "watchdog-reboot?", NULL);
571 p->reboot = (prop_val ? true : false);
572
573 str_prop = of_get_property(options, "watchdog-timeout", NULL);
574 if (str_prop)
575 p->timeout = simple_strtoul(str_prop, NULL, 10);
576
577 /* CP1400s seem to have broken PLD implementations-- the
578 * interrupt_mask register cannot be written, so no timer
579 * interrupts can be masked within the PLD.
580 */
581 str_prop = of_get_property(op->dev.of_node, "model", NULL);
582 p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL));
583
584 if (!p->enabled)
585 cpwd_toggleintr(p, -1, WD_INTR_OFF);
586
587 for (i = 0; i < WD_NUMDEVS; i++) {
588 static const char *cpwd_names[] = { "RIC", "XIR", "POR" };
589 static int *parms[] = { &wd0_timeout,
590 &wd1_timeout,
591 &wd2_timeout };
592 struct miscdevice *mp = &p->devs[i].misc;
593
594 mp->minor = WD0_MINOR + i;
595 mp->name = cpwd_names[i];
596 mp->fops = &cpwd_fops;
597
598 p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ);
599 p->devs[i].intr_mask = (WD0_INTR_MASK << i);
600 p->devs[i].runstatus &= ~WD_STAT_BSTOP;
601 p->devs[i].runstatus |= WD_STAT_INIT;
602 p->devs[i].timeout = p->timeout;
603 if (*parms[i])
604 p->devs[i].timeout = *parms[i];
605
606 err = misc_register(&p->devs[i].misc);
607 if (err) {
608 printk(KERN_ERR "Could not register misc device for "
609 "dev %d\n", i);
610 goto out_unregister;
611 }
612 }
613
614 if (p->broken) {
615 init_timer(&cpwd_timer);
616 cpwd_timer.function = cpwd_brokentimer;
617 cpwd_timer.data = (unsigned long) p;
618 cpwd_timer.expires = WD_BTIMEOUT;
619
620 printk(KERN_INFO PFX "PLD defect workaround enabled for "
621 "model " WD_BADMODEL ".\n");
622 }
623
624 dev_set_drvdata(&op->dev, p);
625 cpwd_device = p;
626 err = 0;
627
628out:
629 return err;
630
631out_unregister:
632 for (i--; i >= 0; i--)
633 misc_deregister(&p->devs[i].misc);
634
635out_iounmap:
636 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
637
638out_free:
639 kfree(p);
640 goto out;
641}
642
643static int __devexit cpwd_remove(struct platform_device *op)
644{
645 struct cpwd *p = dev_get_drvdata(&op->dev);
646 int i;
647
648 for (i = 0; i < WD_NUMDEVS; i++) {
649 misc_deregister(&p->devs[i].misc);
650
651 if (!p->enabled) {
652 cpwd_stoptimer(p, i);
653 if (p->devs[i].runstatus & WD_STAT_BSTOP)
654 cpwd_resetbrokentimer(p, i);
655 }
656 }
657
658 if (p->broken)
659 del_timer_sync(&cpwd_timer);
660
661 if (p->initialized)
662 free_irq(p->irq, p);
663
664 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
665 kfree(p);
666
667 cpwd_device = NULL;
668
669 return 0;
670}
671
672static const struct of_device_id cpwd_match[] = {
673 {
674 .name = "watchdog",
675 },
676 {},
677};
678MODULE_DEVICE_TABLE(of, cpwd_match);
679
680static struct platform_driver cpwd_driver = {
681 .driver = {
682 .name = DRIVER_NAME,
683 .owner = THIS_MODULE,
684 .of_match_table = cpwd_match,
685 },
686 .probe = cpwd_probe,
687 .remove = __devexit_p(cpwd_remove),
688};
689
690static int __init cpwd_init(void)
691{
692 return platform_driver_register(&cpwd_driver);
693}
694
695static void __exit cpwd_exit(void)
696{
697 platform_driver_unregister(&cpwd_driver);
698}
699
700module_init(cpwd_init);
701module_exit(cpwd_exit);
1// SPDX-License-Identifier: GPL-2.0-only
2/* cpwd.c - driver implementation for hardware watchdog
3 * timers found on Sun Microsystems CP1400 and CP1500 boards.
4 *
5 * This device supports both the generic Linux watchdog
6 * interface and Solaris-compatible ioctls as best it is
7 * able.
8 *
9 * NOTE: CP1400 systems appear to have a defective intr_mask
10 * register on the PLD, preventing the disabling of
11 * timer interrupts. We use a timer to periodically
12 * reset 'stopped' watchdogs on affected platforms.
13 *
14 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
15 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
16 */
17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/fs.h>
23#include <linux/errno.h>
24#include <linux/major.h>
25#include <linux/miscdevice.h>
26#include <linux/interrupt.h>
27#include <linux/ioport.h>
28#include <linux/timer.h>
29#include <linux/compat.h>
30#include <linux/slab.h>
31#include <linux/mutex.h>
32#include <linux/io.h>
33#include <linux/of.h>
34#include <linux/of_device.h>
35#include <linux/uaccess.h>
36
37#include <asm/irq.h>
38#include <asm/watchdog.h>
39
40#define DRIVER_NAME "cpwd"
41
42#define WD_OBPNAME "watchdog"
43#define WD_BADMODEL "SUNW,501-5336"
44#define WD_BTIMEOUT (jiffies + (HZ * 1000))
45#define WD_BLIMIT 0xFFFF
46
47#define WD0_MINOR 212
48#define WD1_MINOR 213
49#define WD2_MINOR 214
50
51/* Internal driver definitions. */
52#define WD0_ID 0
53#define WD1_ID 1
54#define WD2_ID 2
55#define WD_NUMDEVS 3
56
57#define WD_INTR_OFF 0
58#define WD_INTR_ON 1
59
60#define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
61#define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
62#define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
63
64/* Register value definitions
65 */
66#define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
67#define WD1_INTR_MASK 0x02
68#define WD2_INTR_MASK 0x04
69
70#define WD_S_RUNNING 0x01 /* Watchdog device status running */
71#define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
72
73struct cpwd {
74 void __iomem *regs;
75 spinlock_t lock;
76
77 unsigned int irq;
78
79 unsigned long timeout;
80 bool enabled;
81 bool reboot;
82 bool broken;
83 bool initialized;
84
85 struct {
86 struct miscdevice misc;
87 void __iomem *regs;
88 u8 intr_mask;
89 u8 runstatus;
90 u16 timeout;
91 } devs[WD_NUMDEVS];
92};
93
94static DEFINE_MUTEX(cpwd_mutex);
95static struct cpwd *cpwd_device;
96
97/* Sun uses Altera PLD EPF8820ATC144-4
98 * providing three hardware watchdogs:
99 *
100 * 1) RIC - sends an interrupt when triggered
101 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
102 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
103 *
104 *** Timer register block definition (struct wd_timer_regblk)
105 *
106 * dcntr and limit registers (halfword access):
107 * -------------------
108 * | 15 | ...| 1 | 0 |
109 * -------------------
110 * |- counter val -|
111 * -------------------
112 * dcntr - Current 16-bit downcounter value.
113 * When downcounter reaches '0' watchdog expires.
114 * Reading this register resets downcounter with
115 * 'limit' value.
116 * limit - 16-bit countdown value in 1/10th second increments.
117 * Writing this register begins countdown with input value.
118 * Reading from this register does not affect counter.
119 * NOTES: After watchdog reset, dcntr and limit contain '1'
120 *
121 * status register (byte access):
122 * ---------------------------
123 * | 7 | ... | 2 | 1 | 0 |
124 * --------------+------------
125 * |- UNUSED -| EXP | RUN |
126 * ---------------------------
127 * status- Bit 0 - Watchdog is running
128 * Bit 1 - Watchdog has expired
129 *
130 *** PLD register block definition (struct wd_pld_regblk)
131 *
132 * intr_mask register (byte access):
133 * ---------------------------------
134 * | 7 | ... | 3 | 2 | 1 | 0 |
135 * +-------------+------------------
136 * |- UNUSED -| WD3 | WD2 | WD1 |
137 * ---------------------------------
138 * WD3 - 1 == Interrupt disabled for watchdog 3
139 * WD2 - 1 == Interrupt disabled for watchdog 2
140 * WD1 - 1 == Interrupt disabled for watchdog 1
141 *
142 * pld_status register (byte access):
143 * UNKNOWN, MAGICAL MYSTERY REGISTER
144 *
145 */
146#define WD_TIMER_REGSZ 16
147#define WD0_OFF 0
148#define WD1_OFF (WD_TIMER_REGSZ * 1)
149#define WD2_OFF (WD_TIMER_REGSZ * 2)
150#define PLD_OFF (WD_TIMER_REGSZ * 3)
151
152#define WD_DCNTR 0x00
153#define WD_LIMIT 0x04
154#define WD_STATUS 0x08
155
156#define PLD_IMASK (PLD_OFF + 0x00)
157#define PLD_STATUS (PLD_OFF + 0x04)
158
159static struct timer_list cpwd_timer;
160
161static int wd0_timeout;
162static int wd1_timeout;
163static int wd2_timeout;
164
165module_param(wd0_timeout, int, 0);
166MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
167module_param(wd1_timeout, int, 0);
168MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
169module_param(wd2_timeout, int, 0);
170MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
171
172MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
173MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
174MODULE_LICENSE("GPL");
175MODULE_SUPPORTED_DEVICE("watchdog");
176
177static void cpwd_writew(u16 val, void __iomem *addr)
178{
179 writew(cpu_to_le16(val), addr);
180}
181static u16 cpwd_readw(void __iomem *addr)
182{
183 u16 val = readw(addr);
184
185 return le16_to_cpu(val);
186}
187
188static void cpwd_writeb(u8 val, void __iomem *addr)
189{
190 writeb(val, addr);
191}
192
193static u8 cpwd_readb(void __iomem *addr)
194{
195 return readb(addr);
196}
197
198/* Enable or disable watchdog interrupts
199 * Because of the CP1400 defect this should only be
200 * called during initialzation or by wd_[start|stop]timer()
201 *
202 * index - sub-device index, or -1 for 'all'
203 * enable - non-zero to enable interrupts, zero to disable
204 */
205static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
206{
207 unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
208 unsigned char setregs =
209 (index == -1) ?
210 (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
211 (p->devs[index].intr_mask);
212
213 if (enable == WD_INTR_ON)
214 curregs &= ~setregs;
215 else
216 curregs |= setregs;
217
218 cpwd_writeb(curregs, p->regs + PLD_IMASK);
219}
220
221/* Restarts timer with maximum limit value and
222 * does not unset 'brokenstop' value.
223 */
224static void cpwd_resetbrokentimer(struct cpwd *p, int index)
225{
226 cpwd_toggleintr(p, index, WD_INTR_ON);
227 cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT);
228}
229
230/* Timer method called to reset stopped watchdogs--
231 * because of the PLD bug on CP1400, we cannot mask
232 * interrupts within the PLD so me must continually
233 * reset the timers ad infinitum.
234 */
235static void cpwd_brokentimer(struct timer_list *unused)
236{
237 struct cpwd *p = cpwd_device;
238 int id, tripped = 0;
239
240 /* kill a running timer instance, in case we
241 * were called directly instead of by kernel timer
242 */
243 if (timer_pending(&cpwd_timer))
244 del_timer(&cpwd_timer);
245
246 for (id = 0; id < WD_NUMDEVS; id++) {
247 if (p->devs[id].runstatus & WD_STAT_BSTOP) {
248 ++tripped;
249 cpwd_resetbrokentimer(p, id);
250 }
251 }
252
253 if (tripped) {
254 /* there is at least one timer brokenstopped-- reschedule */
255 cpwd_timer.expires = WD_BTIMEOUT;
256 add_timer(&cpwd_timer);
257 }
258}
259
260/* Reset countdown timer with 'limit' value and continue countdown.
261 * This will not start a stopped timer.
262 */
263static void cpwd_pingtimer(struct cpwd *p, int index)
264{
265 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING)
266 cpwd_readw(p->devs[index].regs + WD_DCNTR);
267}
268
269/* Stop a running watchdog timer-- the timer actually keeps
270 * running, but the interrupt is masked so that no action is
271 * taken upon expiration.
272 */
273static void cpwd_stoptimer(struct cpwd *p, int index)
274{
275 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) {
276 cpwd_toggleintr(p, index, WD_INTR_OFF);
277
278 if (p->broken) {
279 p->devs[index].runstatus |= WD_STAT_BSTOP;
280 cpwd_brokentimer(NULL);
281 }
282 }
283}
284
285/* Start a watchdog timer with the specified limit value
286 * If the watchdog is running, it will be restarted with
287 * the provided limit value.
288 *
289 * This function will enable interrupts on the specified
290 * watchdog.
291 */
292static void cpwd_starttimer(struct cpwd *p, int index)
293{
294 if (p->broken)
295 p->devs[index].runstatus &= ~WD_STAT_BSTOP;
296
297 p->devs[index].runstatus &= ~WD_STAT_SVCD;
298
299 cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT);
300 cpwd_toggleintr(p, index, WD_INTR_ON);
301}
302
303static int cpwd_getstatus(struct cpwd *p, int index)
304{
305 unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS);
306 unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);
307 unsigned char ret = WD_STOPPED;
308
309 /* determine STOPPED */
310 if (!stat)
311 return ret;
312
313 /* determine EXPIRED vs FREERUN vs RUNNING */
314 else if (WD_S_EXPIRED & stat) {
315 ret = WD_EXPIRED;
316 } else if (WD_S_RUNNING & stat) {
317 if (intr & p->devs[index].intr_mask) {
318 ret = WD_FREERUN;
319 } else {
320 /* Fudge WD_EXPIRED status for defective CP1400--
321 * IF timer is running
322 * AND brokenstop is set
323 * AND an interrupt has been serviced
324 * we are WD_EXPIRED.
325 *
326 * IF timer is running
327 * AND brokenstop is set
328 * AND no interrupt has been serviced
329 * we are WD_FREERUN.
330 */
331 if (p->broken &&
332 (p->devs[index].runstatus & WD_STAT_BSTOP)) {
333 if (p->devs[index].runstatus & WD_STAT_SVCD) {
334 ret = WD_EXPIRED;
335 } else {
336 /* we could as well pretend
337 * we are expired */
338 ret = WD_FREERUN;
339 }
340 } else {
341 ret = WD_RUNNING;
342 }
343 }
344 }
345
346 /* determine SERVICED */
347 if (p->devs[index].runstatus & WD_STAT_SVCD)
348 ret |= WD_SERVICED;
349
350 return ret;
351}
352
353static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
354{
355 struct cpwd *p = dev_id;
356
357 /* Only WD0 will interrupt-- others are NMI and we won't
358 * see them here....
359 */
360 spin_lock_irq(&p->lock);
361
362 cpwd_stoptimer(p, WD0_ID);
363 p->devs[WD0_ID].runstatus |= WD_STAT_SVCD;
364
365 spin_unlock_irq(&p->lock);
366
367 return IRQ_HANDLED;
368}
369
370static int cpwd_open(struct inode *inode, struct file *f)
371{
372 struct cpwd *p = cpwd_device;
373
374 mutex_lock(&cpwd_mutex);
375 switch (iminor(inode)) {
376 case WD0_MINOR:
377 case WD1_MINOR:
378 case WD2_MINOR:
379 break;
380
381 default:
382 mutex_unlock(&cpwd_mutex);
383 return -ENODEV;
384 }
385
386 /* Register IRQ on first open of device */
387 if (!p->initialized) {
388 if (request_irq(p->irq, &cpwd_interrupt,
389 IRQF_SHARED, DRIVER_NAME, p)) {
390 pr_err("Cannot register IRQ %d\n", p->irq);
391 mutex_unlock(&cpwd_mutex);
392 return -EBUSY;
393 }
394 p->initialized = true;
395 }
396
397 mutex_unlock(&cpwd_mutex);
398
399 return stream_open(inode, f);
400}
401
402static int cpwd_release(struct inode *inode, struct file *file)
403{
404 return 0;
405}
406
407static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
408{
409 static const struct watchdog_info info = {
410 .options = WDIOF_SETTIMEOUT,
411 .firmware_version = 1,
412 .identity = DRIVER_NAME,
413 };
414 void __user *argp = (void __user *)arg;
415 struct inode *inode = file_inode(file);
416 int index = iminor(inode) - WD0_MINOR;
417 struct cpwd *p = cpwd_device;
418 int setopt = 0;
419
420 switch (cmd) {
421 /* Generic Linux IOCTLs */
422 case WDIOC_GETSUPPORT:
423 if (copy_to_user(argp, &info, sizeof(struct watchdog_info)))
424 return -EFAULT;
425 break;
426
427 case WDIOC_GETSTATUS:
428 case WDIOC_GETBOOTSTATUS:
429 if (put_user(0, (int __user *)argp))
430 return -EFAULT;
431 break;
432
433 case WDIOC_KEEPALIVE:
434 cpwd_pingtimer(p, index);
435 break;
436
437 case WDIOC_SETOPTIONS:
438 if (copy_from_user(&setopt, argp, sizeof(unsigned int)))
439 return -EFAULT;
440
441 if (setopt & WDIOS_DISABLECARD) {
442 if (p->enabled)
443 return -EINVAL;
444 cpwd_stoptimer(p, index);
445 } else if (setopt & WDIOS_ENABLECARD) {
446 cpwd_starttimer(p, index);
447 } else {
448 return -EINVAL;
449 }
450 break;
451
452 /* Solaris-compatible IOCTLs */
453 case WIOCGSTAT:
454 setopt = cpwd_getstatus(p, index);
455 if (copy_to_user(argp, &setopt, sizeof(unsigned int)))
456 return -EFAULT;
457 break;
458
459 case WIOCSTART:
460 cpwd_starttimer(p, index);
461 break;
462
463 case WIOCSTOP:
464 if (p->enabled)
465 return -EINVAL;
466
467 cpwd_stoptimer(p, index);
468 break;
469
470 default:
471 return -EINVAL;
472 }
473
474 return 0;
475}
476
477static long cpwd_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
478{
479 return cpwd_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
480}
481
482static ssize_t cpwd_write(struct file *file, const char __user *buf,
483 size_t count, loff_t *ppos)
484{
485 struct inode *inode = file_inode(file);
486 struct cpwd *p = cpwd_device;
487 int index = iminor(inode);
488
489 if (count) {
490 cpwd_pingtimer(p, index);
491 return 1;
492 }
493
494 return 0;
495}
496
497static ssize_t cpwd_read(struct file *file, char __user *buffer,
498 size_t count, loff_t *ppos)
499{
500 return -EINVAL;
501}
502
503static const struct file_operations cpwd_fops = {
504 .owner = THIS_MODULE,
505 .unlocked_ioctl = cpwd_ioctl,
506 .compat_ioctl = cpwd_compat_ioctl,
507 .open = cpwd_open,
508 .write = cpwd_write,
509 .read = cpwd_read,
510 .release = cpwd_release,
511 .llseek = no_llseek,
512};
513
514static int cpwd_probe(struct platform_device *op)
515{
516 struct device_node *options;
517 const char *str_prop;
518 const void *prop_val;
519 int i, err = -EINVAL;
520 struct cpwd *p;
521
522 if (cpwd_device)
523 return -EINVAL;
524
525 p = devm_kzalloc(&op->dev, sizeof(*p), GFP_KERNEL);
526 if (!p)
527 return -ENOMEM;
528
529 p->irq = op->archdata.irqs[0];
530
531 spin_lock_init(&p->lock);
532
533 p->regs = of_ioremap(&op->resource[0], 0,
534 4 * WD_TIMER_REGSZ, DRIVER_NAME);
535 if (!p->regs) {
536 pr_err("Unable to map registers\n");
537 return -ENOMEM;
538 }
539
540 options = of_find_node_by_path("/options");
541 if (!options) {
542 err = -ENODEV;
543 pr_err("Unable to find /options node\n");
544 goto out_iounmap;
545 }
546
547 prop_val = of_get_property(options, "watchdog-enable?", NULL);
548 p->enabled = (prop_val ? true : false);
549
550 prop_val = of_get_property(options, "watchdog-reboot?", NULL);
551 p->reboot = (prop_val ? true : false);
552
553 str_prop = of_get_property(options, "watchdog-timeout", NULL);
554 if (str_prop)
555 p->timeout = simple_strtoul(str_prop, NULL, 10);
556
557 of_node_put(options);
558
559 /* CP1400s seem to have broken PLD implementations-- the
560 * interrupt_mask register cannot be written, so no timer
561 * interrupts can be masked within the PLD.
562 */
563 str_prop = of_get_property(op->dev.of_node, "model", NULL);
564 p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL));
565
566 if (!p->enabled)
567 cpwd_toggleintr(p, -1, WD_INTR_OFF);
568
569 for (i = 0; i < WD_NUMDEVS; i++) {
570 static const char *cpwd_names[] = { "RIC", "XIR", "POR" };
571 static int *parms[] = { &wd0_timeout,
572 &wd1_timeout,
573 &wd2_timeout };
574 struct miscdevice *mp = &p->devs[i].misc;
575
576 mp->minor = WD0_MINOR + i;
577 mp->name = cpwd_names[i];
578 mp->fops = &cpwd_fops;
579
580 p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ);
581 p->devs[i].intr_mask = (WD0_INTR_MASK << i);
582 p->devs[i].runstatus &= ~WD_STAT_BSTOP;
583 p->devs[i].runstatus |= WD_STAT_INIT;
584 p->devs[i].timeout = p->timeout;
585 if (*parms[i])
586 p->devs[i].timeout = *parms[i];
587
588 err = misc_register(&p->devs[i].misc);
589 if (err) {
590 pr_err("Could not register misc device for dev %d\n",
591 i);
592 goto out_unregister;
593 }
594 }
595
596 if (p->broken) {
597 timer_setup(&cpwd_timer, cpwd_brokentimer, 0);
598 cpwd_timer.expires = WD_BTIMEOUT;
599
600 pr_info("PLD defect workaround enabled for model %s\n",
601 WD_BADMODEL);
602 }
603
604 platform_set_drvdata(op, p);
605 cpwd_device = p;
606 return 0;
607
608out_unregister:
609 for (i--; i >= 0; i--)
610 misc_deregister(&p->devs[i].misc);
611
612out_iounmap:
613 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
614
615 return err;
616}
617
618static int cpwd_remove(struct platform_device *op)
619{
620 struct cpwd *p = platform_get_drvdata(op);
621 int i;
622
623 for (i = 0; i < WD_NUMDEVS; i++) {
624 misc_deregister(&p->devs[i].misc);
625
626 if (!p->enabled) {
627 cpwd_stoptimer(p, i);
628 if (p->devs[i].runstatus & WD_STAT_BSTOP)
629 cpwd_resetbrokentimer(p, i);
630 }
631 }
632
633 if (p->broken)
634 del_timer_sync(&cpwd_timer);
635
636 if (p->initialized)
637 free_irq(p->irq, p);
638
639 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
640
641 cpwd_device = NULL;
642
643 return 0;
644}
645
646static const struct of_device_id cpwd_match[] = {
647 {
648 .name = "watchdog",
649 },
650 {},
651};
652MODULE_DEVICE_TABLE(of, cpwd_match);
653
654static struct platform_driver cpwd_driver = {
655 .driver = {
656 .name = DRIVER_NAME,
657 .of_match_table = cpwd_match,
658 },
659 .probe = cpwd_probe,
660 .remove = cpwd_remove,
661};
662
663module_platform_driver(cpwd_driver);