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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 */
11
12#ifndef _UFSHCD_H
13#define _UFSHCD_H
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/delay.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23#include <linux/rwsem.h>
24#include <linux/workqueue.h>
25#include <linux/errno.h>
26#include <linux/types.h>
27#include <linux/wait.h>
28#include <linux/bitops.h>
29#include <linux/pm_runtime.h>
30#include <linux/clk.h>
31#include <linux/completion.h>
32#include <linux/regulator/consumer.h>
33#include <linux/bitfield.h>
34#include <linux/devfreq.h>
35#include <linux/keyslot-manager.h>
36#include "unipro.h"
37
38#include <asm/irq.h>
39#include <asm/byteorder.h>
40#include <scsi/scsi.h>
41#include <scsi/scsi_cmnd.h>
42#include <scsi/scsi_host.h>
43#include <scsi/scsi_tcq.h>
44#include <scsi/scsi_dbg.h>
45#include <scsi/scsi_eh.h>
46
47#include "ufs.h"
48#include "ufs_quirks.h"
49#include "ufshci.h"
50
51#define UFSHCD "ufshcd"
52#define UFSHCD_DRIVER_VERSION "0.2"
53
54struct ufs_hba;
55
56enum dev_cmd_type {
57 DEV_CMD_TYPE_NOP = 0x0,
58 DEV_CMD_TYPE_QUERY = 0x1,
59};
60
61/**
62 * struct uic_command - UIC command structure
63 * @command: UIC command
64 * @argument1: UIC command argument 1
65 * @argument2: UIC command argument 2
66 * @argument3: UIC command argument 3
67 * @done: UIC command completion
68 */
69struct uic_command {
70 u32 command;
71 u32 argument1;
72 u32 argument2;
73 u32 argument3;
74 struct completion done;
75};
76
77/* Used to differentiate the power management options */
78enum ufs_pm_op {
79 UFS_RUNTIME_PM,
80 UFS_SYSTEM_PM,
81 UFS_SHUTDOWN_PM,
82};
83
84#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
85#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
86#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
87
88/* Host <-> Device UniPro Link state */
89enum uic_link_state {
90 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
91 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
92 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
93};
94
95#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
96#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
97 UIC_LINK_ACTIVE_STATE)
98#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
99 UIC_LINK_HIBERN8_STATE)
100#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
101#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
102 UIC_LINK_ACTIVE_STATE)
103#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
104 UIC_LINK_HIBERN8_STATE)
105
106#define ufshcd_set_ufs_dev_active(h) \
107 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
108#define ufshcd_set_ufs_dev_sleep(h) \
109 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
110#define ufshcd_set_ufs_dev_poweroff(h) \
111 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
112#define ufshcd_is_ufs_dev_active(h) \
113 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
114#define ufshcd_is_ufs_dev_sleep(h) \
115 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
116#define ufshcd_is_ufs_dev_poweroff(h) \
117 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
118
119/*
120 * UFS Power management levels.
121 * Each level is in increasing order of power savings.
122 */
123enum ufs_pm_level {
124 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
125 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
126 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
127 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
128 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
129 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
130 UFS_PM_LVL_MAX
131};
132
133struct ufs_pm_lvl_states {
134 enum ufs_dev_pwr_mode dev_state;
135 enum uic_link_state link_state;
136};
137
138/**
139 * struct ufshcd_lrb - local reference block
140 * @utr_descriptor_ptr: UTRD address of the command
141 * @ucd_req_ptr: UCD address of the command
142 * @ucd_rsp_ptr: Response UPIU address for this command
143 * @ucd_prdt_ptr: PRDT address of the command
144 * @utrd_dma_addr: UTRD dma address for debug
145 * @ucd_prdt_dma_addr: PRDT dma address for debug
146 * @ucd_rsp_dma_addr: UPIU response dma address for debug
147 * @ucd_req_dma_addr: UPIU request dma address for debug
148 * @cmd: pointer to SCSI command
149 * @sense_buffer: pointer to sense buffer address of the SCSI command
150 * @sense_bufflen: Length of the sense buffer
151 * @scsi_status: SCSI status of the command
152 * @command_type: SCSI, UFS, Query.
153 * @task_tag: Task tag of the command
154 * @lun: LUN of the command
155 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
156 * @issue_time_stamp: time stamp for debug purposes
157 * @compl_time_stamp: time stamp for statistics
158 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
159 * @data_unit_num: the data unit number for the first block for inline crypto
160 * @req_abort_skip: skip request abort task flag
161 */
162struct ufshcd_lrb {
163 struct utp_transfer_req_desc *utr_descriptor_ptr;
164 struct utp_upiu_req *ucd_req_ptr;
165 struct utp_upiu_rsp *ucd_rsp_ptr;
166 struct ufshcd_sg_entry *ucd_prdt_ptr;
167
168 dma_addr_t utrd_dma_addr;
169 dma_addr_t ucd_req_dma_addr;
170 dma_addr_t ucd_rsp_dma_addr;
171 dma_addr_t ucd_prdt_dma_addr;
172
173 struct scsi_cmnd *cmd;
174 u8 *sense_buffer;
175 unsigned int sense_bufflen;
176 int scsi_status;
177
178 int command_type;
179 int task_tag;
180 u8 lun; /* UPIU LUN id field is only 8-bit wide */
181 bool intr_cmd;
182 ktime_t issue_time_stamp;
183 ktime_t compl_time_stamp;
184#ifdef CONFIG_SCSI_UFS_CRYPTO
185 int crypto_key_slot;
186 u64 data_unit_num;
187#endif
188
189 bool req_abort_skip;
190};
191
192/**
193 * struct ufs_query - holds relevant data structures for query request
194 * @request: request upiu and function
195 * @descriptor: buffer for sending/receiving descriptor
196 * @response: response upiu and response
197 */
198struct ufs_query {
199 struct ufs_query_req request;
200 u8 *descriptor;
201 struct ufs_query_res response;
202};
203
204/**
205 * struct ufs_dev_cmd - all assosiated fields with device management commands
206 * @type: device management command type - Query, NOP OUT
207 * @lock: lock to allow one command at a time
208 * @complete: internal commands completion
209 */
210struct ufs_dev_cmd {
211 enum dev_cmd_type type;
212 struct mutex lock;
213 struct completion *complete;
214 struct ufs_query query;
215};
216
217/**
218 * struct ufs_clk_info - UFS clock related info
219 * @list: list headed by hba->clk_list_head
220 * @clk: clock node
221 * @name: clock name
222 * @max_freq: maximum frequency supported by the clock
223 * @min_freq: min frequency that can be used for clock scaling
224 * @curr_freq: indicates the current frequency that it is set to
225 * @enabled: variable to check against multiple enable/disable
226 */
227struct ufs_clk_info {
228 struct list_head list;
229 struct clk *clk;
230 const char *name;
231 u32 max_freq;
232 u32 min_freq;
233 u32 curr_freq;
234 bool enabled;
235};
236
237enum ufs_notify_change_status {
238 PRE_CHANGE,
239 POST_CHANGE,
240};
241
242struct ufs_pa_layer_attr {
243 u32 gear_rx;
244 u32 gear_tx;
245 u32 lane_rx;
246 u32 lane_tx;
247 u32 pwr_rx;
248 u32 pwr_tx;
249 u32 hs_rate;
250};
251
252struct ufs_pwr_mode_info {
253 bool is_valid;
254 struct ufs_pa_layer_attr info;
255};
256
257/**
258 * struct ufs_hba_variant_ops - variant specific callbacks
259 * @name: variant name
260 * @init: called when the driver is initialized
261 * @exit: called to cleanup everything done in init
262 * @get_ufs_hci_version: called to get UFS HCI version
263 * @clk_scale_notify: notifies that clks are scaled up/down
264 * @setup_clocks: called before touching any of the controller registers
265 * @setup_regulators: called before accessing the host controller
266 * @hce_enable_notify: called before and after HCE enable bit is set to allow
267 * variant specific Uni-Pro initialization.
268 * @link_startup_notify: called before and after Link startup is carried out
269 * to allow variant specific Uni-Pro initialization.
270 * @pwr_change_notify: called before and after a power mode change
271 * is carried out to allow vendor spesific capabilities
272 * to be set.
273 * @setup_xfer_req: called before any transfer request is issued
274 * to set some things
275 * @setup_task_mgmt: called before any task management request is issued
276 * to set some things
277 * @hibern8_notify: called around hibern8 enter/exit
278 * @apply_dev_quirks: called to apply device specific quirks
279 * @suspend: called during host controller PM callback
280 * @resume: called during host controller PM callback
281 * @dbg_register_dump: used to dump controller debug information
282 * @phy_initialization: used to initialize phys
283 * @device_reset: called to issue a reset pulse on the UFS device
284 * @program_key: program or evict an inline encryption key
285 */
286struct ufs_hba_variant_ops {
287 const char *name;
288 int (*init)(struct ufs_hba *);
289 void (*exit)(struct ufs_hba *);
290 u32 (*get_ufs_hci_version)(struct ufs_hba *);
291 int (*clk_scale_notify)(struct ufs_hba *, bool,
292 enum ufs_notify_change_status);
293 int (*setup_clocks)(struct ufs_hba *, bool,
294 enum ufs_notify_change_status);
295 int (*setup_regulators)(struct ufs_hba *, bool);
296 int (*hce_enable_notify)(struct ufs_hba *,
297 enum ufs_notify_change_status);
298 int (*link_startup_notify)(struct ufs_hba *,
299 enum ufs_notify_change_status);
300 int (*pwr_change_notify)(struct ufs_hba *,
301 enum ufs_notify_change_status status,
302 struct ufs_pa_layer_attr *,
303 struct ufs_pa_layer_attr *);
304 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
305 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
306 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
307 enum ufs_notify_change_status);
308 int (*apply_dev_quirks)(struct ufs_hba *hba);
309 void (*fixup_dev_quirks)(struct ufs_hba *hba);
310 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
311 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
312 void (*dbg_register_dump)(struct ufs_hba *hba);
313 int (*phy_initialization)(struct ufs_hba *);
314 void (*device_reset)(struct ufs_hba *hba);
315 void (*config_scaling_param)(struct ufs_hba *hba,
316 struct devfreq_dev_profile *profile,
317 void *data);
318 int (*program_key)(struct ufs_hba *hba,
319 const union ufs_crypto_cfg_entry *cfg, int slot);
320};
321
322/* clock gating state */
323enum clk_gating_state {
324 CLKS_OFF,
325 CLKS_ON,
326 REQ_CLKS_OFF,
327 REQ_CLKS_ON,
328};
329
330/**
331 * struct ufs_clk_gating - UFS clock gating related info
332 * @gate_work: worker to turn off clocks after some delay as specified in
333 * delay_ms
334 * @ungate_work: worker to turn on clocks that will be used in case of
335 * interrupt context
336 * @state: the current clocks state
337 * @delay_ms: gating delay in ms
338 * @is_suspended: clk gating is suspended when set to 1 which can be used
339 * during suspend/resume
340 * @delay_attr: sysfs attribute to control delay_attr
341 * @enable_attr: sysfs attribute to enable/disable clock gating
342 * @is_enabled: Indicates the current status of clock gating
343 * @active_reqs: number of requests that are pending and should be waited for
344 * completion before gating clocks.
345 */
346struct ufs_clk_gating {
347 struct delayed_work gate_work;
348 struct work_struct ungate_work;
349 enum clk_gating_state state;
350 unsigned long delay_ms;
351 bool is_suspended;
352 struct device_attribute delay_attr;
353 struct device_attribute enable_attr;
354 bool is_enabled;
355 int active_reqs;
356 struct workqueue_struct *clk_gating_workq;
357};
358
359struct ufs_saved_pwr_info {
360 struct ufs_pa_layer_attr info;
361 bool is_valid;
362};
363
364/**
365 * struct ufs_clk_scaling - UFS clock scaling related data
366 * @active_reqs: number of requests that are pending. If this is zero when
367 * devfreq ->target() function is called then schedule "suspend_work" to
368 * suspend devfreq.
369 * @tot_busy_t: Total busy time in current polling window
370 * @window_start_t: Start time (in jiffies) of the current polling window
371 * @busy_start_t: Start time of current busy period
372 * @enable_attr: sysfs attribute to enable/disable clock scaling
373 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
374 * one keeps track of previous power mode.
375 * @workq: workqueue to schedule devfreq suspend/resume work
376 * @suspend_work: worker to suspend devfreq
377 * @resume_work: worker to resume devfreq
378 * @is_allowed: tracks if scaling is currently allowed or not
379 * @is_busy_started: tracks if busy period has started or not
380 * @is_suspended: tracks if devfreq is suspended or not
381 */
382struct ufs_clk_scaling {
383 int active_reqs;
384 unsigned long tot_busy_t;
385 ktime_t window_start_t;
386 ktime_t busy_start_t;
387 struct device_attribute enable_attr;
388 struct ufs_saved_pwr_info saved_pwr_info;
389 struct workqueue_struct *workq;
390 struct work_struct suspend_work;
391 struct work_struct resume_work;
392 bool is_allowed;
393 bool is_busy_started;
394 bool is_suspended;
395};
396
397#define UFS_ERR_REG_HIST_LENGTH 8
398/**
399 * struct ufs_err_reg_hist - keeps history of errors
400 * @pos: index to indicate cyclic buffer position
401 * @reg: cyclic buffer for registers value
402 * @tstamp: cyclic buffer for time stamp
403 */
404struct ufs_err_reg_hist {
405 int pos;
406 u32 reg[UFS_ERR_REG_HIST_LENGTH];
407 ktime_t tstamp[UFS_ERR_REG_HIST_LENGTH];
408};
409
410/**
411 * struct ufs_stats - keeps usage/err statistics
412 * @hibern8_exit_cnt: Counter to keep track of number of exits,
413 * reset this after link-startup.
414 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
415 * Clear after the first successful command completion.
416 * @pa_err: tracks pa-uic errors
417 * @dl_err: tracks dl-uic errors
418 * @nl_err: tracks nl-uic errors
419 * @tl_err: tracks tl-uic errors
420 * @dme_err: tracks dme errors
421 * @auto_hibern8_err: tracks auto-hibernate errors
422 * @fatal_err: tracks fatal errors
423 * @linkup_err: tracks link-startup errors
424 * @resume_err: tracks resume errors
425 * @suspend_err: tracks suspend errors
426 * @dev_reset: tracks device reset events
427 * @host_reset: tracks host reset events
428 * @tsk_abort: tracks task abort events
429 */
430struct ufs_stats {
431 u32 hibern8_exit_cnt;
432 ktime_t last_hibern8_exit_tstamp;
433
434 /* uic specific errors */
435 struct ufs_err_reg_hist pa_err;
436 struct ufs_err_reg_hist dl_err;
437 struct ufs_err_reg_hist nl_err;
438 struct ufs_err_reg_hist tl_err;
439 struct ufs_err_reg_hist dme_err;
440
441 /* fatal errors */
442 struct ufs_err_reg_hist auto_hibern8_err;
443 struct ufs_err_reg_hist fatal_err;
444 struct ufs_err_reg_hist link_startup_err;
445 struct ufs_err_reg_hist resume_err;
446 struct ufs_err_reg_hist suspend_err;
447
448 /* abnormal events */
449 struct ufs_err_reg_hist dev_reset;
450 struct ufs_err_reg_hist host_reset;
451 struct ufs_err_reg_hist task_abort;
452};
453
454enum ufshcd_quirks {
455 /* Interrupt aggregation support is broken */
456 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
457
458 /*
459 * delay before each dme command is required as the unipro
460 * layer has shown instabilities
461 */
462 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
463
464 /*
465 * If UFS host controller is having issue in processing LCC (Line
466 * Control Command) coming from device then enable this quirk.
467 * When this quirk is enabled, host controller driver should disable
468 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
469 * attribute of device to 0).
470 */
471 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
472
473 /*
474 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
475 * inbound Link supports unterminated line in HS mode. Setting this
476 * attribute to 1 fixes moving to HS gear.
477 */
478 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
479
480 /*
481 * This quirk needs to be enabled if the host controller only allows
482 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
483 * SLOW AUTO).
484 */
485 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
486
487 /*
488 * This quirk needs to be enabled if the host controller doesn't
489 * advertise the correct version in UFS_VER register. If this quirk
490 * is enabled, standard UFS host driver will call the vendor specific
491 * ops (get_ufs_hci_version) to get the correct version.
492 */
493 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
494
495 /*
496 * Clear handling for transfer/task request list is just opposite.
497 */
498 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
499
500 /*
501 * This quirk needs to be enabled if host controller doesn't allow
502 * that the interrupt aggregation timer and counter are reset by s/w.
503 */
504 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
505
506 /*
507 * This quirks needs to be enabled if host controller cannot be
508 * enabled via HCE register.
509 */
510 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
511
512 /*
513 * This quirk needs to be enabled if the host controller regards
514 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
515 */
516 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
517
518 /*
519 * This quirk needs to be enabled if the host controller reports
520 * OCS FATAL ERROR with device error through sense data
521 */
522 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
523
524 /*
525 * This quirk needs to be enabled if the host controller has
526 * auto-hibernate capability but it doesn't work.
527 */
528 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
529};
530
531enum ufshcd_caps {
532 /* Allow dynamic clk gating */
533 UFSHCD_CAP_CLK_GATING = 1 << 0,
534
535 /* Allow hiberb8 with clk gating */
536 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
537
538 /* Allow dynamic clk scaling */
539 UFSHCD_CAP_CLK_SCALING = 1 << 2,
540
541 /* Allow auto bkops to enabled during runtime suspend */
542 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
543
544 /*
545 * This capability allows host controller driver to use the UFS HCI's
546 * interrupt aggregation capability.
547 * CAUTION: Enabling this might reduce overall UFS throughput.
548 */
549 UFSHCD_CAP_INTR_AGGR = 1 << 4,
550
551 /*
552 * This capability allows the device auto-bkops to be always enabled
553 * except during suspend (both runtime and suspend).
554 * Enabling this capability means that device will always be allowed
555 * to do background operation when it's active but it might degrade
556 * the performance of ongoing read/write operations.
557 */
558 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
559
560 /*
561 * This capability allows host controller driver to automatically
562 * enable runtime power management by itself instead of waiting
563 * for userspace to control the power management.
564 */
565 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
566
567 /*
568 * This capability allows the host controller driver to turn-on
569 * WriteBooster, if the underlying device supports it and is
570 * provisioned to be used. This would increase the write performance.
571 */
572 UFSHCD_CAP_WB_EN = 1 << 7,
573
574 /*
575 * This capability allows the host controller driver to use the
576 * inline crypto engine, if it is present
577 */
578 UFSHCD_CAP_CRYPTO = 1 << 8,
579};
580
581struct ufs_hba_variant_params {
582 struct devfreq_dev_profile devfreq_profile;
583 struct devfreq_simple_ondemand_data ondemand_data;
584 u16 hba_enable_delay_us;
585 u32 wb_flush_threshold;
586};
587
588/**
589 * struct ufs_hba - per adapter private structure
590 * @mmio_base: UFSHCI base register address
591 * @ucdl_base_addr: UFS Command Descriptor base address
592 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
593 * @utmrdl_base_addr: UTP Task Management Descriptor base address
594 * @ucdl_dma_addr: UFS Command Descriptor DMA address
595 * @utrdl_dma_addr: UTRDL DMA address
596 * @utmrdl_dma_addr: UTMRDL DMA address
597 * @host: Scsi_Host instance of the driver
598 * @dev: device handle
599 * @lrb: local reference block
600 * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
601 * @outstanding_tasks: Bits representing outstanding task requests
602 * @outstanding_reqs: Bits representing outstanding transfer requests
603 * @capabilities: UFS Controller Capabilities
604 * @nutrs: Transfer Request Queue depth supported by controller
605 * @nutmrs: Task Management Queue depth supported by controller
606 * @ufs_version: UFS Version to which controller complies
607 * @vops: pointer to variant specific operations
608 * @priv: pointer to variant specific private data
609 * @irq: Irq number of the controller
610 * @active_uic_cmd: handle of active UIC command
611 * @uic_cmd_mutex: mutex for uic command
612 * @tmf_tag_set: TMF tag set.
613 * @tmf_queue: Used to allocate TMF tags.
614 * @pwr_done: completion for power mode change
615 * @ufshcd_state: UFSHCD states
616 * @eh_flags: Error handling flags
617 * @intr_mask: Interrupt Mask Bits
618 * @ee_ctrl_mask: Exception event control mask
619 * @is_powered: flag to check if HBA is powered
620 * @eh_work: Worker to handle UFS errors that require s/w attention
621 * @eeh_work: Worker to handle exception events
622 * @errors: HBA errors
623 * @uic_error: UFS interconnect layer error status
624 * @saved_err: sticky error mask
625 * @saved_uic_err: sticky UIC error mask
626 * @silence_err_logs: flag to silence error logs
627 * @dev_cmd: ufs device management command information
628 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
629 * @auto_bkops_enabled: to track whether bkops is enabled in device
630 * @vreg_info: UFS device voltage regulator information
631 * @clk_list_head: UFS host controller clocks list node head
632 * @pwr_info: holds current power mode
633 * @max_pwr_info: keeps the device max valid pwm
634 * @desc_size: descriptor sizes reported by device
635 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
636 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
637 * device is known or not.
638 * @scsi_block_reqs_cnt: reference counting for scsi block requests
639 * @crypto_capabilities: Content of crypto capabilities register (0x100)
640 * @crypto_cap_array: Array of crypto capabilities
641 * @crypto_cfg_register: Start of the crypto cfg array
642 * @ksm: the keyslot manager tied to this hba
643 */
644struct ufs_hba {
645 void __iomem *mmio_base;
646
647 /* Virtual memory reference */
648 struct utp_transfer_cmd_desc *ucdl_base_addr;
649 struct utp_transfer_req_desc *utrdl_base_addr;
650 struct utp_task_req_desc *utmrdl_base_addr;
651
652 /* DMA memory reference */
653 dma_addr_t ucdl_dma_addr;
654 dma_addr_t utrdl_dma_addr;
655 dma_addr_t utmrdl_dma_addr;
656
657 struct Scsi_Host *host;
658 struct device *dev;
659 struct request_queue *cmd_queue;
660 /*
661 * This field is to keep a reference to "scsi_device" corresponding to
662 * "UFS device" W-LU.
663 */
664 struct scsi_device *sdev_ufs_device;
665
666 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
667 enum uic_link_state uic_link_state;
668 /* Desired UFS power management level during runtime PM */
669 enum ufs_pm_level rpm_lvl;
670 /* Desired UFS power management level during system PM */
671 enum ufs_pm_level spm_lvl;
672 struct device_attribute rpm_lvl_attr;
673 struct device_attribute spm_lvl_attr;
674 int pm_op_in_progress;
675
676 /* Auto-Hibernate Idle Timer register value */
677 u32 ahit;
678
679 struct ufshcd_lrb *lrb;
680
681 unsigned long outstanding_tasks;
682 unsigned long outstanding_reqs;
683
684 u32 capabilities;
685 int nutrs;
686 int nutmrs;
687 u32 ufs_version;
688 const struct ufs_hba_variant_ops *vops;
689 struct ufs_hba_variant_params *vps;
690 void *priv;
691 unsigned int irq;
692 bool is_irq_enabled;
693 enum ufs_ref_clk_freq dev_ref_clk_freq;
694
695 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
696
697 /* Device deviations from standard UFS device spec. */
698 unsigned int dev_quirks;
699
700 struct blk_mq_tag_set tmf_tag_set;
701 struct request_queue *tmf_queue;
702
703 struct uic_command *active_uic_cmd;
704 struct mutex uic_cmd_mutex;
705 struct completion *uic_async_done;
706
707 u32 ufshcd_state;
708 u32 eh_flags;
709 u32 intr_mask;
710 u16 ee_ctrl_mask;
711 bool is_powered;
712
713 /* Work Queues */
714 struct work_struct eh_work;
715 struct work_struct eeh_work;
716
717 /* HBA Errors */
718 u32 errors;
719 u32 uic_error;
720 u32 saved_err;
721 u32 saved_uic_err;
722 struct ufs_stats ufs_stats;
723 bool silence_err_logs;
724
725 /* Device management request data */
726 struct ufs_dev_cmd dev_cmd;
727 ktime_t last_dme_cmd_tstamp;
728
729 /* Keeps information of the UFS device connected to this host */
730 struct ufs_dev_info dev_info;
731 bool auto_bkops_enabled;
732 struct ufs_vreg_info vreg_info;
733 struct list_head clk_list_head;
734
735 bool wlun_dev_clr_ua;
736
737 /* Number of requests aborts */
738 int req_abort_count;
739
740 /* Number of lanes available (1 or 2) for Rx/Tx */
741 u32 lanes_per_direction;
742 struct ufs_pa_layer_attr pwr_info;
743 struct ufs_pwr_mode_info max_pwr_info;
744
745 struct ufs_clk_gating clk_gating;
746 /* Control to enable/disable host capabilities */
747 u32 caps;
748
749 struct devfreq *devfreq;
750 struct ufs_clk_scaling clk_scaling;
751 bool is_sys_suspended;
752
753 enum bkops_status urgent_bkops_lvl;
754 bool is_urgent_bkops_lvl_checked;
755
756 struct rw_semaphore clk_scaling_lock;
757 unsigned char desc_size[QUERY_DESC_IDN_MAX];
758 atomic_t scsi_block_reqs_cnt;
759
760 struct device bsg_dev;
761 struct request_queue *bsg_queue;
762 bool wb_buf_flush_enabled;
763 bool wb_enabled;
764 struct delayed_work rpm_dev_flush_recheck_work;
765
766#ifdef CONFIG_SCSI_UFS_CRYPTO
767 union ufs_crypto_capabilities crypto_capabilities;
768 union ufs_crypto_cap_entry *crypto_cap_array;
769 u32 crypto_cfg_register;
770 struct blk_keyslot_manager ksm;
771#endif
772};
773
774/* Returns true if clocks can be gated. Otherwise false */
775static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
776{
777 return hba->caps & UFSHCD_CAP_CLK_GATING;
778}
779static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
780{
781 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
782}
783static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
784{
785 return hba->caps & UFSHCD_CAP_CLK_SCALING;
786}
787static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
788{
789 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
790}
791static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
792{
793 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
794}
795
796static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
797{
798/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
799#ifndef CONFIG_SCSI_UFS_DWC
800 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
801 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
802 return true;
803 else
804 return false;
805#else
806return true;
807#endif
808}
809
810static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
811{
812 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
813 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
814}
815
816static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
817{
818 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
819}
820
821static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
822{
823 return hba->caps & UFSHCD_CAP_WB_EN;
824}
825
826#define ufshcd_writel(hba, val, reg) \
827 writel((val), (hba)->mmio_base + (reg))
828#define ufshcd_readl(hba, reg) \
829 readl((hba)->mmio_base + (reg))
830
831/**
832 * ufshcd_rmwl - read modify write into a register
833 * @hba - per adapter instance
834 * @mask - mask to apply on read value
835 * @val - actual value to write
836 * @reg - register address
837 */
838static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
839{
840 u32 tmp;
841
842 tmp = ufshcd_readl(hba, reg);
843 tmp &= ~mask;
844 tmp |= (val & mask);
845 ufshcd_writel(hba, tmp, reg);
846}
847
848int ufshcd_alloc_host(struct device *, struct ufs_hba **);
849void ufshcd_dealloc_host(struct ufs_hba *);
850int ufshcd_hba_enable(struct ufs_hba *hba);
851int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
852int ufshcd_link_recovery(struct ufs_hba *hba);
853int ufshcd_make_hba_operational(struct ufs_hba *hba);
854void ufshcd_remove(struct ufs_hba *);
855int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
856void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
857int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
858 u32 val, unsigned long interval_us,
859 unsigned long timeout_ms);
860void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
861void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
862 u32 reg);
863
864static inline void check_upiu_size(void)
865{
866 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
867 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
868}
869
870/**
871 * ufshcd_set_variant - set variant specific data to the hba
872 * @hba - per adapter instance
873 * @variant - pointer to variant specific data
874 */
875static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
876{
877 BUG_ON(!hba);
878 hba->priv = variant;
879}
880
881/**
882 * ufshcd_get_variant - get variant specific data from the hba
883 * @hba - per adapter instance
884 */
885static inline void *ufshcd_get_variant(struct ufs_hba *hba)
886{
887 BUG_ON(!hba);
888 return hba->priv;
889}
890static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
891 struct ufs_hba *hba)
892{
893 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
894}
895
896static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
897{
898 if (hba->dev_info.b_wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
899 return hba->dev_info.wb_dedicated_lu;
900 return 0;
901}
902
903extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
904extern int ufshcd_runtime_resume(struct ufs_hba *hba);
905extern int ufshcd_runtime_idle(struct ufs_hba *hba);
906extern int ufshcd_system_suspend(struct ufs_hba *hba);
907extern int ufshcd_system_resume(struct ufs_hba *hba);
908extern int ufshcd_shutdown(struct ufs_hba *hba);
909extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
910 u8 attr_set, u32 mib_val, u8 peer);
911extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
912 u32 *mib_val, u8 peer);
913extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
914 struct ufs_pa_layer_attr *desired_pwr_mode);
915
916/* UIC command interfaces for DME primitives */
917#define DME_LOCAL 0
918#define DME_PEER 1
919#define ATTR_SET_NOR 0 /* NORMAL */
920#define ATTR_SET_ST 1 /* STATIC */
921
922static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
923 u32 mib_val)
924{
925 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
926 mib_val, DME_LOCAL);
927}
928
929static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
930 u32 mib_val)
931{
932 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
933 mib_val, DME_LOCAL);
934}
935
936static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
937 u32 mib_val)
938{
939 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
940 mib_val, DME_PEER);
941}
942
943static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
944 u32 mib_val)
945{
946 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
947 mib_val, DME_PEER);
948}
949
950static inline int ufshcd_dme_get(struct ufs_hba *hba,
951 u32 attr_sel, u32 *mib_val)
952{
953 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
954}
955
956static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
957 u32 attr_sel, u32 *mib_val)
958{
959 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
960}
961
962static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
963{
964 return (pwr_info->pwr_rx == FAST_MODE ||
965 pwr_info->pwr_rx == FASTAUTO_MODE) &&
966 (pwr_info->pwr_tx == FAST_MODE ||
967 pwr_info->pwr_tx == FASTAUTO_MODE);
968}
969
970static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
971{
972 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
973}
974
975/* Expose Query-Request API */
976int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
977 enum query_opcode opcode,
978 enum desc_idn idn, u8 index,
979 u8 selector,
980 u8 *desc_buf, int *buf_len);
981int ufshcd_read_desc_param(struct ufs_hba *hba,
982 enum desc_idn desc_id,
983 int desc_index,
984 u8 param_offset,
985 u8 *param_read_buf,
986 u8 param_size);
987int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
988 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
989int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
990 enum flag_idn idn, u8 index, bool *flag_res);
991
992void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
993void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
994void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
995#define SD_ASCII_STD true
996#define SD_RAW false
997int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
998 u8 **buf, bool ascii);
999
1000int ufshcd_hold(struct ufs_hba *hba, bool async);
1001void ufshcd_release(struct ufs_hba *hba);
1002
1003void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
1004 int *desc_length);
1005
1006u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1007
1008int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1009
1010int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1011 struct utp_upiu_req *req_upiu,
1012 struct utp_upiu_req *rsp_upiu,
1013 int msgcode,
1014 u8 *desc_buff, int *buff_len,
1015 enum query_opcode desc_op);
1016
1017/* Wrapper functions for safely calling variant operations */
1018static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
1019{
1020 if (hba->vops)
1021 return hba->vops->name;
1022 return "";
1023}
1024
1025static inline int ufshcd_vops_init(struct ufs_hba *hba)
1026{
1027 if (hba->vops && hba->vops->init)
1028 return hba->vops->init(hba);
1029
1030 return 0;
1031}
1032
1033static inline void ufshcd_vops_exit(struct ufs_hba *hba)
1034{
1035 if (hba->vops && hba->vops->exit)
1036 return hba->vops->exit(hba);
1037}
1038
1039static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
1040{
1041 if (hba->vops && hba->vops->get_ufs_hci_version)
1042 return hba->vops->get_ufs_hci_version(hba);
1043
1044 return ufshcd_readl(hba, REG_UFS_VERSION);
1045}
1046
1047static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
1048 bool up, enum ufs_notify_change_status status)
1049{
1050 if (hba->vops && hba->vops->clk_scale_notify)
1051 return hba->vops->clk_scale_notify(hba, up, status);
1052 return 0;
1053}
1054
1055static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
1056 enum ufs_notify_change_status status)
1057{
1058 if (hba->vops && hba->vops->setup_clocks)
1059 return hba->vops->setup_clocks(hba, on, status);
1060 return 0;
1061}
1062
1063static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
1064{
1065 if (hba->vops && hba->vops->setup_regulators)
1066 return hba->vops->setup_regulators(hba, status);
1067
1068 return 0;
1069}
1070
1071static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1072 bool status)
1073{
1074 if (hba->vops && hba->vops->hce_enable_notify)
1075 return hba->vops->hce_enable_notify(hba, status);
1076
1077 return 0;
1078}
1079static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1080 bool status)
1081{
1082 if (hba->vops && hba->vops->link_startup_notify)
1083 return hba->vops->link_startup_notify(hba, status);
1084
1085 return 0;
1086}
1087
1088static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1089 bool status,
1090 struct ufs_pa_layer_attr *dev_max_params,
1091 struct ufs_pa_layer_attr *dev_req_params)
1092{
1093 if (hba->vops && hba->vops->pwr_change_notify)
1094 return hba->vops->pwr_change_notify(hba, status,
1095 dev_max_params, dev_req_params);
1096
1097 return -ENOTSUPP;
1098}
1099
1100static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
1101 bool is_scsi_cmd)
1102{
1103 if (hba->vops && hba->vops->setup_xfer_req)
1104 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
1105}
1106
1107static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1108 int tag, u8 tm_function)
1109{
1110 if (hba->vops && hba->vops->setup_task_mgmt)
1111 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1112}
1113
1114static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1115 enum uic_cmd_dme cmd,
1116 enum ufs_notify_change_status status)
1117{
1118 if (hba->vops && hba->vops->hibern8_notify)
1119 return hba->vops->hibern8_notify(hba, cmd, status);
1120}
1121
1122static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1123{
1124 if (hba->vops && hba->vops->apply_dev_quirks)
1125 return hba->vops->apply_dev_quirks(hba);
1126 return 0;
1127}
1128
1129static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
1130{
1131 if (hba->vops && hba->vops->fixup_dev_quirks)
1132 hba->vops->fixup_dev_quirks(hba);
1133}
1134
1135static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1136{
1137 if (hba->vops && hba->vops->suspend)
1138 return hba->vops->suspend(hba, op);
1139
1140 return 0;
1141}
1142
1143static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1144{
1145 if (hba->vops && hba->vops->resume)
1146 return hba->vops->resume(hba, op);
1147
1148 return 0;
1149}
1150
1151static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1152{
1153 if (hba->vops && hba->vops->dbg_register_dump)
1154 hba->vops->dbg_register_dump(hba);
1155}
1156
1157static inline void ufshcd_vops_device_reset(struct ufs_hba *hba)
1158{
1159 if (hba->vops && hba->vops->device_reset) {
1160 hba->vops->device_reset(hba);
1161 ufshcd_set_ufs_dev_active(hba);
1162 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, 0);
1163 }
1164}
1165
1166static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1167 struct devfreq_dev_profile
1168 *profile, void *data)
1169{
1170 if (hba->vops && hba->vops->config_scaling_param)
1171 hba->vops->config_scaling_param(hba, profile, data);
1172}
1173
1174extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1175
1176/*
1177 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1178 * @scsi_lun: scsi LUN id
1179 *
1180 * Returns UPIU LUN id
1181 */
1182static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1183{
1184 if (scsi_is_wlun(scsi_lun))
1185 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1186 | UFS_UPIU_WLUN_ID;
1187 else
1188 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1189}
1190
1191int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1192 const char *prefix);
1193
1194#endif /* End of Header */