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1/*
2 * Aic94xx SAS/SATA driver register access.
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This file is part of the aic94xx driver.
10 *
11 * The aic94xx driver is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; version 2 of the
14 * License.
15 *
16 * The aic94xx driver is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with the aic94xx driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 *
25 */
26
27#include <linux/pci.h>
28#include "aic94xx_reg.h"
29#include "aic94xx.h"
30
31/* Writing to device address space.
32 * Offset comes before value to remind that the operation of
33 * this function is *offs = val.
34 */
35static void asd_write_byte(struct asd_ha_struct *asd_ha,
36 unsigned long offs, u8 val)
37{
38 if (unlikely(asd_ha->iospace))
39 outb(val,
40 (unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
41 else
42 writeb(val, asd_ha->io_handle[0].addr + offs);
43 wmb();
44}
45
46static void asd_write_word(struct asd_ha_struct *asd_ha,
47 unsigned long offs, u16 val)
48{
49 if (unlikely(asd_ha->iospace))
50 outw(val,
51 (unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
52 else
53 writew(val, asd_ha->io_handle[0].addr + offs);
54 wmb();
55}
56
57static void asd_write_dword(struct asd_ha_struct *asd_ha,
58 unsigned long offs, u32 val)
59{
60 if (unlikely(asd_ha->iospace))
61 outl(val,
62 (unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
63 else
64 writel(val, asd_ha->io_handle[0].addr + offs);
65 wmb();
66}
67
68/* Reading from device address space.
69 */
70static u8 asd_read_byte(struct asd_ha_struct *asd_ha, unsigned long offs)
71{
72 u8 val;
73 if (unlikely(asd_ha->iospace))
74 val = inb((unsigned long) asd_ha->io_handle[0].addr
75 + (offs & 0xFF));
76 else
77 val = readb(asd_ha->io_handle[0].addr + offs);
78 rmb();
79 return val;
80}
81
82static u16 asd_read_word(struct asd_ha_struct *asd_ha,
83 unsigned long offs)
84{
85 u16 val;
86 if (unlikely(asd_ha->iospace))
87 val = inw((unsigned long)asd_ha->io_handle[0].addr
88 + (offs & 0xFF));
89 else
90 val = readw(asd_ha->io_handle[0].addr + offs);
91 rmb();
92 return val;
93}
94
95static u32 asd_read_dword(struct asd_ha_struct *asd_ha,
96 unsigned long offs)
97{
98 u32 val;
99 if (unlikely(asd_ha->iospace))
100 val = inl((unsigned long) asd_ha->io_handle[0].addr
101 + (offs & 0xFF));
102 else
103 val = readl(asd_ha->io_handle[0].addr + offs);
104 rmb();
105 return val;
106}
107
108static inline u32 asd_mem_offs_swa(void)
109{
110 return 0;
111}
112
113static inline u32 asd_mem_offs_swc(void)
114{
115 return asd_mem_offs_swa() + MBAR0_SWA_SIZE;
116}
117
118static inline u32 asd_mem_offs_swb(void)
119{
120 return asd_mem_offs_swc() + MBAR0_SWC_SIZE + 0x20;
121}
122
123/* We know that the register wanted is in the range
124 * of the sliding window.
125 */
126#define ASD_READ_SW(ww, type, ord) \
127static type asd_read_##ww##_##ord(struct asd_ha_struct *asd_ha, \
128 u32 reg) \
129{ \
130 struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0]; \
131 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
132 return asd_read_##ord(asd_ha, (unsigned long)map_offs); \
133}
134
135#define ASD_WRITE_SW(ww, type, ord) \
136static void asd_write_##ww##_##ord(struct asd_ha_struct *asd_ha, \
137 u32 reg, type val) \
138{ \
139 struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0]; \
140 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
141 asd_write_##ord(asd_ha, (unsigned long)map_offs, val); \
142}
143
144ASD_READ_SW(swa, u8, byte);
145ASD_READ_SW(swa, u16, word);
146ASD_READ_SW(swa, u32, dword);
147
148ASD_READ_SW(swb, u8, byte);
149ASD_READ_SW(swb, u16, word);
150ASD_READ_SW(swb, u32, dword);
151
152ASD_READ_SW(swc, u8, byte);
153ASD_READ_SW(swc, u16, word);
154ASD_READ_SW(swc, u32, dword);
155
156ASD_WRITE_SW(swa, u8, byte);
157ASD_WRITE_SW(swa, u16, word);
158ASD_WRITE_SW(swa, u32, dword);
159
160ASD_WRITE_SW(swb, u8, byte);
161ASD_WRITE_SW(swb, u16, word);
162ASD_WRITE_SW(swb, u32, dword);
163
164ASD_WRITE_SW(swc, u8, byte);
165ASD_WRITE_SW(swc, u16, word);
166ASD_WRITE_SW(swc, u32, dword);
167
168/*
169 * A word about sliding windows:
170 * MBAR0 is divided into sliding windows A, C and B, in that order.
171 * SWA starts at offset 0 of MBAR0, up to 0x57, with size 0x58 bytes.
172 * SWC starts at offset 0x58 of MBAR0, up to 0x60, with size 0x8 bytes.
173 * From 0x60 to 0x7F, we have a copy of PCI config space 0x60-0x7F.
174 * SWB starts at offset 0x80 of MBAR0 and extends to the end of MBAR0.
175 * See asd_init_sw() in aic94xx_hwi.c
176 *
177 * We map the most common registers we'd access of the internal 4GB
178 * host adapter memory space. If a register/internal memory location
179 * is wanted which is not mapped, we slide SWB, by paging it,
180 * see asd_move_swb() in aic94xx_reg.c.
181 */
182
183/**
184 * asd_move_swb -- move sliding window B
185 * @asd_ha: pointer to host adapter structure
186 * @reg: register desired to be within range of the new window
187 */
188static void asd_move_swb(struct asd_ha_struct *asd_ha, u32 reg)
189{
190 u32 base = reg & ~(MBAR0_SWB_SIZE-1);
191 pci_write_config_dword(asd_ha->pcidev, PCI_CONF_MBAR0_SWB, base);
192 asd_ha->io_handle[0].swb_base = base;
193}
194
195static void __asd_write_reg_byte(struct asd_ha_struct *asd_ha, u32 reg, u8 val)
196{
197 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0];
198 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR);
199 if (io_handle->swa_base <= reg
200 && reg < io_handle->swa_base + MBAR0_SWA_SIZE)
201 asd_write_swa_byte (asd_ha, reg,val);
202 else if (io_handle->swb_base <= reg
203 && reg < io_handle->swb_base + MBAR0_SWB_SIZE)
204 asd_write_swb_byte (asd_ha, reg, val);
205 else if (io_handle->swc_base <= reg
206 && reg < io_handle->swc_base + MBAR0_SWC_SIZE)
207 asd_write_swc_byte (asd_ha, reg, val);
208 else {
209 /* Ok, we have to move SWB */
210 asd_move_swb(asd_ha, reg);
211 asd_write_swb_byte (asd_ha, reg, val);
212 }
213}
214
215#define ASD_WRITE_REG(type, ord) \
216void asd_write_reg_##ord (struct asd_ha_struct *asd_ha, u32 reg, type val)\
217{ \
218 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0]; \
219 unsigned long flags; \
220 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR); \
221 spin_lock_irqsave(&asd_ha->iolock, flags); \
222 if (io_handle->swa_base <= reg \
223 && reg < io_handle->swa_base + MBAR0_SWA_SIZE) \
224 asd_write_swa_##ord (asd_ha, reg,val); \
225 else if (io_handle->swb_base <= reg \
226 && reg < io_handle->swb_base + MBAR0_SWB_SIZE) \
227 asd_write_swb_##ord (asd_ha, reg, val); \
228 else if (io_handle->swc_base <= reg \
229 && reg < io_handle->swc_base + MBAR0_SWC_SIZE) \
230 asd_write_swc_##ord (asd_ha, reg, val); \
231 else { \
232 /* Ok, we have to move SWB */ \
233 asd_move_swb(asd_ha, reg); \
234 asd_write_swb_##ord (asd_ha, reg, val); \
235 } \
236 spin_unlock_irqrestore(&asd_ha->iolock, flags); \
237}
238
239ASD_WRITE_REG(u8, byte);
240ASD_WRITE_REG(u16,word);
241ASD_WRITE_REG(u32,dword);
242
243static u8 __asd_read_reg_byte(struct asd_ha_struct *asd_ha, u32 reg)
244{
245 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0];
246 u8 val;
247 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR);
248 if (io_handle->swa_base <= reg
249 && reg < io_handle->swa_base + MBAR0_SWA_SIZE)
250 val = asd_read_swa_byte (asd_ha, reg);
251 else if (io_handle->swb_base <= reg
252 && reg < io_handle->swb_base + MBAR0_SWB_SIZE)
253 val = asd_read_swb_byte (asd_ha, reg);
254 else if (io_handle->swc_base <= reg
255 && reg < io_handle->swc_base + MBAR0_SWC_SIZE)
256 val = asd_read_swc_byte (asd_ha, reg);
257 else {
258 /* Ok, we have to move SWB */
259 asd_move_swb(asd_ha, reg);
260 val = asd_read_swb_byte (asd_ha, reg);
261 }
262 return val;
263}
264
265#define ASD_READ_REG(type, ord) \
266type asd_read_reg_##ord (struct asd_ha_struct *asd_ha, u32 reg) \
267{ \
268 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0]; \
269 type val; \
270 unsigned long flags; \
271 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR); \
272 spin_lock_irqsave(&asd_ha->iolock, flags); \
273 if (io_handle->swa_base <= reg \
274 && reg < io_handle->swa_base + MBAR0_SWA_SIZE) \
275 val = asd_read_swa_##ord (asd_ha, reg); \
276 else if (io_handle->swb_base <= reg \
277 && reg < io_handle->swb_base + MBAR0_SWB_SIZE) \
278 val = asd_read_swb_##ord (asd_ha, reg); \
279 else if (io_handle->swc_base <= reg \
280 && reg < io_handle->swc_base + MBAR0_SWC_SIZE) \
281 val = asd_read_swc_##ord (asd_ha, reg); \
282 else { \
283 /* Ok, we have to move SWB */ \
284 asd_move_swb(asd_ha, reg); \
285 val = asd_read_swb_##ord (asd_ha, reg); \
286 } \
287 spin_unlock_irqrestore(&asd_ha->iolock, flags); \
288 return val; \
289}
290
291ASD_READ_REG(u8, byte);
292ASD_READ_REG(u16,word);
293ASD_READ_REG(u32,dword);
294
295/**
296 * asd_read_reg_string -- read a string of bytes from io space memory
297 * @asd_ha: pointer to host adapter structure
298 * @dst: pointer to a destination buffer where data will be written to
299 * @offs: start offset (register) to read from
300 * @count: number of bytes to read
301 */
302void asd_read_reg_string(struct asd_ha_struct *asd_ha, void *dst,
303 u32 offs, int count)
304{
305 u8 *p = dst;
306 unsigned long flags;
307
308 spin_lock_irqsave(&asd_ha->iolock, flags);
309 for ( ; count > 0; count--, offs++, p++)
310 *p = __asd_read_reg_byte(asd_ha, offs);
311 spin_unlock_irqrestore(&asd_ha->iolock, flags);
312}
313
314/**
315 * asd_write_reg_string -- write a string of bytes to io space memory
316 * @asd_ha: pointer to host adapter structure
317 * @src: pointer to source buffer where data will be read from
318 * @offs: start offset (register) to write to
319 * @count: number of bytes to write
320 */
321void asd_write_reg_string(struct asd_ha_struct *asd_ha, void *src,
322 u32 offs, int count)
323{
324 u8 *p = src;
325 unsigned long flags;
326
327 spin_lock_irqsave(&asd_ha->iolock, flags);
328 for ( ; count > 0; count--, offs++, p++)
329 __asd_write_reg_byte(asd_ha, offs, *p);
330 spin_unlock_irqrestore(&asd_ha->iolock, flags);
331}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Aic94xx SAS/SATA driver register access.
4 *
5 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
6 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
7 */
8
9#include <linux/pci.h>
10#include "aic94xx_reg.h"
11#include "aic94xx.h"
12
13/* Writing to device address space.
14 * Offset comes before value to remind that the operation of
15 * this function is *offs = val.
16 */
17static void asd_write_byte(struct asd_ha_struct *asd_ha,
18 unsigned long offs, u8 val)
19{
20 if (unlikely(asd_ha->iospace))
21 outb(val,
22 (unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
23 else
24 writeb(val, asd_ha->io_handle[0].addr + offs);
25 wmb();
26}
27
28static void asd_write_word(struct asd_ha_struct *asd_ha,
29 unsigned long offs, u16 val)
30{
31 if (unlikely(asd_ha->iospace))
32 outw(val,
33 (unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
34 else
35 writew(val, asd_ha->io_handle[0].addr + offs);
36 wmb();
37}
38
39static void asd_write_dword(struct asd_ha_struct *asd_ha,
40 unsigned long offs, u32 val)
41{
42 if (unlikely(asd_ha->iospace))
43 outl(val,
44 (unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
45 else
46 writel(val, asd_ha->io_handle[0].addr + offs);
47 wmb();
48}
49
50/* Reading from device address space.
51 */
52static u8 asd_read_byte(struct asd_ha_struct *asd_ha, unsigned long offs)
53{
54 u8 val;
55 if (unlikely(asd_ha->iospace))
56 val = inb((unsigned long) asd_ha->io_handle[0].addr
57 + (offs & 0xFF));
58 else
59 val = readb(asd_ha->io_handle[0].addr + offs);
60 rmb();
61 return val;
62}
63
64static u16 asd_read_word(struct asd_ha_struct *asd_ha,
65 unsigned long offs)
66{
67 u16 val;
68 if (unlikely(asd_ha->iospace))
69 val = inw((unsigned long)asd_ha->io_handle[0].addr
70 + (offs & 0xFF));
71 else
72 val = readw(asd_ha->io_handle[0].addr + offs);
73 rmb();
74 return val;
75}
76
77static u32 asd_read_dword(struct asd_ha_struct *asd_ha,
78 unsigned long offs)
79{
80 u32 val;
81 if (unlikely(asd_ha->iospace))
82 val = inl((unsigned long) asd_ha->io_handle[0].addr
83 + (offs & 0xFF));
84 else
85 val = readl(asd_ha->io_handle[0].addr + offs);
86 rmb();
87 return val;
88}
89
90static inline u32 asd_mem_offs_swa(void)
91{
92 return 0;
93}
94
95static inline u32 asd_mem_offs_swc(void)
96{
97 return asd_mem_offs_swa() + MBAR0_SWA_SIZE;
98}
99
100static inline u32 asd_mem_offs_swb(void)
101{
102 return asd_mem_offs_swc() + MBAR0_SWC_SIZE + 0x20;
103}
104
105/* We know that the register wanted is in the range
106 * of the sliding window.
107 */
108#define ASD_READ_SW(ww, type, ord) \
109static type asd_read_##ww##_##ord(struct asd_ha_struct *asd_ha, \
110 u32 reg) \
111{ \
112 struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0]; \
113 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
114 return asd_read_##ord(asd_ha, (unsigned long)map_offs); \
115}
116
117#define ASD_WRITE_SW(ww, type, ord) \
118static void asd_write_##ww##_##ord(struct asd_ha_struct *asd_ha, \
119 u32 reg, type val) \
120{ \
121 struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0]; \
122 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
123 asd_write_##ord(asd_ha, (unsigned long)map_offs, val); \
124}
125
126ASD_READ_SW(swa, u8, byte);
127ASD_READ_SW(swa, u16, word);
128ASD_READ_SW(swa, u32, dword);
129
130ASD_READ_SW(swb, u8, byte);
131ASD_READ_SW(swb, u16, word);
132ASD_READ_SW(swb, u32, dword);
133
134ASD_READ_SW(swc, u8, byte);
135ASD_READ_SW(swc, u16, word);
136ASD_READ_SW(swc, u32, dword);
137
138ASD_WRITE_SW(swa, u8, byte);
139ASD_WRITE_SW(swa, u16, word);
140ASD_WRITE_SW(swa, u32, dword);
141
142ASD_WRITE_SW(swb, u8, byte);
143ASD_WRITE_SW(swb, u16, word);
144ASD_WRITE_SW(swb, u32, dword);
145
146ASD_WRITE_SW(swc, u8, byte);
147ASD_WRITE_SW(swc, u16, word);
148ASD_WRITE_SW(swc, u32, dword);
149
150/*
151 * A word about sliding windows:
152 * MBAR0 is divided into sliding windows A, C and B, in that order.
153 * SWA starts at offset 0 of MBAR0, up to 0x57, with size 0x58 bytes.
154 * SWC starts at offset 0x58 of MBAR0, up to 0x60, with size 0x8 bytes.
155 * From 0x60 to 0x7F, we have a copy of PCI config space 0x60-0x7F.
156 * SWB starts at offset 0x80 of MBAR0 and extends to the end of MBAR0.
157 * See asd_init_sw() in aic94xx_hwi.c
158 *
159 * We map the most common registers we'd access of the internal 4GB
160 * host adapter memory space. If a register/internal memory location
161 * is wanted which is not mapped, we slide SWB, by paging it,
162 * see asd_move_swb() in aic94xx_reg.c.
163 */
164
165/**
166 * asd_move_swb -- move sliding window B
167 * @asd_ha: pointer to host adapter structure
168 * @reg: register desired to be within range of the new window
169 */
170static void asd_move_swb(struct asd_ha_struct *asd_ha, u32 reg)
171{
172 u32 base = reg & ~(MBAR0_SWB_SIZE-1);
173 pci_write_config_dword(asd_ha->pcidev, PCI_CONF_MBAR0_SWB, base);
174 asd_ha->io_handle[0].swb_base = base;
175}
176
177static void __asd_write_reg_byte(struct asd_ha_struct *asd_ha, u32 reg, u8 val)
178{
179 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0];
180 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR);
181 if (io_handle->swa_base <= reg
182 && reg < io_handle->swa_base + MBAR0_SWA_SIZE)
183 asd_write_swa_byte (asd_ha, reg,val);
184 else if (io_handle->swb_base <= reg
185 && reg < io_handle->swb_base + MBAR0_SWB_SIZE)
186 asd_write_swb_byte (asd_ha, reg, val);
187 else if (io_handle->swc_base <= reg
188 && reg < io_handle->swc_base + MBAR0_SWC_SIZE)
189 asd_write_swc_byte (asd_ha, reg, val);
190 else {
191 /* Ok, we have to move SWB */
192 asd_move_swb(asd_ha, reg);
193 asd_write_swb_byte (asd_ha, reg, val);
194 }
195}
196
197#define ASD_WRITE_REG(type, ord) \
198void asd_write_reg_##ord (struct asd_ha_struct *asd_ha, u32 reg, type val)\
199{ \
200 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0]; \
201 unsigned long flags; \
202 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR); \
203 spin_lock_irqsave(&asd_ha->iolock, flags); \
204 if (io_handle->swa_base <= reg \
205 && reg < io_handle->swa_base + MBAR0_SWA_SIZE) \
206 asd_write_swa_##ord (asd_ha, reg,val); \
207 else if (io_handle->swb_base <= reg \
208 && reg < io_handle->swb_base + MBAR0_SWB_SIZE) \
209 asd_write_swb_##ord (asd_ha, reg, val); \
210 else if (io_handle->swc_base <= reg \
211 && reg < io_handle->swc_base + MBAR0_SWC_SIZE) \
212 asd_write_swc_##ord (asd_ha, reg, val); \
213 else { \
214 /* Ok, we have to move SWB */ \
215 asd_move_swb(asd_ha, reg); \
216 asd_write_swb_##ord (asd_ha, reg, val); \
217 } \
218 spin_unlock_irqrestore(&asd_ha->iolock, flags); \
219}
220
221ASD_WRITE_REG(u8, byte);
222ASD_WRITE_REG(u16,word);
223ASD_WRITE_REG(u32,dword);
224
225static u8 __asd_read_reg_byte(struct asd_ha_struct *asd_ha, u32 reg)
226{
227 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0];
228 u8 val;
229 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR);
230 if (io_handle->swa_base <= reg
231 && reg < io_handle->swa_base + MBAR0_SWA_SIZE)
232 val = asd_read_swa_byte (asd_ha, reg);
233 else if (io_handle->swb_base <= reg
234 && reg < io_handle->swb_base + MBAR0_SWB_SIZE)
235 val = asd_read_swb_byte (asd_ha, reg);
236 else if (io_handle->swc_base <= reg
237 && reg < io_handle->swc_base + MBAR0_SWC_SIZE)
238 val = asd_read_swc_byte (asd_ha, reg);
239 else {
240 /* Ok, we have to move SWB */
241 asd_move_swb(asd_ha, reg);
242 val = asd_read_swb_byte (asd_ha, reg);
243 }
244 return val;
245}
246
247#define ASD_READ_REG(type, ord) \
248type asd_read_reg_##ord (struct asd_ha_struct *asd_ha, u32 reg) \
249{ \
250 struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0]; \
251 type val; \
252 unsigned long flags; \
253 BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR); \
254 spin_lock_irqsave(&asd_ha->iolock, flags); \
255 if (io_handle->swa_base <= reg \
256 && reg < io_handle->swa_base + MBAR0_SWA_SIZE) \
257 val = asd_read_swa_##ord (asd_ha, reg); \
258 else if (io_handle->swb_base <= reg \
259 && reg < io_handle->swb_base + MBAR0_SWB_SIZE) \
260 val = asd_read_swb_##ord (asd_ha, reg); \
261 else if (io_handle->swc_base <= reg \
262 && reg < io_handle->swc_base + MBAR0_SWC_SIZE) \
263 val = asd_read_swc_##ord (asd_ha, reg); \
264 else { \
265 /* Ok, we have to move SWB */ \
266 asd_move_swb(asd_ha, reg); \
267 val = asd_read_swb_##ord (asd_ha, reg); \
268 } \
269 spin_unlock_irqrestore(&asd_ha->iolock, flags); \
270 return val; \
271}
272
273ASD_READ_REG(u8, byte);
274ASD_READ_REG(u16,word);
275ASD_READ_REG(u32,dword);
276
277/**
278 * asd_read_reg_string -- read a string of bytes from io space memory
279 * @asd_ha: pointer to host adapter structure
280 * @dst: pointer to a destination buffer where data will be written to
281 * @offs: start offset (register) to read from
282 * @count: number of bytes to read
283 */
284void asd_read_reg_string(struct asd_ha_struct *asd_ha, void *dst,
285 u32 offs, int count)
286{
287 u8 *p = dst;
288 unsigned long flags;
289
290 spin_lock_irqsave(&asd_ha->iolock, flags);
291 for ( ; count > 0; count--, offs++, p++)
292 *p = __asd_read_reg_byte(asd_ha, offs);
293 spin_unlock_irqrestore(&asd_ha->iolock, flags);
294}
295
296/**
297 * asd_write_reg_string -- write a string of bytes to io space memory
298 * @asd_ha: pointer to host adapter structure
299 * @src: pointer to source buffer where data will be read from
300 * @offs: start offset (register) to write to
301 * @count: number of bytes to write
302 */
303void asd_write_reg_string(struct asd_ha_struct *asd_ha, void *src,
304 u32 offs, int count)
305{
306 u8 *p = src;
307 unsigned long flags;
308
309 spin_lock_irqsave(&asd_ha->iolock, flags);
310 for ( ; count > 0; count--, offs++, p++)
311 __asd_write_reg_byte(asd_ha, offs, *p);
312 spin_unlock_irqrestore(&asd_ha->iolock, flags);
313}