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1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* We use the hw_value as an index into our private channel structure */
18
19#include "common.h"
20
21#define CHAN2G(_freq, _idx) { \
22 .band = NL80211_BAND_2GHZ, \
23 .center_freq = (_freq), \
24 .hw_value = (_idx), \
25 .max_power = 20, \
26}
27
28#define CHAN5G(_freq, _idx) { \
29 .band = NL80211_BAND_5GHZ, \
30 .center_freq = (_freq), \
31 .hw_value = (_idx), \
32 .max_power = 20, \
33}
34
35/* Some 2 GHz radios are actually tunable on 2312-2732
36 * on 5 MHz steps, we support the channels which we know
37 * we have calibration data for all cards though to make
38 * this static */
39static const struct ieee80211_channel ath9k_2ghz_chantable[] = {
40 CHAN2G(2412, 0), /* Channel 1 */
41 CHAN2G(2417, 1), /* Channel 2 */
42 CHAN2G(2422, 2), /* Channel 3 */
43 CHAN2G(2427, 3), /* Channel 4 */
44 CHAN2G(2432, 4), /* Channel 5 */
45 CHAN2G(2437, 5), /* Channel 6 */
46 CHAN2G(2442, 6), /* Channel 7 */
47 CHAN2G(2447, 7), /* Channel 8 */
48 CHAN2G(2452, 8), /* Channel 9 */
49 CHAN2G(2457, 9), /* Channel 10 */
50 CHAN2G(2462, 10), /* Channel 11 */
51 CHAN2G(2467, 11), /* Channel 12 */
52 CHAN2G(2472, 12), /* Channel 13 */
53 CHAN2G(2484, 13), /* Channel 14 */
54};
55
56/* Some 5 GHz radios are actually tunable on XXXX-YYYY
57 * on 5 MHz steps, we support the channels which we know
58 * we have calibration data for all cards though to make
59 * this static */
60static const struct ieee80211_channel ath9k_5ghz_chantable[] = {
61 /* _We_ call this UNII 1 */
62 CHAN5G(5180, 14), /* Channel 36 */
63 CHAN5G(5200, 15), /* Channel 40 */
64 CHAN5G(5220, 16), /* Channel 44 */
65 CHAN5G(5240, 17), /* Channel 48 */
66 /* _We_ call this UNII 2 */
67 CHAN5G(5260, 18), /* Channel 52 */
68 CHAN5G(5280, 19), /* Channel 56 */
69 CHAN5G(5300, 20), /* Channel 60 */
70 CHAN5G(5320, 21), /* Channel 64 */
71 /* _We_ call this "Middle band" */
72 CHAN5G(5500, 22), /* Channel 100 */
73 CHAN5G(5520, 23), /* Channel 104 */
74 CHAN5G(5540, 24), /* Channel 108 */
75 CHAN5G(5560, 25), /* Channel 112 */
76 CHAN5G(5580, 26), /* Channel 116 */
77 CHAN5G(5600, 27), /* Channel 120 */
78 CHAN5G(5620, 28), /* Channel 124 */
79 CHAN5G(5640, 29), /* Channel 128 */
80 CHAN5G(5660, 30), /* Channel 132 */
81 CHAN5G(5680, 31), /* Channel 136 */
82 CHAN5G(5700, 32), /* Channel 140 */
83 /* _We_ call this UNII 3 */
84 CHAN5G(5745, 33), /* Channel 149 */
85 CHAN5G(5765, 34), /* Channel 153 */
86 CHAN5G(5785, 35), /* Channel 157 */
87 CHAN5G(5805, 36), /* Channel 161 */
88 CHAN5G(5825, 37), /* Channel 165 */
89};
90
91/* Atheros hardware rate code addition for short preamble */
92#define SHPCHECK(__hw_rate, __flags) \
93 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04 ) : 0)
94
95#define RATE(_bitrate, _hw_rate, _flags) { \
96 .bitrate = (_bitrate), \
97 .flags = (_flags), \
98 .hw_value = (_hw_rate), \
99 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
100}
101
102static struct ieee80211_rate ath9k_legacy_rates[] = {
103 RATE(10, 0x1b, 0),
104 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE),
105 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE),
106 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE),
107 RATE(60, 0x0b, (IEEE80211_RATE_SUPPORTS_5MHZ |
108 IEEE80211_RATE_SUPPORTS_10MHZ)),
109 RATE(90, 0x0f, (IEEE80211_RATE_SUPPORTS_5MHZ |
110 IEEE80211_RATE_SUPPORTS_10MHZ)),
111 RATE(120, 0x0a, (IEEE80211_RATE_SUPPORTS_5MHZ |
112 IEEE80211_RATE_SUPPORTS_10MHZ)),
113 RATE(180, 0x0e, (IEEE80211_RATE_SUPPORTS_5MHZ |
114 IEEE80211_RATE_SUPPORTS_10MHZ)),
115 RATE(240, 0x09, (IEEE80211_RATE_SUPPORTS_5MHZ |
116 IEEE80211_RATE_SUPPORTS_10MHZ)),
117 RATE(360, 0x0d, (IEEE80211_RATE_SUPPORTS_5MHZ |
118 IEEE80211_RATE_SUPPORTS_10MHZ)),
119 RATE(480, 0x08, (IEEE80211_RATE_SUPPORTS_5MHZ |
120 IEEE80211_RATE_SUPPORTS_10MHZ)),
121 RATE(540, 0x0c, (IEEE80211_RATE_SUPPORTS_5MHZ |
122 IEEE80211_RATE_SUPPORTS_10MHZ)),
123};
124
125int ath9k_cmn_init_channels_rates(struct ath_common *common)
126{
127 struct ath_hw *ah = (struct ath_hw *)common->ah;
128 void *channels;
129
130 BUILD_BUG_ON(ARRAY_SIZE(ath9k_2ghz_chantable) +
131 ARRAY_SIZE(ath9k_5ghz_chantable) !=
132 ATH9K_NUM_CHANNELS);
133
134 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
135 channels = devm_kzalloc(ah->dev,
136 sizeof(ath9k_2ghz_chantable), GFP_KERNEL);
137 if (!channels)
138 return -ENOMEM;
139
140 memcpy(channels, ath9k_2ghz_chantable,
141 sizeof(ath9k_2ghz_chantable));
142 common->sbands[NL80211_BAND_2GHZ].channels = channels;
143 common->sbands[NL80211_BAND_2GHZ].band = NL80211_BAND_2GHZ;
144 common->sbands[NL80211_BAND_2GHZ].n_channels =
145 ARRAY_SIZE(ath9k_2ghz_chantable);
146 common->sbands[NL80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
147 common->sbands[NL80211_BAND_2GHZ].n_bitrates =
148 ARRAY_SIZE(ath9k_legacy_rates);
149 }
150
151 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
152 channels = devm_kzalloc(ah->dev,
153 sizeof(ath9k_5ghz_chantable), GFP_KERNEL);
154 if (!channels)
155 return -ENOMEM;
156
157 memcpy(channels, ath9k_5ghz_chantable,
158 sizeof(ath9k_5ghz_chantable));
159 common->sbands[NL80211_BAND_5GHZ].channels = channels;
160 common->sbands[NL80211_BAND_5GHZ].band = NL80211_BAND_5GHZ;
161 common->sbands[NL80211_BAND_5GHZ].n_channels =
162 ARRAY_SIZE(ath9k_5ghz_chantable);
163 common->sbands[NL80211_BAND_5GHZ].bitrates =
164 ath9k_legacy_rates + 4;
165 common->sbands[NL80211_BAND_5GHZ].n_bitrates =
166 ARRAY_SIZE(ath9k_legacy_rates) - 4;
167 }
168 return 0;
169}
170EXPORT_SYMBOL(ath9k_cmn_init_channels_rates);
171
172void ath9k_cmn_setup_ht_cap(struct ath_hw *ah,
173 struct ieee80211_sta_ht_cap *ht_info)
174{
175 struct ath_common *common = ath9k_hw_common(ah);
176 u8 tx_streams, rx_streams;
177 int i, max_streams;
178
179 ht_info->ht_supported = true;
180 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
181 IEEE80211_HT_CAP_SM_PS |
182 IEEE80211_HT_CAP_SGI_40 |
183 IEEE80211_HT_CAP_DSSSCCK40;
184
185 if (ah->caps.hw_caps & ATH9K_HW_CAP_LDPC)
186 ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING;
187
188 if (ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
189 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
190
191 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
192 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
193
194 if (AR_SREV_9271(ah) || AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah))
195 max_streams = 1;
196 else if (AR_SREV_9462(ah))
197 max_streams = 2;
198 else if (AR_SREV_9300_20_OR_LATER(ah))
199 max_streams = 3;
200 else
201 max_streams = 2;
202
203 if (AR_SREV_9280_20_OR_LATER(ah)) {
204 if (max_streams >= 2)
205 ht_info->cap |= IEEE80211_HT_CAP_TX_STBC;
206 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
207 }
208
209 /* set up supported mcs set */
210 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
211 tx_streams = ath9k_cmn_count_streams(ah->txchainmask, max_streams);
212 rx_streams = ath9k_cmn_count_streams(ah->rxchainmask, max_streams);
213
214 ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n",
215 tx_streams, rx_streams);
216
217 if (tx_streams != rx_streams) {
218 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
219 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
220 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
221 }
222
223 for (i = 0; i < rx_streams; i++)
224 ht_info->mcs.rx_mask[i] = 0xff;
225
226 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
227}
228EXPORT_SYMBOL(ath9k_cmn_setup_ht_cap);
229
230void ath9k_cmn_reload_chainmask(struct ath_hw *ah)
231{
232 struct ath_common *common = ath9k_hw_common(ah);
233
234 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_HT))
235 return;
236
237 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
238 ath9k_cmn_setup_ht_cap(ah,
239 &common->sbands[NL80211_BAND_2GHZ].ht_cap);
240 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
241 ath9k_cmn_setup_ht_cap(ah,
242 &common->sbands[NL80211_BAND_5GHZ].ht_cap);
243}
244EXPORT_SYMBOL(ath9k_cmn_reload_chainmask);