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1/*
2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
3 * Copyright (c) 2014, I2SE GmbH
4 *
5 * Permission to use, copy, modify, and/or distribute this software
6 * for any purpose with or without fee is hereby granted, provided
7 * that the above copyright notice and this permission notice appear
8 * in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20/* This module implements the Qualcomm Atheros SPI protocol for
21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI
22 * serial converter;
23 */
24
25#include <linux/errno.h>
26#include <linux/etherdevice.h>
27#include <linux/if_arp.h>
28#include <linux/if_ether.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/jiffies.h>
32#include <linux/kernel.h>
33#include <linux/kthread.h>
34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/netdevice.h>
37#include <linux/of.h>
38#include <linux/of_device.h>
39#include <linux/of_net.h>
40#include <linux/sched.h>
41#include <linux/skbuff.h>
42#include <linux/spi/spi.h>
43#include <linux/types.h>
44
45#include "qca_7k.h"
46#include "qca_7k_common.h"
47#include "qca_debug.h"
48#include "qca_spi.h"
49
50#define MAX_DMA_BURST_LEN 5000
51
52/* Modules parameters */
53#define QCASPI_CLK_SPEED_MIN 1000000
54#define QCASPI_CLK_SPEED_MAX 16000000
55#define QCASPI_CLK_SPEED 8000000
56static int qcaspi_clkspeed;
57module_param(qcaspi_clkspeed, int, 0);
58MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
59
60#define QCASPI_BURST_LEN_MIN 1
61#define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN
62static int qcaspi_burst_len = MAX_DMA_BURST_LEN;
63module_param(qcaspi_burst_len, int, 0);
64MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
65
66#define QCASPI_PLUGGABLE_MIN 0
67#define QCASPI_PLUGGABLE_MAX 1
68static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN;
69module_param(qcaspi_pluggable, int, 0);
70MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no).");
71
72#define QCASPI_WRITE_VERIFY_MIN 0
73#define QCASPI_WRITE_VERIFY_MAX 3
74static int wr_verify = QCASPI_WRITE_VERIFY_MIN;
75module_param(wr_verify, int, 0);
76MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3.");
77
78#define QCASPI_TX_TIMEOUT (1 * HZ)
79#define QCASPI_QCA7K_REBOOT_TIME_MS 1000
80
81static void
82start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause)
83{
84 *intr_cause = 0;
85
86 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
87 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause);
88 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause);
89}
90
91static void
92end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause)
93{
94 u16 intr_enable = (SPI_INT_CPU_ON |
95 SPI_INT_PKT_AVLBL |
96 SPI_INT_RDBUF_ERR |
97 SPI_INT_WRBUF_ERR);
98
99 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0);
100 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify);
101 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause);
102}
103
104static u32
105qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len)
106{
107 __be16 cmd;
108 struct spi_message msg;
109 struct spi_transfer transfer[2];
110 int ret;
111
112 memset(&transfer, 0, sizeof(transfer));
113 spi_message_init(&msg);
114
115 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
116 transfer[0].tx_buf = &cmd;
117 transfer[0].len = QCASPI_CMD_LEN;
118 transfer[1].tx_buf = src;
119 transfer[1].len = len;
120
121 spi_message_add_tail(&transfer[0], &msg);
122 spi_message_add_tail(&transfer[1], &msg);
123 ret = spi_sync(qca->spi_dev, &msg);
124
125 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
126 qcaspi_spi_error(qca);
127 return 0;
128 }
129
130 return len;
131}
132
133static u32
134qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len)
135{
136 struct spi_message msg;
137 struct spi_transfer transfer;
138 int ret;
139
140 memset(&transfer, 0, sizeof(transfer));
141 spi_message_init(&msg);
142
143 transfer.tx_buf = src;
144 transfer.len = len;
145
146 spi_message_add_tail(&transfer, &msg);
147 ret = spi_sync(qca->spi_dev, &msg);
148
149 if (ret || (msg.actual_length != len)) {
150 qcaspi_spi_error(qca);
151 return 0;
152 }
153
154 return len;
155}
156
157static u32
158qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len)
159{
160 struct spi_message msg;
161 __be16 cmd;
162 struct spi_transfer transfer[2];
163 int ret;
164
165 memset(&transfer, 0, sizeof(transfer));
166 spi_message_init(&msg);
167
168 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
169 transfer[0].tx_buf = &cmd;
170 transfer[0].len = QCASPI_CMD_LEN;
171 transfer[1].rx_buf = dst;
172 transfer[1].len = len;
173
174 spi_message_add_tail(&transfer[0], &msg);
175 spi_message_add_tail(&transfer[1], &msg);
176 ret = spi_sync(qca->spi_dev, &msg);
177
178 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
179 qcaspi_spi_error(qca);
180 return 0;
181 }
182
183 return len;
184}
185
186static u32
187qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len)
188{
189 struct spi_message msg;
190 struct spi_transfer transfer;
191 int ret;
192
193 memset(&transfer, 0, sizeof(transfer));
194 spi_message_init(&msg);
195
196 transfer.rx_buf = dst;
197 transfer.len = len;
198
199 spi_message_add_tail(&transfer, &msg);
200 ret = spi_sync(qca->spi_dev, &msg);
201
202 if (ret || (msg.actual_length != len)) {
203 qcaspi_spi_error(qca);
204 return 0;
205 }
206
207 return len;
208}
209
210static int
211qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)
212{
213 __be16 tx_data;
214 struct spi_message msg;
215 struct spi_transfer transfer;
216 int ret;
217
218 memset(&transfer, 0, sizeof(transfer));
219
220 spi_message_init(&msg);
221
222 tx_data = cpu_to_be16(cmd);
223 transfer.len = sizeof(cmd);
224 transfer.tx_buf = &tx_data;
225 spi_message_add_tail(&transfer, &msg);
226
227 ret = spi_sync(qca->spi_dev, &msg);
228
229 if (!ret)
230 ret = msg.status;
231
232 if (ret)
233 qcaspi_spi_error(qca);
234
235 return ret;
236}
237
238static int
239qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb)
240{
241 u32 count;
242 u32 written;
243 u32 offset;
244 u32 len;
245
246 len = skb->len;
247
248 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify);
249 if (qca->legacy_mode)
250 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
251
252 offset = 0;
253 while (len) {
254 count = len;
255 if (count > qca->burst_len)
256 count = qca->burst_len;
257
258 if (qca->legacy_mode) {
259 written = qcaspi_write_legacy(qca,
260 skb->data + offset,
261 count);
262 } else {
263 written = qcaspi_write_burst(qca,
264 skb->data + offset,
265 count);
266 }
267
268 if (written != count)
269 return -1;
270
271 offset += count;
272 len -= count;
273 }
274
275 return 0;
276}
277
278static int
279qcaspi_transmit(struct qcaspi *qca)
280{
281 struct net_device_stats *n_stats = &qca->net_dev->stats;
282 u16 available = 0;
283 u32 pkt_len;
284 u16 new_head;
285 u16 packets = 0;
286
287 if (qca->txr.skb[qca->txr.head] == NULL)
288 return 0;
289
290 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available);
291
292 if (available > QCASPI_HW_BUF_LEN) {
293 /* This could only happen by interferences on the SPI line.
294 * So retry later ...
295 */
296 qca->stats.buf_avail_err++;
297 return -1;
298 }
299
300 while (qca->txr.skb[qca->txr.head]) {
301 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN;
302
303 if (available < pkt_len) {
304 if (packets == 0)
305 qca->stats.write_buf_miss++;
306 break;
307 }
308
309 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) {
310 qca->stats.write_err++;
311 return -1;
312 }
313
314 packets++;
315 n_stats->tx_packets++;
316 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len;
317 available -= pkt_len;
318
319 /* remove the skb from the queue */
320 /* XXX After inconsistent lock states netif_tx_lock()
321 * has been replaced by netif_tx_lock_bh() and so on.
322 */
323 netif_tx_lock_bh(qca->net_dev);
324 dev_kfree_skb(qca->txr.skb[qca->txr.head]);
325 qca->txr.skb[qca->txr.head] = NULL;
326 qca->txr.size -= pkt_len;
327 new_head = qca->txr.head + 1;
328 if (new_head >= qca->txr.count)
329 new_head = 0;
330 qca->txr.head = new_head;
331 if (netif_queue_stopped(qca->net_dev))
332 netif_wake_queue(qca->net_dev);
333 netif_tx_unlock_bh(qca->net_dev);
334 }
335
336 return 0;
337}
338
339static int
340qcaspi_receive(struct qcaspi *qca)
341{
342 struct net_device *net_dev = qca->net_dev;
343 struct net_device_stats *n_stats = &net_dev->stats;
344 u16 available = 0;
345 u32 bytes_read;
346 u8 *cp;
347
348 /* Allocate rx SKB if we don't have one available. */
349 if (!qca->rx_skb) {
350 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
351 net_dev->mtu +
352 VLAN_ETH_HLEN);
353 if (!qca->rx_skb) {
354 netdev_dbg(net_dev, "out of RX resources\n");
355 qca->stats.out_of_mem++;
356 return -1;
357 }
358 }
359
360 /* Read the packet size. */
361 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available);
362
363 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n",
364 available);
365
366 if (available > QCASPI_HW_BUF_LEN + QCASPI_HW_PKT_LEN) {
367 /* This could only happen by interferences on the SPI line.
368 * So retry later ...
369 */
370 qca->stats.buf_avail_err++;
371 return -1;
372 } else if (available == 0) {
373 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n");
374 return -1;
375 }
376
377 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify);
378
379 if (qca->legacy_mode)
380 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
381
382 while (available) {
383 u32 count = available;
384
385 if (count > qca->burst_len)
386 count = qca->burst_len;
387
388 if (qca->legacy_mode) {
389 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer,
390 count);
391 } else {
392 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer,
393 count);
394 }
395
396 netdev_dbg(net_dev, "available: %d, byte read: %d\n",
397 available, bytes_read);
398
399 if (bytes_read) {
400 available -= bytes_read;
401 } else {
402 qca->stats.read_err++;
403 return -1;
404 }
405
406 cp = qca->rx_buffer;
407
408 while ((bytes_read--) && (qca->rx_skb)) {
409 s32 retcode;
410
411 retcode = qcafrm_fsm_decode(&qca->frm_handle,
412 qca->rx_skb->data,
413 skb_tailroom(qca->rx_skb),
414 *cp);
415 cp++;
416 switch (retcode) {
417 case QCAFRM_GATHER:
418 case QCAFRM_NOHEAD:
419 break;
420 case QCAFRM_NOTAIL:
421 netdev_dbg(net_dev, "no RX tail\n");
422 n_stats->rx_errors++;
423 n_stats->rx_dropped++;
424 break;
425 case QCAFRM_INVLEN:
426 netdev_dbg(net_dev, "invalid RX length\n");
427 n_stats->rx_errors++;
428 n_stats->rx_dropped++;
429 break;
430 default:
431 qca->rx_skb->dev = qca->net_dev;
432 n_stats->rx_packets++;
433 n_stats->rx_bytes += retcode;
434 skb_put(qca->rx_skb, retcode);
435 qca->rx_skb->protocol = eth_type_trans(
436 qca->rx_skb, qca->rx_skb->dev);
437 qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY;
438 netif_rx_ni(qca->rx_skb);
439 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
440 net_dev->mtu + VLAN_ETH_HLEN);
441 if (!qca->rx_skb) {
442 netdev_dbg(net_dev, "out of RX resources\n");
443 n_stats->rx_errors++;
444 qca->stats.out_of_mem++;
445 break;
446 }
447 }
448 }
449 }
450
451 return 0;
452}
453
454/* Check that tx ring stores only so much bytes
455 * that fit into the internal QCA buffer.
456 */
457
458static int
459qcaspi_tx_ring_has_space(struct tx_ring *txr)
460{
461 if (txr->skb[txr->tail])
462 return 0;
463
464 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0;
465}
466
467/* Flush the tx ring. This function is only safe to
468 * call from the qcaspi_spi_thread.
469 */
470
471static void
472qcaspi_flush_tx_ring(struct qcaspi *qca)
473{
474 int i;
475
476 /* XXX After inconsistent lock states netif_tx_lock()
477 * has been replaced by netif_tx_lock_bh() and so on.
478 */
479 netif_tx_lock_bh(qca->net_dev);
480 for (i = 0; i < TX_RING_MAX_LEN; i++) {
481 if (qca->txr.skb[i]) {
482 dev_kfree_skb(qca->txr.skb[i]);
483 qca->txr.skb[i] = NULL;
484 qca->net_dev->stats.tx_dropped++;
485 }
486 }
487 qca->txr.tail = 0;
488 qca->txr.head = 0;
489 qca->txr.size = 0;
490 netif_tx_unlock_bh(qca->net_dev);
491}
492
493static void
494qcaspi_qca7k_sync(struct qcaspi *qca, int event)
495{
496 u16 signature = 0;
497 u16 spi_config;
498 u16 wrbuf_space = 0;
499
500 if (event == QCASPI_EVENT_CPUON) {
501 /* Read signature twice, if not valid
502 * go back to unknown state.
503 */
504 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
505 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
506 if (signature != QCASPI_GOOD_SIGNATURE) {
507 qca->sync = QCASPI_SYNC_UNKNOWN;
508 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n");
509 } else {
510 /* ensure that the WRBUF is empty */
511 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA,
512 &wrbuf_space);
513 if (wrbuf_space != QCASPI_HW_BUF_LEN) {
514 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n");
515 qca->sync = QCASPI_SYNC_UNKNOWN;
516 } else {
517 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n");
518 qca->sync = QCASPI_SYNC_READY;
519 return;
520 }
521 }
522 }
523
524 switch (qca->sync) {
525 case QCASPI_SYNC_READY:
526 /* Read signature, if not valid go to unknown state. */
527 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
528 if (signature != QCASPI_GOOD_SIGNATURE) {
529 qca->sync = QCASPI_SYNC_UNKNOWN;
530 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n");
531 /* don't reset right away */
532 return;
533 }
534 break;
535 case QCASPI_SYNC_UNKNOWN:
536 /* Read signature, if not valid stay in unknown state */
537 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
538 if (signature != QCASPI_GOOD_SIGNATURE) {
539 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n");
540 return;
541 }
542
543 /* TODO: use GPIO to reset QCA7000 in legacy mode*/
544 netdev_dbg(qca->net_dev, "sync: resetting device.\n");
545 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config);
546 spi_config |= QCASPI_SLAVE_RESET_BIT;
547 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0);
548
549 qca->sync = QCASPI_SYNC_RESET;
550 qca->stats.trig_reset++;
551 qca->reset_count = 0;
552 break;
553 case QCASPI_SYNC_RESET:
554 qca->reset_count++;
555 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n",
556 qca->reset_count);
557 if (qca->reset_count >= QCASPI_RESET_TIMEOUT) {
558 /* reset did not seem to take place, try again */
559 qca->sync = QCASPI_SYNC_UNKNOWN;
560 qca->stats.reset_timeout++;
561 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n");
562 }
563 break;
564 }
565}
566
567static int
568qcaspi_spi_thread(void *data)
569{
570 struct qcaspi *qca = data;
571 u16 intr_cause = 0;
572
573 netdev_info(qca->net_dev, "SPI thread created\n");
574 while (!kthread_should_stop()) {
575 set_current_state(TASK_INTERRUPTIBLE);
576 if ((qca->intr_req == qca->intr_svc) &&
577 (qca->txr.skb[qca->txr.head] == NULL) &&
578 (qca->sync == QCASPI_SYNC_READY))
579 schedule();
580
581 set_current_state(TASK_RUNNING);
582
583 netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n",
584 qca->intr_req - qca->intr_svc,
585 qca->txr.skb[qca->txr.head]);
586
587 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE);
588
589 if (qca->sync != QCASPI_SYNC_READY) {
590 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n",
591 (unsigned int)qca->sync);
592 netif_stop_queue(qca->net_dev);
593 netif_carrier_off(qca->net_dev);
594 qcaspi_flush_tx_ring(qca);
595 msleep(QCASPI_QCA7K_REBOOT_TIME_MS);
596 }
597
598 if (qca->intr_svc != qca->intr_req) {
599 qca->intr_svc = qca->intr_req;
600 start_spi_intr_handling(qca, &intr_cause);
601
602 if (intr_cause & SPI_INT_CPU_ON) {
603 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON);
604
605 /* not synced. */
606 if (qca->sync != QCASPI_SYNC_READY)
607 continue;
608
609 qca->stats.device_reset++;
610 netif_wake_queue(qca->net_dev);
611 netif_carrier_on(qca->net_dev);
612 }
613
614 if (intr_cause & SPI_INT_RDBUF_ERR) {
615 /* restart sync */
616 netdev_dbg(qca->net_dev, "===> rdbuf error!\n");
617 qca->stats.read_buf_err++;
618 qca->sync = QCASPI_SYNC_UNKNOWN;
619 continue;
620 }
621
622 if (intr_cause & SPI_INT_WRBUF_ERR) {
623 /* restart sync */
624 netdev_dbg(qca->net_dev, "===> wrbuf error!\n");
625 qca->stats.write_buf_err++;
626 qca->sync = QCASPI_SYNC_UNKNOWN;
627 continue;
628 }
629
630 /* can only handle other interrupts
631 * if sync has occurred
632 */
633 if (qca->sync == QCASPI_SYNC_READY) {
634 if (intr_cause & SPI_INT_PKT_AVLBL)
635 qcaspi_receive(qca);
636 }
637
638 end_spi_intr_handling(qca, intr_cause);
639 }
640
641 if (qca->sync == QCASPI_SYNC_READY)
642 qcaspi_transmit(qca);
643 }
644 set_current_state(TASK_RUNNING);
645 netdev_info(qca->net_dev, "SPI thread exit\n");
646
647 return 0;
648}
649
650static irqreturn_t
651qcaspi_intr_handler(int irq, void *data)
652{
653 struct qcaspi *qca = data;
654
655 qca->intr_req++;
656 if (qca->spi_thread &&
657 qca->spi_thread->state != TASK_RUNNING)
658 wake_up_process(qca->spi_thread);
659
660 return IRQ_HANDLED;
661}
662
663static int
664qcaspi_netdev_open(struct net_device *dev)
665{
666 struct qcaspi *qca = netdev_priv(dev);
667 int ret = 0;
668
669 if (!qca)
670 return -EINVAL;
671
672 qca->intr_req = 1;
673 qca->intr_svc = 0;
674 qca->sync = QCASPI_SYNC_UNKNOWN;
675 qcafrm_fsm_init_spi(&qca->frm_handle);
676
677 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread,
678 qca, "%s", dev->name);
679
680 if (IS_ERR(qca->spi_thread)) {
681 netdev_err(dev, "%s: unable to start kernel thread.\n",
682 QCASPI_DRV_NAME);
683 return PTR_ERR(qca->spi_thread);
684 }
685
686 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0,
687 dev->name, qca);
688 if (ret) {
689 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n",
690 QCASPI_DRV_NAME, qca->spi_dev->irq, ret);
691 kthread_stop(qca->spi_thread);
692 return ret;
693 }
694
695 /* SPI thread takes care of TX queue */
696
697 return 0;
698}
699
700static int
701qcaspi_netdev_close(struct net_device *dev)
702{
703 struct qcaspi *qca = netdev_priv(dev);
704
705 netif_stop_queue(dev);
706
707 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
708 free_irq(qca->spi_dev->irq, qca);
709
710 kthread_stop(qca->spi_thread);
711 qca->spi_thread = NULL;
712 qcaspi_flush_tx_ring(qca);
713
714 return 0;
715}
716
717static netdev_tx_t
718qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev)
719{
720 u32 frame_len;
721 u8 *ptmp;
722 struct qcaspi *qca = netdev_priv(dev);
723 u16 new_tail;
724 struct sk_buff *tskb;
725 u8 pad_len = 0;
726
727 if (skb->len < QCAFRM_MIN_LEN)
728 pad_len = QCAFRM_MIN_LEN - skb->len;
729
730 if (qca->txr.skb[qca->txr.tail]) {
731 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n");
732 netif_stop_queue(qca->net_dev);
733 qca->stats.ring_full++;
734 return NETDEV_TX_BUSY;
735 }
736
737 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) ||
738 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) {
739 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN,
740 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC);
741 if (!tskb) {
742 qca->stats.out_of_mem++;
743 return NETDEV_TX_BUSY;
744 }
745 dev_kfree_skb(skb);
746 skb = tskb;
747 }
748
749 frame_len = skb->len + pad_len;
750
751 ptmp = skb_push(skb, QCAFRM_HEADER_LEN);
752 qcafrm_create_header(ptmp, frame_len);
753
754 if (pad_len) {
755 ptmp = skb_put_zero(skb, pad_len);
756 }
757
758 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN);
759 qcafrm_create_footer(ptmp);
760
761 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n",
762 skb->len);
763
764 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN;
765
766 new_tail = qca->txr.tail + 1;
767 if (new_tail >= qca->txr.count)
768 new_tail = 0;
769
770 qca->txr.skb[qca->txr.tail] = skb;
771 qca->txr.tail = new_tail;
772
773 if (!qcaspi_tx_ring_has_space(&qca->txr)) {
774 netif_stop_queue(qca->net_dev);
775 qca->stats.ring_full++;
776 }
777
778 netif_trans_update(dev);
779
780 if (qca->spi_thread &&
781 qca->spi_thread->state != TASK_RUNNING)
782 wake_up_process(qca->spi_thread);
783
784 return NETDEV_TX_OK;
785}
786
787static void
788qcaspi_netdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
789{
790 struct qcaspi *qca = netdev_priv(dev);
791
792 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n",
793 jiffies, jiffies - dev_trans_start(dev));
794 qca->net_dev->stats.tx_errors++;
795 /* Trigger tx queue flush and QCA7000 reset */
796 qca->sync = QCASPI_SYNC_UNKNOWN;
797
798 if (qca->spi_thread)
799 wake_up_process(qca->spi_thread);
800}
801
802static int
803qcaspi_netdev_init(struct net_device *dev)
804{
805 struct qcaspi *qca = netdev_priv(dev);
806
807 dev->mtu = QCAFRM_MAX_MTU;
808 dev->type = ARPHRD_ETHER;
809 qca->clkspeed = qcaspi_clkspeed;
810 qca->burst_len = qcaspi_burst_len;
811 qca->spi_thread = NULL;
812 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN +
813 QCAFRM_FOOTER_LEN + 4) * 4;
814
815 memset(&qca->stats, 0, sizeof(struct qcaspi_stats));
816
817 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL);
818 if (!qca->rx_buffer)
819 return -ENOBUFS;
820
821 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu +
822 VLAN_ETH_HLEN);
823 if (!qca->rx_skb) {
824 kfree(qca->rx_buffer);
825 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n");
826 return -ENOBUFS;
827 }
828
829 return 0;
830}
831
832static void
833qcaspi_netdev_uninit(struct net_device *dev)
834{
835 struct qcaspi *qca = netdev_priv(dev);
836
837 kfree(qca->rx_buffer);
838 qca->buffer_size = 0;
839 dev_kfree_skb(qca->rx_skb);
840}
841
842static const struct net_device_ops qcaspi_netdev_ops = {
843 .ndo_init = qcaspi_netdev_init,
844 .ndo_uninit = qcaspi_netdev_uninit,
845 .ndo_open = qcaspi_netdev_open,
846 .ndo_stop = qcaspi_netdev_close,
847 .ndo_start_xmit = qcaspi_netdev_xmit,
848 .ndo_set_mac_address = eth_mac_addr,
849 .ndo_tx_timeout = qcaspi_netdev_tx_timeout,
850 .ndo_validate_addr = eth_validate_addr,
851};
852
853static void
854qcaspi_netdev_setup(struct net_device *dev)
855{
856 struct qcaspi *qca = NULL;
857
858 dev->netdev_ops = &qcaspi_netdev_ops;
859 qcaspi_set_ethtool_ops(dev);
860 dev->watchdog_timeo = QCASPI_TX_TIMEOUT;
861 dev->priv_flags &= ~IFF_TX_SKB_SHARING;
862 dev->tx_queue_len = 100;
863
864 /* MTU range: 46 - 1500 */
865 dev->min_mtu = QCAFRM_MIN_MTU;
866 dev->max_mtu = QCAFRM_MAX_MTU;
867
868 qca = netdev_priv(dev);
869 memset(qca, 0, sizeof(struct qcaspi));
870
871 memset(&qca->txr, 0, sizeof(qca->txr));
872 qca->txr.count = TX_RING_MAX_LEN;
873}
874
875static const struct of_device_id qca_spi_of_match[] = {
876 { .compatible = "qca,qca7000" },
877 { /* sentinel */ }
878};
879MODULE_DEVICE_TABLE(of, qca_spi_of_match);
880
881static int
882qca_spi_probe(struct spi_device *spi)
883{
884 struct qcaspi *qca = NULL;
885 struct net_device *qcaspi_devs = NULL;
886 u8 legacy_mode = 0;
887 u16 signature;
888 const char *mac;
889
890 if (!spi->dev.of_node) {
891 dev_err(&spi->dev, "Missing device tree\n");
892 return -EINVAL;
893 }
894
895 legacy_mode = of_property_read_bool(spi->dev.of_node,
896 "qca,legacy-mode");
897
898 if (qcaspi_clkspeed == 0) {
899 if (spi->max_speed_hz)
900 qcaspi_clkspeed = spi->max_speed_hz;
901 else
902 qcaspi_clkspeed = QCASPI_CLK_SPEED;
903 }
904
905 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) ||
906 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) {
907 dev_err(&spi->dev, "Invalid clkspeed: %d\n",
908 qcaspi_clkspeed);
909 return -EINVAL;
910 }
911
912 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) ||
913 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) {
914 dev_err(&spi->dev, "Invalid burst len: %d\n",
915 qcaspi_burst_len);
916 return -EINVAL;
917 }
918
919 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) ||
920 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) {
921 dev_err(&spi->dev, "Invalid pluggable: %d\n",
922 qcaspi_pluggable);
923 return -EINVAL;
924 }
925
926 if (wr_verify < QCASPI_WRITE_VERIFY_MIN ||
927 wr_verify > QCASPI_WRITE_VERIFY_MAX) {
928 dev_err(&spi->dev, "Invalid write verify: %d\n",
929 wr_verify);
930 return -EINVAL;
931 }
932
933 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n",
934 QCASPI_DRV_VERSION,
935 qcaspi_clkspeed,
936 qcaspi_burst_len,
937 qcaspi_pluggable);
938
939 spi->mode = SPI_MODE_3;
940 spi->max_speed_hz = qcaspi_clkspeed;
941 if (spi_setup(spi) < 0) {
942 dev_err(&spi->dev, "Unable to setup SPI device\n");
943 return -EFAULT;
944 }
945
946 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi));
947 if (!qcaspi_devs)
948 return -ENOMEM;
949
950 qcaspi_netdev_setup(qcaspi_devs);
951 SET_NETDEV_DEV(qcaspi_devs, &spi->dev);
952
953 qca = netdev_priv(qcaspi_devs);
954 if (!qca) {
955 free_netdev(qcaspi_devs);
956 dev_err(&spi->dev, "Fail to retrieve private structure\n");
957 return -ENOMEM;
958 }
959 qca->net_dev = qcaspi_devs;
960 qca->spi_dev = spi;
961 qca->legacy_mode = legacy_mode;
962
963 spi_set_drvdata(spi, qcaspi_devs);
964
965 mac = of_get_mac_address(spi->dev.of_node);
966
967 if (!IS_ERR(mac))
968 ether_addr_copy(qca->net_dev->dev_addr, mac);
969
970 if (!is_valid_ether_addr(qca->net_dev->dev_addr)) {
971 eth_hw_addr_random(qca->net_dev);
972 dev_info(&spi->dev, "Using random MAC address: %pM\n",
973 qca->net_dev->dev_addr);
974 }
975
976 netif_carrier_off(qca->net_dev);
977
978 if (!qcaspi_pluggable) {
979 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
980 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
981
982 if (signature != QCASPI_GOOD_SIGNATURE) {
983 dev_err(&spi->dev, "Invalid signature (0x%04X)\n",
984 signature);
985 free_netdev(qcaspi_devs);
986 return -EFAULT;
987 }
988 }
989
990 if (register_netdev(qcaspi_devs)) {
991 dev_err(&spi->dev, "Unable to register net device %s\n",
992 qcaspi_devs->name);
993 free_netdev(qcaspi_devs);
994 return -EFAULT;
995 }
996
997 qcaspi_init_device_debugfs(qca);
998
999 return 0;
1000}
1001
1002static int
1003qca_spi_remove(struct spi_device *spi)
1004{
1005 struct net_device *qcaspi_devs = spi_get_drvdata(spi);
1006 struct qcaspi *qca = netdev_priv(qcaspi_devs);
1007
1008 qcaspi_remove_device_debugfs(qca);
1009
1010 unregister_netdev(qcaspi_devs);
1011 free_netdev(qcaspi_devs);
1012
1013 return 0;
1014}
1015
1016static const struct spi_device_id qca_spi_id[] = {
1017 { "qca7000", 0 },
1018 { /* sentinel */ }
1019};
1020MODULE_DEVICE_TABLE(spi, qca_spi_id);
1021
1022static struct spi_driver qca_spi_driver = {
1023 .driver = {
1024 .name = QCASPI_DRV_NAME,
1025 .of_match_table = qca_spi_of_match,
1026 },
1027 .id_table = qca_spi_id,
1028 .probe = qca_spi_probe,
1029 .remove = qca_spi_remove,
1030};
1031module_spi_driver(qca_spi_driver);
1032
1033MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver");
1034MODULE_AUTHOR("Qualcomm Atheros Communications");
1035MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
1036MODULE_LICENSE("Dual BSD/GPL");
1037MODULE_VERSION(QCASPI_DRV_VERSION);