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  1# SPDX-License-Identifier: GPL-2.0-only
  2
  3config DRM_MSM
  4	tristate "MSM DRM"
  5	depends on DRM
  6	depends on ARCH_QCOM || SOC_IMX5 || (ARM && COMPILE_TEST)
  7	depends on OF && COMMON_CLK
  8	depends on MMU
  9	depends on INTERCONNECT || !INTERCONNECT
 10	depends on QCOM_OCMEM || QCOM_OCMEM=n
 11	select QCOM_MDT_LOADER if ARCH_QCOM
 12	select REGULATOR
 13	select DRM_KMS_HELPER
 14	select DRM_PANEL
 15	select SHMEM
 16	select TMPFS
 17	select QCOM_SCM if ARCH_QCOM
 18	select QCOM_COMMAND_DB if ARCH_QCOM
 19	select WANT_DEV_COREDUMP
 20	select SND_SOC_HDMI_CODEC if SND_SOC
 21	select SYNC_FILE
 22	select PM_OPP
 23	help
 24	  DRM/KMS driver for MSM/snapdragon.
 25
 26config DRM_MSM_GPU_STATE
 27	bool
 28	depends on DRM_MSM && (DEBUG_FS || DEV_COREDUMP)
 29	default y
 30
 31config DRM_MSM_REGISTER_LOGGING
 32	bool "MSM DRM register logging"
 33	depends on DRM_MSM
 34	default n
 35	help
 36	  Compile in support for logging register reads/writes in a format
 37	  that can be parsed by envytools demsm tool.  If enabled, register
 38	  logging can be switched on via msm.reglog=y module param.
 39
 40config DRM_MSM_GPU_SUDO
 41	bool "Enable SUDO flag on submits"
 42	depends on DRM_MSM && EXPERT
 43	default n
 44	help
 45	  Enable userspace that has CAP_SYS_RAWIO to submit GPU commands
 46	  that are run from RB instead of IB1.  This essentially gives
 47	  userspace kernel level access, but is useful for firmware
 48	  debugging.
 49
 50	  Only use this if you are a driver developer.  This should *not*
 51	  be enabled for production kernels.  If unsure, say N.
 52
 53config DRM_MSM_HDMI_HDCP
 54	bool "Enable HDMI HDCP support in MSM DRM driver"
 55	depends on DRM_MSM && QCOM_SCM
 56	default y
 57	help
 58	  Choose this option to enable HDCP state machine
 59
 60config DRM_MSM_DSI
 61	bool "Enable DSI support in MSM DRM driver"
 62	depends on DRM_MSM
 63	select DRM_PANEL
 64	select DRM_MIPI_DSI
 65	default y
 66	help
 67	  Choose this option if you have a need for MIPI DSI connector
 68	  support.
 69
 70config DRM_MSM_DSI_PLL
 71	bool "Enable DSI PLL driver in MSM DRM"
 72	depends on DRM_MSM_DSI && COMMON_CLK
 73	default y
 74	help
 75	  Choose this option to enable DSI PLL driver which provides DSI
 76	  source clocks under common clock framework.
 77
 78config DRM_MSM_DSI_28NM_PHY
 79	bool "Enable DSI 28nm PHY driver in MSM DRM"
 80	depends on DRM_MSM_DSI
 81	default y
 82	help
 83	  Choose this option if the 28nm DSI PHY is used on the platform.
 84
 85config DRM_MSM_DSI_20NM_PHY
 86	bool "Enable DSI 20nm PHY driver in MSM DRM"
 87	depends on DRM_MSM_DSI
 88	default y
 89	help
 90	  Choose this option if the 20nm DSI PHY is used on the platform.
 91
 92config DRM_MSM_DSI_28NM_8960_PHY
 93	bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
 94	depends on DRM_MSM_DSI
 95	default y
 96	help
 97	  Choose this option if the 28nm DSI PHY 8960 variant is used on the
 98	  platform.
 99
100config DRM_MSM_DSI_14NM_PHY
101	bool "Enable DSI 14nm PHY driver in MSM DRM (used by MSM8996/APQ8096)"
102	depends on DRM_MSM_DSI
103	default y
104	help
105	  Choose this option if DSI PHY on 8996 is used on the platform.
106
107config DRM_MSM_DSI_10NM_PHY
108	bool "Enable DSI 10nm PHY driver in MSM DRM (used by SDM845)"
109	depends on DRM_MSM_DSI
110	default y
111	help
112	  Choose this option if DSI PHY on SDM845 is used on the platform.