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  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright (C) 2016 BayLibre, SAS
  4 * Author: Neil Armstrong <narmstrong@baylibre.com>
  5 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
  6 * Copyright (C) 2014 Endless Mobile
  7 *
  8 * Written by:
  9 *     Jasper St. Pierre <jstpierre@mecheye.net>
 10 */
 11
 12#include <linux/export.h>
 13#include <linux/of_graph.h>
 14
 15#include <drm/drm_atomic_helper.h>
 16#include <drm/drm_device.h>
 17#include <drm/drm_edid.h>
 18#include <drm/drm_probe_helper.h>
 19#include <drm/drm_print.h>
 20
 21#include "meson_registers.h"
 22#include "meson_vclk.h"
 23#include "meson_venc_cvbs.h"
 24
 25/* HHI VDAC Registers */
 26#define HHI_VDAC_CNTL0		0x2F4 /* 0xbd offset in data sheet */
 27#define HHI_VDAC_CNTL0_G12A	0x2EC /* 0xbd offset in data sheet */
 28#define HHI_VDAC_CNTL1		0x2F8 /* 0xbe offset in data sheet */
 29#define HHI_VDAC_CNTL1_G12A	0x2F0 /* 0xbe offset in data sheet */
 30
 31struct meson_venc_cvbs {
 32	struct drm_encoder	encoder;
 33	struct drm_connector	connector;
 34	struct meson_drm	*priv;
 35};
 36#define encoder_to_meson_venc_cvbs(x) \
 37	container_of(x, struct meson_venc_cvbs, encoder)
 38
 39#define connector_to_meson_venc_cvbs(x) \
 40	container_of(x, struct meson_venc_cvbs, connector)
 41
 42/* Supported Modes */
 43
 44struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = {
 45	{ /* PAL */
 46		.enci = &meson_cvbs_enci_pal,
 47		.mode = {
 48			DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500,
 49				 720, 732, 795, 864, 0, 576, 580, 586, 625, 0,
 50				 DRM_MODE_FLAG_INTERLACE),
 51			.picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3,
 52		},
 53	},
 54	{ /* NTSC */
 55		.enci = &meson_cvbs_enci_ntsc,
 56		.mode = {
 57			DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500,
 58				720, 739, 801, 858, 0, 480, 488, 494, 525, 0,
 59				DRM_MODE_FLAG_INTERLACE),
 60			.picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3,
 61		},
 62	},
 63};
 64
 65static const struct meson_cvbs_mode *
 66meson_cvbs_get_mode(const struct drm_display_mode *req_mode)
 67{
 68	int i;
 69
 70	for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
 71		struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
 72
 73		if (drm_mode_match(req_mode, &meson_mode->mode,
 74				   DRM_MODE_MATCH_TIMINGS |
 75				   DRM_MODE_MATCH_CLOCK |
 76				   DRM_MODE_MATCH_FLAGS |
 77				   DRM_MODE_MATCH_3D_FLAGS))
 78			return meson_mode;
 79	}
 80
 81	return NULL;
 82}
 83
 84/* Connector */
 85
 86static void meson_cvbs_connector_destroy(struct drm_connector *connector)
 87{
 88	drm_connector_cleanup(connector);
 89}
 90
 91static enum drm_connector_status
 92meson_cvbs_connector_detect(struct drm_connector *connector, bool force)
 93{
 94	/* FIXME: Add load-detect or jack-detect if possible */
 95	return connector_status_connected;
 96}
 97
 98static int meson_cvbs_connector_get_modes(struct drm_connector *connector)
 99{
100	struct drm_device *dev = connector->dev;
101	struct drm_display_mode *mode;
102	int i;
103
104	for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
105		struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
106
107		mode = drm_mode_duplicate(dev, &meson_mode->mode);
108		if (!mode) {
109			DRM_ERROR("Failed to create a new display mode\n");
110			return 0;
111		}
112
113		drm_mode_probed_add(connector, mode);
114	}
115
116	return i;
117}
118
119static int meson_cvbs_connector_mode_valid(struct drm_connector *connector,
120					   struct drm_display_mode *mode)
121{
122	/* Validate the modes added in get_modes */
123	return MODE_OK;
124}
125
126static const struct drm_connector_funcs meson_cvbs_connector_funcs = {
127	.detect			= meson_cvbs_connector_detect,
128	.fill_modes		= drm_helper_probe_single_connector_modes,
129	.destroy		= meson_cvbs_connector_destroy,
130	.reset			= drm_atomic_helper_connector_reset,
131	.atomic_duplicate_state	= drm_atomic_helper_connector_duplicate_state,
132	.atomic_destroy_state	= drm_atomic_helper_connector_destroy_state,
133};
134
135static const
136struct drm_connector_helper_funcs meson_cvbs_connector_helper_funcs = {
137	.get_modes	= meson_cvbs_connector_get_modes,
138	.mode_valid	= meson_cvbs_connector_mode_valid,
139};
140
141/* Encoder */
142
143static void meson_venc_cvbs_encoder_destroy(struct drm_encoder *encoder)
144{
145	drm_encoder_cleanup(encoder);
146}
147
148static const struct drm_encoder_funcs meson_venc_cvbs_encoder_funcs = {
149	.destroy        = meson_venc_cvbs_encoder_destroy,
150};
151
152static int meson_venc_cvbs_encoder_atomic_check(struct drm_encoder *encoder,
153					struct drm_crtc_state *crtc_state,
154					struct drm_connector_state *conn_state)
155{
156	if (meson_cvbs_get_mode(&crtc_state->mode))
157		return 0;
158
159	return -EINVAL;
160}
161
162static void meson_venc_cvbs_encoder_disable(struct drm_encoder *encoder)
163{
164	struct meson_venc_cvbs *meson_venc_cvbs =
165					encoder_to_meson_venc_cvbs(encoder);
166	struct meson_drm *priv = meson_venc_cvbs->priv;
167
168	/* Disable CVBS VDAC */
169	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
170		regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0);
171		regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 0);
172	} else {
173		regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0);
174		regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8);
175	}
176}
177
178static void meson_venc_cvbs_encoder_enable(struct drm_encoder *encoder)
179{
180	struct meson_venc_cvbs *meson_venc_cvbs =
181					encoder_to_meson_venc_cvbs(encoder);
182	struct meson_drm *priv = meson_venc_cvbs->priv;
183
184	/* VDAC0 source is not from ATV */
185	writel_bits_relaxed(VENC_VDAC_SEL_ATV_DMD, 0,
186			    priv->io_base + _REG(VENC_VDAC_DACSEL0));
187
188	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
189		regmap_write(priv->hhi, HHI_VDAC_CNTL0, 1);
190		regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0);
191	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
192		 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
193		regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0xf0001);
194		regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0);
195	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
196		regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0x906001);
197		regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 0);
198	}
199}
200
201static void meson_venc_cvbs_encoder_mode_set(struct drm_encoder *encoder,
202				   struct drm_display_mode *mode,
203				   struct drm_display_mode *adjusted_mode)
204{
205	const struct meson_cvbs_mode *meson_mode = meson_cvbs_get_mode(mode);
206	struct meson_venc_cvbs *meson_venc_cvbs =
207					encoder_to_meson_venc_cvbs(encoder);
208	struct meson_drm *priv = meson_venc_cvbs->priv;
209
210	if (meson_mode) {
211		meson_venci_cvbs_mode_set(priv, meson_mode->enci);
212
213		/* Setup 27MHz vclk2 for ENCI and VDAC */
214		meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS,
215				 MESON_VCLK_CVBS, MESON_VCLK_CVBS,
216				 MESON_VCLK_CVBS, MESON_VCLK_CVBS,
217				 true);
218	}
219}
220
221static const struct drm_encoder_helper_funcs
222				meson_venc_cvbs_encoder_helper_funcs = {
223	.atomic_check	= meson_venc_cvbs_encoder_atomic_check,
224	.disable	= meson_venc_cvbs_encoder_disable,
225	.enable		= meson_venc_cvbs_encoder_enable,
226	.mode_set	= meson_venc_cvbs_encoder_mode_set,
227};
228
229static bool meson_venc_cvbs_connector_is_available(struct meson_drm *priv)
230{
231	struct device_node *remote;
232
233	remote = of_graph_get_remote_node(priv->dev->of_node, 0, 0);
234	if (!remote)
235		return false;
236
237	of_node_put(remote);
238	return true;
239}
240
241int meson_venc_cvbs_create(struct meson_drm *priv)
242{
243	struct drm_device *drm = priv->drm;
244	struct meson_venc_cvbs *meson_venc_cvbs;
245	struct drm_connector *connector;
246	struct drm_encoder *encoder;
247	int ret;
248
249	if (!meson_venc_cvbs_connector_is_available(priv)) {
250		dev_info(drm->dev, "CVBS Output connector not available\n");
251		return 0;
252	}
253
254	meson_venc_cvbs = devm_kzalloc(priv->dev, sizeof(*meson_venc_cvbs),
255				       GFP_KERNEL);
256	if (!meson_venc_cvbs)
257		return -ENOMEM;
258
259	meson_venc_cvbs->priv = priv;
260	encoder = &meson_venc_cvbs->encoder;
261	connector = &meson_venc_cvbs->connector;
262
263	/* Connector */
264
265	drm_connector_helper_add(connector,
266				 &meson_cvbs_connector_helper_funcs);
267
268	ret = drm_connector_init(drm, connector, &meson_cvbs_connector_funcs,
269				 DRM_MODE_CONNECTOR_Composite);
270	if (ret) {
271		dev_err(priv->dev, "Failed to init CVBS connector\n");
272		return ret;
273	}
274
275	connector->interlace_allowed = 1;
276
277	/* Encoder */
278
279	drm_encoder_helper_add(encoder, &meson_venc_cvbs_encoder_helper_funcs);
280
281	ret = drm_encoder_init(drm, encoder, &meson_venc_cvbs_encoder_funcs,
282			       DRM_MODE_ENCODER_TVDAC, "meson_venc_cvbs");
283	if (ret) {
284		dev_err(priv->dev, "Failed to init CVBS encoder\n");
285		return ret;
286	}
287
288	encoder->possible_crtcs = BIT(0);
289
290	drm_connector_attach_encoder(connector, encoder);
291
292	return 0;
293}