1/*
  2 * Copyright © 2015 Intel Corporation
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice (including the next
 12 * paragraph) shall be included in all copies or substantial portions of the
 13 * Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 21 * IN THE SOFTWARE.
 22 *
 23 */
 24
 25#include "intel_display_types.h"
 26#include "intel_dp_aux_backlight.h"
 27
 28static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
 29{
 30	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 31	u8 reg_val = 0;
 32
 33	/* Early return when display use other mechanism to enable backlight. */
 34	if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP))
 35		return;
 36
 37	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
 38			      &reg_val) < 0) {
 39		drm_dbg_kms(&i915->drm, "Failed to read DPCD register 0x%x\n",
 40			    DP_EDP_DISPLAY_CONTROL_REGISTER);
 41		return;
 42	}
 43	if (enable)
 44		reg_val |= DP_EDP_BACKLIGHT_ENABLE;
 45	else
 46		reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE);
 47
 48	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
 49			       reg_val) != 1) {
 50		drm_dbg_kms(&i915->drm, "Failed to %s aux backlight\n",
 51			    enable ? "enable" : "disable");
 52	}
 53}
 54
 55/*
 56 * Read the current backlight value from DPCD register(s) based
 57 * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported
 58 */
 59static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)
 60{
 61	struct intel_dp *intel_dp = intel_attached_dp(connector);
 62	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 63	u8 read_val[2] = { 0x0 };
 64	u8 mode_reg;
 65	u16 level = 0;
 66
 67	if (drm_dp_dpcd_readb(&intel_dp->aux,
 68			      DP_EDP_BACKLIGHT_MODE_SET_REGISTER,
 69			      &mode_reg) != 1) {
 70		drm_dbg_kms(&i915->drm,
 71			    "Failed to read the DPCD register 0x%x\n",
 72			    DP_EDP_BACKLIGHT_MODE_SET_REGISTER);
 73		return 0;
 74	}
 75
 76	/*
 77	 * If we're not in DPCD control mode yet, the programmed brightness
 78	 * value is meaningless and we should assume max brightness
 79	 */
 80	if ((mode_reg & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) !=
 81	    DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD)
 82		return connector->panel.backlight.max;
 83
 84	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
 85			     &read_val, sizeof(read_val)) < 0) {
 86		drm_dbg_kms(&i915->drm, "Failed to read DPCD register 0x%x\n",
 87			    DP_EDP_BACKLIGHT_BRIGHTNESS_MSB);
 88		return 0;
 89	}
 90	level = read_val[0];
 91	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
 92		level = (read_val[0] << 8 | read_val[1]);
 93
 94	return level;
 95}
 96
 97/*
 98 * Sends the current backlight level over the aux channel, checking if its using
 99 * 8-bit or 16 bit value (MSB and LSB)
100 */
101static void
102intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 level)
103{
104	struct intel_connector *connector = to_intel_connector(conn_state->connector);
105	struct intel_dp *intel_dp = intel_attached_dp(connector);
106	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
107	u8 vals[2] = { 0x0 };
108
109	vals[0] = level;
110
111	/* Write the MSB and/or LSB */
112	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) {
113		vals[0] = (level & 0xFF00) >> 8;
114		vals[1] = (level & 0xFF);
115	}
116	if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
117			      vals, sizeof(vals)) < 0) {
118		drm_dbg_kms(&i915->drm,
119			    "Failed to write aux backlight level\n");
120		return;
121	}
122}
123
124/*
125 * Set PWM Frequency divider to match desired frequency in vbt.
126 * The PWM Frequency is calculated as 27Mhz / (F x P).
127 * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the
128 *             EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h)
129 * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the
130 *             EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h)
131 */
132static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector)
133{
134	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
135	struct intel_dp *intel_dp = intel_attached_dp(connector);
136	const u8 pn = connector->panel.backlight.pwmgen_bit_count;
137	int freq, fxp, f, fxp_actual, fxp_min, fxp_max;
138
139	freq = dev_priv->vbt.backlight.pwm_freq_hz;
140	if (!freq) {
141		drm_dbg_kms(&dev_priv->drm,
142			    "Use panel default backlight frequency\n");
143		return false;
144	}
145
146	fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq);
147	f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
148	fxp_actual = f << pn;
149
150	/* Ensure frequency is within 25% of desired value */
151	fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4);
152	fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4);
153
154	if (fxp_min > fxp_actual || fxp_actual > fxp_max) {
155		drm_dbg_kms(&dev_priv->drm, "Actual frequency out of range\n");
156		return false;
157	}
158
159	if (drm_dp_dpcd_writeb(&intel_dp->aux,
160			       DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) {
161		drm_dbg_kms(&dev_priv->drm,
162			    "Failed to write aux backlight freq\n");
163		return false;
164	}
165	return true;
166}
167
168static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state,
169					  const struct drm_connector_state *conn_state)
170{
171	struct intel_connector *connector = to_intel_connector(conn_state->connector);
172	struct intel_dp *intel_dp = intel_attached_dp(connector);
173	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
174	struct intel_panel *panel = &connector->panel;
175	u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode;
176
177	if (drm_dp_dpcd_readb(&intel_dp->aux,
178			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) {
179		drm_dbg_kms(&i915->drm, "Failed to read DPCD register 0x%x\n",
180			    DP_EDP_BACKLIGHT_MODE_SET_REGISTER);
181		return;
182	}
183
184	new_dpcd_buf = dpcd_buf;
185	edp_backlight_mode = dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
186
187	switch (edp_backlight_mode) {
188	case DP_EDP_BACKLIGHT_CONTROL_MODE_PWM:
189	case DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET:
190	case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT:
191		new_dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
192		new_dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;
193
194		if (drm_dp_dpcd_writeb(&intel_dp->aux,
195				       DP_EDP_PWMGEN_BIT_COUNT,
196				       panel->backlight.pwmgen_bit_count) < 0)
197			drm_dbg_kms(&i915->drm,
198				    "Failed to write aux pwmgen bit count\n");
199
200		break;
201
202	/* Do nothing when it is already DPCD mode */
203	case DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD:
204	default:
205		break;
206	}
207
208	if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP)
209		if (intel_dp_aux_set_pwm_freq(connector))
210			new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE;
211
212	if (new_dpcd_buf != dpcd_buf) {
213		if (drm_dp_dpcd_writeb(&intel_dp->aux,
214			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf) < 0) {
215			drm_dbg_kms(&i915->drm,
216				    "Failed to write aux backlight mode\n");
217		}
218	}
219
220	intel_dp_aux_set_backlight(conn_state,
221				   connector->panel.backlight.level);
222	set_aux_backlight_enable(intel_dp, true);
223}
224
225static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state)
226{
227	set_aux_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)),
228				 false);
229}
230
231static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector)
232{
233	struct drm_i915_private *i915 = to_i915(connector->base.dev);
234	struct intel_dp *intel_dp = intel_attached_dp(connector);
235	struct intel_panel *panel = &connector->panel;
236	u32 max_backlight = 0;
237	int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1;
238	u8 pn, pn_min, pn_max;
239
240	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, &pn) == 1) {
241		pn &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
242		max_backlight = (1 << pn) - 1;
243	}
244
245	/* Find desired value of (F x P)
246	 * Note that, if F x P is out of supported range, the maximum value or
247	 * minimum value will applied automatically. So no need to check that.
248	 */
249	freq = i915->vbt.backlight.pwm_freq_hz;
250	drm_dbg_kms(&i915->drm, "VBT defined backlight frequency %u Hz\n",
251		    freq);
252	if (!freq) {
253		drm_dbg_kms(&i915->drm,
254			    "Use panel default backlight frequency\n");
255		return max_backlight;
256	}
257
258	fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq);
259
260	/* Use highest possible value of Pn for more granularity of brightness
261	 * adjustment while satifying the conditions below.
262	 * - Pn is in the range of Pn_min and Pn_max
263	 * - F is in the range of 1 and 255
264	 * - FxP is within 25% of desired value.
265	 *   Note: 25% is arbitrary value and may need some tweak.
266	 */
267	if (drm_dp_dpcd_readb(&intel_dp->aux,
268			      DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) {
269		drm_dbg_kms(&i915->drm,
270			    "Failed to read pwmgen bit count cap min\n");
271		return max_backlight;
272	}
273	if (drm_dp_dpcd_readb(&intel_dp->aux,
274			      DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) {
275		drm_dbg_kms(&i915->drm,
276			    "Failed to read pwmgen bit count cap max\n");
277		return max_backlight;
278	}
279	pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
280	pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
281
282	fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4);
283	fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4);
284	if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) {
285		drm_dbg_kms(&i915->drm,
286			    "VBT defined backlight frequency out of range\n");
287		return max_backlight;
288	}
289
290	for (pn = pn_max; pn >= pn_min; pn--) {
291		f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
292		fxp_actual = f << pn;
293		if (fxp_min <= fxp_actual && fxp_actual <= fxp_max)
294			break;
295	}
296
297	drm_dbg_kms(&i915->drm, "Using eDP pwmgen bit count of %d\n", pn);
298	if (drm_dp_dpcd_writeb(&intel_dp->aux,
299			       DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) {
300		drm_dbg_kms(&i915->drm,
301			    "Failed to write aux pwmgen bit count\n");
302		return max_backlight;
303	}
304	panel->backlight.pwmgen_bit_count = pn;
305
306	max_backlight = (1 << pn) - 1;
307
308	return max_backlight;
309}
310
311static int intel_dp_aux_setup_backlight(struct intel_connector *connector,
312					enum pipe pipe)
313{
314	struct intel_panel *panel = &connector->panel;
315
316	panel->backlight.max = intel_dp_aux_calc_max_backlight(connector);
317	if (!panel->backlight.max)
318		return -ENODEV;
319
320	panel->backlight.min = 0;
321	panel->backlight.level = intel_dp_aux_get_backlight(connector);
322	panel->backlight.enabled = panel->backlight.level != 0;
323
324	return 0;
325}
326
327static bool
328intel_dp_aux_display_control_capable(struct intel_connector *connector)
329{
330	struct intel_dp *intel_dp = intel_attached_dp(connector);
331	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
332
333	/* Check the eDP Display control capabilities registers to determine if
334	 * the panel can support backlight control over the aux channel
335	 */
336	if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&
337	    (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) &&
338	    !(intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) {
339		drm_dbg_kms(&i915->drm, "AUX Backlight Control Supported!\n");
340		return true;
341	}
342	return false;
343}
344
345int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector)
346{
347	struct intel_panel *panel = &intel_connector->panel;
348	struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder);
349	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
350
351	if (i915->params.enable_dpcd_backlight == 0 ||
352	    !intel_dp_aux_display_control_capable(intel_connector))
353		return -ENODEV;
354
355	/*
356	 * There are a lot of machines that don't advertise the backlight
357	 * control interface to use properly in their VBIOS, :\
358	 */
359	if (i915->vbt.backlight.type !=
360	    INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
361	    i915->params.enable_dpcd_backlight != 1 &&
362	    !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
363			      DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
364		drm_info(&i915->drm,
365			 "Panel advertises DPCD backlight support, but "
366			 "VBT disagrees. If your backlight controls "
367			 "don't work try booting with "
368			 "i915.enable_dpcd_backlight=1. If your machine "
369			 "needs this, please file a _new_ bug report on "
370			 "drm/i915, see " FDO_BUG_URL " for details.\n");
371		return -ENODEV;
372	}
373
374	panel->backlight.setup = intel_dp_aux_setup_backlight;
375	panel->backlight.enable = intel_dp_aux_enable_backlight;
376	panel->backlight.disable = intel_dp_aux_disable_backlight;
377	panel->backlight.set = intel_dp_aux_set_backlight;
378	panel->backlight.get = intel_dp_aux_get_backlight;
379
380	return 0;
381}