1/*
 2 * include/asm-alpha/cache.h
 3 */
 4#ifndef __ARCH_ALPHA_CACHE_H
 5#define __ARCH_ALPHA_CACHE_H
 6
 7
 8/* Bytes per L1 (data) cache line. */
 9#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6)
10# define L1_CACHE_BYTES     64
11# define L1_CACHE_SHIFT     6
12#else
13/* Both EV4 and EV5 are write-through, read-allocate,
14   direct-mapped, physical.
15*/
16# define L1_CACHE_BYTES     32
17# define L1_CACHE_SHIFT     5
18#endif
19
20#define SMP_CACHE_BYTES    L1_CACHE_BYTES
21
22#endif

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * include/asm-alpha/cache.h
 4 */
 5#ifndef __ARCH_ALPHA_CACHE_H
 6#define __ARCH_ALPHA_CACHE_H
 7
 8
 9/* Bytes per L1 (data) cache line. */
10#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6)
11# define L1_CACHE_BYTES     64
12# define L1_CACHE_SHIFT     6
13#else
14/* Both EV4 and EV5 are write-through, read-allocate,
15   direct-mapped, physical.
16*/
17# define L1_CACHE_BYTES     32
18# define L1_CACHE_SHIFT     5
19#endif
20
21#define SMP_CACHE_BYTES    L1_CACHE_BYTES
22
23#endif