1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Renesas RPC-IF core driver
 4 *
 5 * Copyright (C) 2018~2019 Renesas Solutions Corp.
 6 * Copyright (C) 2019 Macronix International Co., Ltd.
 7 * Copyright (C) 2019-2020 Cogent Embedded, Inc.
 8 */
 9
10#ifndef __RENESAS_RPC_IF_H
11#define __RENESAS_RPC_IF_H
12
13#include <linux/types.h>
14
15enum rpcif_data_dir {
16	RPCIF_NO_DATA,
17	RPCIF_DATA_IN,
18	RPCIF_DATA_OUT,
19};
20
21struct	rpcif_op {
22	struct {
23		u8 buswidth;
24		u8 opcode;
25		bool ddr;
26	} cmd, ocmd;
27
28	struct {
29		u8 nbytes;
30		u8 buswidth;
31		bool ddr;
32		u64 val;
33	} addr;
34
35	struct {
36		u8 ncycles;
37		u8 buswidth;
38	} dummy;
39
40	struct {
41		u8 nbytes;
42		u8 buswidth;
43		bool ddr;
44		u32 val;
45	} option;
46
47	struct {
48		u8 buswidth;
49		unsigned int nbytes;
50		enum rpcif_data_dir dir;
51		bool ddr;
52		union {
53			void *in;
54			const void *out;
55		} buf;
56	} data;
57};
58
59struct	rpcif {
60	struct device *dev;
61	void __iomem *dirmap;
62	struct regmap *regmap;
63	struct reset_control *rstc;
64	size_t size;
65	enum rpcif_data_dir dir;
66	u8 bus_size;
67	void *buffer;
68	u32 xferlen;
69	u32 smcr;
70	u32 smadr;
71	u32 command;		/* DRCMR or SMCMR */
72	u32 option;		/* DROPR or SMOPR */
73	u32 enable;		/* DRENR or SMENR */
74	u32 dummy;		/* DRDMCR or SMDMCR */
75	u32 ddr;		/* DRDRENR or SMDRENR */
76};
77
78int  rpcif_sw_init(struct rpcif *rpc, struct device *dev);
79void rpcif_hw_init(struct rpcif *rpc, bool hyperflash);
80void rpcif_enable_rpm(struct rpcif *rpc);
81void rpcif_disable_rpm(struct rpcif *rpc);
82void rpcif_prepare(struct rpcif *rpc, const struct rpcif_op *op, u64 *offs,
83		   size_t *len);
84int rpcif_manual_xfer(struct rpcif *rpc);
85ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf);
86
87#endif // __RENESAS_RPC_IF_H