1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright (C) 2013 STMicroelectronics Limited
  4 * Author: Stephen Gallimore <stephen.gallimore@st.com>
  5 *
  6 * Inspired by mach-imx/src.c
  7 */
  8#include <linux/kernel.h>
  9#include <linux/platform_device.h>
 10#include <linux/module.h>
 11#include <linux/err.h>
 12#include <linux/types.h>
 13#include <linux/of_device.h>
 14#include <linux/regmap.h>
 15#include <linux/mfd/syscon.h>
 16
 17#include "reset-syscfg.h"
 18
 19/**
 20 * Reset channel regmap configuration
 21 *
 22 * @reset: regmap field for the channel's reset bit.
 23 * @ack: regmap field for the channel's ack bit (optional).
 24 */
 25struct syscfg_reset_channel {
 26	struct regmap_field *reset;
 27	struct regmap_field *ack;
 28};
 29
 30/**
 31 * A reset controller which groups together a set of related reset bits, which
 32 * may be located in different system configuration registers.
 33 *
 34 * @rst: base reset controller structure.
 35 * @active_low: are the resets in this controller active low, i.e. clearing
 36 *              the reset bit puts the hardware into reset.
 37 * @channels: An array of reset channels for this controller.
 38 */
 39struct syscfg_reset_controller {
 40	struct reset_controller_dev rst;
 41	bool active_low;
 42	struct syscfg_reset_channel *channels;
 43};
 44
 45#define to_syscfg_reset_controller(_rst) \
 46	container_of(_rst, struct syscfg_reset_controller, rst)
 47
 48static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
 49				   unsigned long idx, int assert)
 50{
 51	struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
 52	const struct syscfg_reset_channel *ch;
 53	u32 ctrl_val = rst->active_low ? !assert : !!assert;
 54	int err;
 55
 56	if (idx >= rcdev->nr_resets)
 57		return -EINVAL;
 58
 59	ch = &rst->channels[idx];
 60
 61	err = regmap_field_write(ch->reset, ctrl_val);
 62	if (err)
 63		return err;
 64
 65	if (ch->ack) {
 66		unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 67		u32 ack_val;
 68
 69		while (true) {
 70			err = regmap_field_read(ch->ack, &ack_val);
 71			if (err)
 72				return err;
 73
 74			if (ack_val == ctrl_val)
 75				break;
 76
 77			if (time_after(jiffies, timeout))
 78				return -ETIME;
 79
 80			cpu_relax();
 81		}
 82	}
 83
 84	return 0;
 85}
 86
 87static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
 88			       unsigned long idx)
 89{
 90	return syscfg_reset_program_hw(rcdev, idx, true);
 91}
 92
 93static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
 94				 unsigned long idx)
 95{
 96	return syscfg_reset_program_hw(rcdev, idx, false);
 97}
 98
 99static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
100			    unsigned long idx)
101{
102	int err;
103
104	err = syscfg_reset_assert(rcdev, idx);
105	if (err)
106		return err;
107
108	return syscfg_reset_deassert(rcdev, idx);
109}
110
111static int syscfg_reset_status(struct reset_controller_dev *rcdev,
112			       unsigned long idx)
113{
114	struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
115	const struct syscfg_reset_channel *ch;
116	u32 ret_val = 0;
117	int err;
118
119	if (idx >= rcdev->nr_resets)
120		return -EINVAL;
121
122	ch = &rst->channels[idx];
123	if (ch->ack)
124		err = regmap_field_read(ch->ack, &ret_val);
125	else
126		err = regmap_field_read(ch->reset, &ret_val);
127	if (err)
128		return err;
129
130	return rst->active_low ? !ret_val : !!ret_val;
131}
132
133static const struct reset_control_ops syscfg_reset_ops = {
134	.reset    = syscfg_reset_dev,
135	.assert   = syscfg_reset_assert,
136	.deassert = syscfg_reset_deassert,
137	.status   = syscfg_reset_status,
138};
139
140static int syscfg_reset_controller_register(struct device *dev,
141				const struct syscfg_reset_controller_data *data)
142{
143	struct syscfg_reset_controller *rc;
144	int i, err;
145
146	rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
147	if (!rc)
148		return -ENOMEM;
149
150	rc->channels = devm_kcalloc(dev, data->nr_channels,
151				    sizeof(*rc->channels), GFP_KERNEL);
152	if (!rc->channels)
153		return -ENOMEM;
154
155	rc->rst.ops = &syscfg_reset_ops,
156	rc->rst.of_node = dev->of_node;
157	rc->rst.nr_resets = data->nr_channels;
158	rc->active_low = data->active_low;
159
160	for (i = 0; i < data->nr_channels; i++) {
161		struct regmap *map;
162		struct regmap_field *f;
163		const char *compatible = data->channels[i].compatible;
164
165		map = syscon_regmap_lookup_by_compatible(compatible);
166		if (IS_ERR(map))
167			return PTR_ERR(map);
168
169		f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
170		if (IS_ERR(f))
171			return PTR_ERR(f);
172
173		rc->channels[i].reset = f;
174
175		if (!data->wait_for_ack)
176			continue;
177
178		f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
179		if (IS_ERR(f))
180			return PTR_ERR(f);
181
182		rc->channels[i].ack = f;
183	}
184
185	err = reset_controller_register(&rc->rst);
186	if (!err)
187		dev_info(dev, "registered\n");
188
189	return err;
190}
191
192int syscfg_reset_probe(struct platform_device *pdev)
193{
194	struct device *dev = pdev ? &pdev->dev : NULL;
195	const struct of_device_id *match;
196
197	if (!dev || !dev->driver)
198		return -ENODEV;
199
200	match = of_match_device(dev->driver->of_match_table, dev);
201	if (!match || !match->data)
202		return -EINVAL;
203
204	return syscfg_reset_controller_register(dev, match->data);
205}