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1/* stnic.c : A SH7750 specific part of driver for NS DP83902A ST-NIC.
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (C) 1999 kaz Kojima
8 */
9
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/interrupt.h>
14#include <linux/ioport.h>
15#include <linux/netdevice.h>
16#include <linux/etherdevice.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19
20#include <asm/system.h>
21#include <asm/io.h>
22#include <mach-se/mach/se.h>
23#include <asm/machvec.h>
24#ifdef CONFIG_SH_STANDARD_BIOS
25#include <asm/sh_bios.h>
26#endif
27
28#include "8390.h"
29
30#define DRV_NAME "stnic"
31
32#define byte unsigned char
33#define half unsigned short
34#define word unsigned int
35#define vbyte volatile unsigned char
36#define vhalf volatile unsigned short
37#define vword volatile unsigned int
38
39#define STNIC_RUN 0x01 /* 1 == Run, 0 == reset. */
40
41#define START_PG 0 /* First page of TX buffer */
42#define STOP_PG 128 /* Last page +1 of RX ring */
43
44/* Alias */
45#define STNIC_CR E8390_CMD
46#define PG0_RSAR0 EN0_RSARLO
47#define PG0_RSAR1 EN0_RSARHI
48#define PG0_RBCR0 EN0_RCNTLO
49#define PG0_RBCR1 EN0_RCNTHI
50
51#define CR_RRD E8390_RREAD
52#define CR_RWR E8390_RWRITE
53#define CR_PG0 E8390_PAGE0
54#define CR_STA E8390_START
55#define CR_RDMA E8390_NODMA
56
57/* FIXME! YOU MUST SET YOUR OWN ETHER ADDRESS. */
58static byte stnic_eadr[6] =
59{0x00, 0xc0, 0x6e, 0x00, 0x00, 0x07};
60
61static struct net_device *stnic_dev;
62
63static void stnic_reset (struct net_device *dev);
64static void stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr,
65 int ring_page);
66static void stnic_block_input (struct net_device *dev, int count,
67 struct sk_buff *skb , int ring_offset);
68static void stnic_block_output (struct net_device *dev, int count,
69 const unsigned char *buf, int start_page);
70
71static void stnic_init (struct net_device *dev);
72
73/* SH7750 specific read/write io. */
74static inline void
75STNIC_DELAY (void)
76{
77 vword trash;
78 trash = *(vword *) 0xa0000000;
79 trash = *(vword *) 0xa0000000;
80 trash = *(vword *) 0xa0000000;
81}
82
83static inline byte
84STNIC_READ (int reg)
85{
86 byte val;
87
88 val = (*(vhalf *) (PA_83902 + ((reg) << 1)) >> 8) & 0xff;
89 STNIC_DELAY ();
90 return val;
91}
92
93static inline void
94STNIC_WRITE (int reg, byte val)
95{
96 *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8);
97 STNIC_DELAY ();
98}
99
100static int __init stnic_probe(void)
101{
102 struct net_device *dev;
103 int i, err;
104
105 /* If we are not running on a SolutionEngine, give up now */
106 if (! MACH_SE)
107 return -ENODEV;
108
109 /* New style probing API */
110 dev = alloc_ei_netdev();
111 if (!dev)
112 return -ENOMEM;
113
114#ifdef CONFIG_SH_STANDARD_BIOS
115 sh_bios_get_node_addr (stnic_eadr);
116#endif
117 for (i = 0; i < ETHER_ADDR_LEN; i++)
118 dev->dev_addr[i] = stnic_eadr[i];
119
120 /* Set the base address to point to the NIC, not the "real" base! */
121 dev->base_addr = 0x1000;
122 dev->irq = IRQ_STNIC;
123 dev->netdev_ops = &ei_netdev_ops;
124
125 /* Snarf the interrupt now. There's no point in waiting since we cannot
126 share and the board will usually be enabled. */
127 err = request_irq (dev->irq, ei_interrupt, 0, DRV_NAME, dev);
128 if (err) {
129 printk (KERN_EMERG " unable to get IRQ %d.\n", dev->irq);
130 free_netdev(dev);
131 return err;
132 }
133
134 ei_status.name = dev->name;
135 ei_status.word16 = 1;
136#ifdef __LITTLE_ENDIAN__
137 ei_status.bigendian = 0;
138#else
139 ei_status.bigendian = 1;
140#endif
141 ei_status.tx_start_page = START_PG;
142 ei_status.rx_start_page = START_PG + TX_PAGES;
143 ei_status.stop_page = STOP_PG;
144
145 ei_status.reset_8390 = &stnic_reset;
146 ei_status.get_8390_hdr = &stnic_get_hdr;
147 ei_status.block_input = &stnic_block_input;
148 ei_status.block_output = &stnic_block_output;
149
150 stnic_init (dev);
151
152 err = register_netdev(dev);
153 if (err) {
154 free_irq(dev->irq, dev);
155 free_netdev(dev);
156 return err;
157 }
158 stnic_dev = dev;
159
160 printk (KERN_INFO "NS ST-NIC 83902A\n");
161
162 return 0;
163}
164
165static void
166stnic_reset (struct net_device *dev)
167{
168 *(vhalf *) PA_83902_RST = 0;
169 udelay (5);
170 if (ei_debug > 1)
171 printk (KERN_WARNING "8390 reset done (%ld).\n", jiffies);
172 *(vhalf *) PA_83902_RST = ~0;
173 udelay (5);
174}
175
176static void
177stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr,
178 int ring_page)
179{
180 half buf[2];
181
182 STNIC_WRITE (PG0_RSAR0, 0);
183 STNIC_WRITE (PG0_RSAR1, ring_page);
184 STNIC_WRITE (PG0_RBCR0, 4);
185 STNIC_WRITE (PG0_RBCR1, 0);
186 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA);
187
188 buf[0] = *(vhalf *) PA_83902_IF;
189 STNIC_DELAY ();
190 buf[1] = *(vhalf *) PA_83902_IF;
191 STNIC_DELAY ();
192 hdr->next = buf[0] >> 8;
193 hdr->status = buf[0] & 0xff;
194#ifdef __LITTLE_ENDIAN__
195 hdr->count = buf[1];
196#else
197 hdr->count = ((buf[1] >> 8) & 0xff) | (buf[1] << 8);
198#endif
199
200 if (ei_debug > 1)
201 printk (KERN_DEBUG "ring %x status %02x next %02x count %04x.\n",
202 ring_page, hdr->status, hdr->next, hdr->count);
203
204 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA);
205}
206
207/* Block input and output, similar to the Crynwr packet driver. If you are
208 porting to a new ethercard look at the packet driver source for hints.
209 The HP LAN doesn't use shared memory -- we put the packet
210 out through the "remote DMA" dataport. */
211
212static void
213stnic_block_input (struct net_device *dev, int length, struct sk_buff *skb,
214 int offset)
215{
216 char *buf = skb->data;
217 half val;
218
219 STNIC_WRITE (PG0_RSAR0, offset & 0xff);
220 STNIC_WRITE (PG0_RSAR1, offset >> 8);
221 STNIC_WRITE (PG0_RBCR0, length & 0xff);
222 STNIC_WRITE (PG0_RBCR1, length >> 8);
223 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA);
224
225 if (length & 1)
226 length++;
227
228 while (length > 0)
229 {
230 val = *(vhalf *) PA_83902_IF;
231#ifdef __LITTLE_ENDIAN__
232 *buf++ = val & 0xff;
233 *buf++ = val >> 8;
234#else
235 *buf++ = val >> 8;
236 *buf++ = val & 0xff;
237#endif
238 STNIC_DELAY ();
239 length -= sizeof (half);
240 }
241
242 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA);
243}
244
245static void
246stnic_block_output (struct net_device *dev, int length,
247 const unsigned char *buf, int output_page)
248{
249 STNIC_WRITE (PG0_RBCR0, 1); /* Write non-zero value */
250 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA);
251 STNIC_DELAY ();
252
253 STNIC_WRITE (PG0_RBCR0, length & 0xff);
254 STNIC_WRITE (PG0_RBCR1, length >> 8);
255 STNIC_WRITE (PG0_RSAR0, 0);
256 STNIC_WRITE (PG0_RSAR1, output_page);
257 STNIC_WRITE (STNIC_CR, CR_RWR | CR_PG0 | CR_STA);
258
259 if (length & 1)
260 length++;
261
262 while (length > 0)
263 {
264#ifdef __LITTLE_ENDIAN__
265 *(vhalf *) PA_83902_IF = ((half) buf[1] << 8) | buf[0];
266#else
267 *(vhalf *) PA_83902_IF = ((half) buf[0] << 8) | buf[1];
268#endif
269 STNIC_DELAY ();
270 buf += sizeof (half);
271 length -= sizeof (half);
272 }
273
274 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA);
275}
276
277/* This function resets the STNIC if something screws up. */
278static void
279stnic_init (struct net_device *dev)
280{
281 stnic_reset (dev);
282 NS8390_init (dev, 0);
283}
284
285static void __exit stnic_cleanup(void)
286{
287 unregister_netdev(stnic_dev);
288 free_irq(stnic_dev->irq, stnic_dev);
289 free_netdev(stnic_dev);
290}
291
292module_init(stnic_probe);
293module_exit(stnic_cleanup);
294MODULE_LICENSE("GPL");