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1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <asm/unaligned.h>
29
30#define ATOM_DEBUG
31
32#include "atom.h"
33#include "atom-names.h"
34#include "atom-bits.h"
35#include "radeon.h"
36
37#define ATOM_COND_ABOVE 0
38#define ATOM_COND_ABOVEOREQUAL 1
39#define ATOM_COND_ALWAYS 2
40#define ATOM_COND_BELOW 3
41#define ATOM_COND_BELOWOREQUAL 4
42#define ATOM_COND_EQUAL 5
43#define ATOM_COND_NOTEQUAL 6
44
45#define ATOM_PORT_ATI 0
46#define ATOM_PORT_PCI 1
47#define ATOM_PORT_SYSIO 2
48
49#define ATOM_UNIT_MICROSEC 0
50#define ATOM_UNIT_MILLISEC 1
51
52#define PLL_INDEX 2
53#define PLL_DATA 3
54
55typedef struct {
56 struct atom_context *ctx;
57 uint32_t *ps, *ws;
58 int ps_shift;
59 uint16_t start;
60 unsigned last_jump;
61 unsigned long last_jump_jiffies;
62 bool abort;
63} atom_exec_context;
64
65int atom_debug = 0;
66static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
67int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
68
69static uint32_t atom_arg_mask[8] =
70 { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
710xFF000000 };
72static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
73
74static int atom_dst_to_src[8][4] = {
75 /* translate destination alignment field to the source alignment encoding */
76 {0, 0, 0, 0},
77 {1, 2, 3, 0},
78 {1, 2, 3, 0},
79 {1, 2, 3, 0},
80 {4, 5, 6, 7},
81 {4, 5, 6, 7},
82 {4, 5, 6, 7},
83 {4, 5, 6, 7},
84};
85static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
86
87static int debug_depth = 0;
88#ifdef ATOM_DEBUG
89static void debug_print_spaces(int n)
90{
91 while (n--)
92 printk(" ");
93}
94
95#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
96#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
97#else
98#define DEBUG(...) do { } while (0)
99#define SDEBUG(...) do { } while (0)
100#endif
101
102static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
103 uint32_t index, uint32_t data)
104{
105 struct radeon_device *rdev = ctx->card->dev->dev_private;
106 uint32_t temp = 0xCDCDCDCD;
107
108 while (1)
109 switch (CU8(base)) {
110 case ATOM_IIO_NOP:
111 base++;
112 break;
113 case ATOM_IIO_READ:
114 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
115 base += 3;
116 break;
117 case ATOM_IIO_WRITE:
118 if (rdev->family == CHIP_RV515)
119 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
120 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
121 base += 3;
122 break;
123 case ATOM_IIO_CLEAR:
124 temp &=
125 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
126 CU8(base + 2));
127 base += 3;
128 break;
129 case ATOM_IIO_SET:
130 temp |=
131 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
132 2);
133 base += 3;
134 break;
135 case ATOM_IIO_MOVE_INDEX:
136 temp &=
137 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
138 CU8(base + 3));
139 temp |=
140 ((index >> CU8(base + 2)) &
141 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
142 3);
143 base += 4;
144 break;
145 case ATOM_IIO_MOVE_DATA:
146 temp &=
147 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
148 CU8(base + 3));
149 temp |=
150 ((data >> CU8(base + 2)) &
151 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
152 3);
153 base += 4;
154 break;
155 case ATOM_IIO_MOVE_ATTR:
156 temp &=
157 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
158 CU8(base + 3));
159 temp |=
160 ((ctx->
161 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
162 CU8
163 (base
164 +
165 1))))
166 << CU8(base + 3);
167 base += 4;
168 break;
169 case ATOM_IIO_END:
170 return temp;
171 default:
172 printk(KERN_INFO "Unknown IIO opcode.\n");
173 return 0;
174 }
175}
176
177static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
178 int *ptr, uint32_t *saved, int print)
179{
180 uint32_t idx, val = 0xCDCDCDCD, align, arg;
181 struct atom_context *gctx = ctx->ctx;
182 arg = attr & 7;
183 align = (attr >> 3) & 7;
184 switch (arg) {
185 case ATOM_ARG_REG:
186 idx = U16(*ptr);
187 (*ptr) += 2;
188 if (print)
189 DEBUG("REG[0x%04X]", idx);
190 idx += gctx->reg_block;
191 switch (gctx->io_mode) {
192 case ATOM_IO_MM:
193 val = gctx->card->reg_read(gctx->card, idx);
194 break;
195 case ATOM_IO_PCI:
196 printk(KERN_INFO
197 "PCI registers are not implemented.\n");
198 return 0;
199 case ATOM_IO_SYSIO:
200 printk(KERN_INFO
201 "SYSIO registers are not implemented.\n");
202 return 0;
203 default:
204 if (!(gctx->io_mode & 0x80)) {
205 printk(KERN_INFO "Bad IO mode.\n");
206 return 0;
207 }
208 if (!gctx->iio[gctx->io_mode & 0x7F]) {
209 printk(KERN_INFO
210 "Undefined indirect IO read method %d.\n",
211 gctx->io_mode & 0x7F);
212 return 0;
213 }
214 val =
215 atom_iio_execute(gctx,
216 gctx->iio[gctx->io_mode & 0x7F],
217 idx, 0);
218 }
219 break;
220 case ATOM_ARG_PS:
221 idx = U8(*ptr);
222 (*ptr)++;
223 /* get_unaligned_le32 avoids unaligned accesses from atombios
224 * tables, noticed on a DEC Alpha. */
225 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
226 if (print)
227 DEBUG("PS[0x%02X,0x%04X]", idx, val);
228 break;
229 case ATOM_ARG_WS:
230 idx = U8(*ptr);
231 (*ptr)++;
232 if (print)
233 DEBUG("WS[0x%02X]", idx);
234 switch (idx) {
235 case ATOM_WS_QUOTIENT:
236 val = gctx->divmul[0];
237 break;
238 case ATOM_WS_REMAINDER:
239 val = gctx->divmul[1];
240 break;
241 case ATOM_WS_DATAPTR:
242 val = gctx->data_block;
243 break;
244 case ATOM_WS_SHIFT:
245 val = gctx->shift;
246 break;
247 case ATOM_WS_OR_MASK:
248 val = 1 << gctx->shift;
249 break;
250 case ATOM_WS_AND_MASK:
251 val = ~(1 << gctx->shift);
252 break;
253 case ATOM_WS_FB_WINDOW:
254 val = gctx->fb_base;
255 break;
256 case ATOM_WS_ATTRIBUTES:
257 val = gctx->io_attr;
258 break;
259 case ATOM_WS_REGPTR:
260 val = gctx->reg_block;
261 break;
262 default:
263 val = ctx->ws[idx];
264 }
265 break;
266 case ATOM_ARG_ID:
267 idx = U16(*ptr);
268 (*ptr) += 2;
269 if (print) {
270 if (gctx->data_block)
271 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
272 else
273 DEBUG("ID[0x%04X]", idx);
274 }
275 val = U32(idx + gctx->data_block);
276 break;
277 case ATOM_ARG_FB:
278 idx = U8(*ptr);
279 (*ptr)++;
280 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
281 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
282 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
283 val = 0;
284 } else
285 val = gctx->scratch[(gctx->fb_base / 4) + idx];
286 if (print)
287 DEBUG("FB[0x%02X]", idx);
288 break;
289 case ATOM_ARG_IMM:
290 switch (align) {
291 case ATOM_SRC_DWORD:
292 val = U32(*ptr);
293 (*ptr) += 4;
294 if (print)
295 DEBUG("IMM 0x%08X\n", val);
296 return val;
297 case ATOM_SRC_WORD0:
298 case ATOM_SRC_WORD8:
299 case ATOM_SRC_WORD16:
300 val = U16(*ptr);
301 (*ptr) += 2;
302 if (print)
303 DEBUG("IMM 0x%04X\n", val);
304 return val;
305 case ATOM_SRC_BYTE0:
306 case ATOM_SRC_BYTE8:
307 case ATOM_SRC_BYTE16:
308 case ATOM_SRC_BYTE24:
309 val = U8(*ptr);
310 (*ptr)++;
311 if (print)
312 DEBUG("IMM 0x%02X\n", val);
313 return val;
314 }
315 return 0;
316 case ATOM_ARG_PLL:
317 idx = U8(*ptr);
318 (*ptr)++;
319 if (print)
320 DEBUG("PLL[0x%02X]", idx);
321 val = gctx->card->pll_read(gctx->card, idx);
322 break;
323 case ATOM_ARG_MC:
324 idx = U8(*ptr);
325 (*ptr)++;
326 if (print)
327 DEBUG("MC[0x%02X]", idx);
328 val = gctx->card->mc_read(gctx->card, idx);
329 break;
330 }
331 if (saved)
332 *saved = val;
333 val &= atom_arg_mask[align];
334 val >>= atom_arg_shift[align];
335 if (print)
336 switch (align) {
337 case ATOM_SRC_DWORD:
338 DEBUG(".[31:0] -> 0x%08X\n", val);
339 break;
340 case ATOM_SRC_WORD0:
341 DEBUG(".[15:0] -> 0x%04X\n", val);
342 break;
343 case ATOM_SRC_WORD8:
344 DEBUG(".[23:8] -> 0x%04X\n", val);
345 break;
346 case ATOM_SRC_WORD16:
347 DEBUG(".[31:16] -> 0x%04X\n", val);
348 break;
349 case ATOM_SRC_BYTE0:
350 DEBUG(".[7:0] -> 0x%02X\n", val);
351 break;
352 case ATOM_SRC_BYTE8:
353 DEBUG(".[15:8] -> 0x%02X\n", val);
354 break;
355 case ATOM_SRC_BYTE16:
356 DEBUG(".[23:16] -> 0x%02X\n", val);
357 break;
358 case ATOM_SRC_BYTE24:
359 DEBUG(".[31:24] -> 0x%02X\n", val);
360 break;
361 }
362 return val;
363}
364
365static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
366{
367 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
368 switch (arg) {
369 case ATOM_ARG_REG:
370 case ATOM_ARG_ID:
371 (*ptr) += 2;
372 break;
373 case ATOM_ARG_PLL:
374 case ATOM_ARG_MC:
375 case ATOM_ARG_PS:
376 case ATOM_ARG_WS:
377 case ATOM_ARG_FB:
378 (*ptr)++;
379 break;
380 case ATOM_ARG_IMM:
381 switch (align) {
382 case ATOM_SRC_DWORD:
383 (*ptr) += 4;
384 return;
385 case ATOM_SRC_WORD0:
386 case ATOM_SRC_WORD8:
387 case ATOM_SRC_WORD16:
388 (*ptr) += 2;
389 return;
390 case ATOM_SRC_BYTE0:
391 case ATOM_SRC_BYTE8:
392 case ATOM_SRC_BYTE16:
393 case ATOM_SRC_BYTE24:
394 (*ptr)++;
395 return;
396 }
397 return;
398 }
399}
400
401static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
402{
403 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
404}
405
406static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
407{
408 uint32_t val = 0xCDCDCDCD;
409
410 switch (align) {
411 case ATOM_SRC_DWORD:
412 val = U32(*ptr);
413 (*ptr) += 4;
414 break;
415 case ATOM_SRC_WORD0:
416 case ATOM_SRC_WORD8:
417 case ATOM_SRC_WORD16:
418 val = U16(*ptr);
419 (*ptr) += 2;
420 break;
421 case ATOM_SRC_BYTE0:
422 case ATOM_SRC_BYTE8:
423 case ATOM_SRC_BYTE16:
424 case ATOM_SRC_BYTE24:
425 val = U8(*ptr);
426 (*ptr)++;
427 break;
428 }
429 return val;
430}
431
432static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
433 int *ptr, uint32_t *saved, int print)
434{
435 return atom_get_src_int(ctx,
436 arg | atom_dst_to_src[(attr >> 3) &
437 7][(attr >> 6) & 3] << 3,
438 ptr, saved, print);
439}
440
441static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
442{
443 atom_skip_src_int(ctx,
444 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
445 3] << 3, ptr);
446}
447
448static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
449 int *ptr, uint32_t val, uint32_t saved)
450{
451 uint32_t align =
452 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
453 val, idx;
454 struct atom_context *gctx = ctx->ctx;
455 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
456 val <<= atom_arg_shift[align];
457 val &= atom_arg_mask[align];
458 saved &= ~atom_arg_mask[align];
459 val |= saved;
460 switch (arg) {
461 case ATOM_ARG_REG:
462 idx = U16(*ptr);
463 (*ptr) += 2;
464 DEBUG("REG[0x%04X]", idx);
465 idx += gctx->reg_block;
466 switch (gctx->io_mode) {
467 case ATOM_IO_MM:
468 if (idx == 0)
469 gctx->card->reg_write(gctx->card, idx,
470 val << 2);
471 else
472 gctx->card->reg_write(gctx->card, idx, val);
473 break;
474 case ATOM_IO_PCI:
475 printk(KERN_INFO
476 "PCI registers are not implemented.\n");
477 return;
478 case ATOM_IO_SYSIO:
479 printk(KERN_INFO
480 "SYSIO registers are not implemented.\n");
481 return;
482 default:
483 if (!(gctx->io_mode & 0x80)) {
484 printk(KERN_INFO "Bad IO mode.\n");
485 return;
486 }
487 if (!gctx->iio[gctx->io_mode & 0xFF]) {
488 printk(KERN_INFO
489 "Undefined indirect IO write method %d.\n",
490 gctx->io_mode & 0x7F);
491 return;
492 }
493 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
494 idx, val);
495 }
496 break;
497 case ATOM_ARG_PS:
498 idx = U8(*ptr);
499 (*ptr)++;
500 DEBUG("PS[0x%02X]", idx);
501 ctx->ps[idx] = cpu_to_le32(val);
502 break;
503 case ATOM_ARG_WS:
504 idx = U8(*ptr);
505 (*ptr)++;
506 DEBUG("WS[0x%02X]", idx);
507 switch (idx) {
508 case ATOM_WS_QUOTIENT:
509 gctx->divmul[0] = val;
510 break;
511 case ATOM_WS_REMAINDER:
512 gctx->divmul[1] = val;
513 break;
514 case ATOM_WS_DATAPTR:
515 gctx->data_block = val;
516 break;
517 case ATOM_WS_SHIFT:
518 gctx->shift = val;
519 break;
520 case ATOM_WS_OR_MASK:
521 case ATOM_WS_AND_MASK:
522 break;
523 case ATOM_WS_FB_WINDOW:
524 gctx->fb_base = val;
525 break;
526 case ATOM_WS_ATTRIBUTES:
527 gctx->io_attr = val;
528 break;
529 case ATOM_WS_REGPTR:
530 gctx->reg_block = val;
531 break;
532 default:
533 ctx->ws[idx] = val;
534 }
535 break;
536 case ATOM_ARG_FB:
537 idx = U8(*ptr);
538 (*ptr)++;
539 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
540 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
541 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
542 } else
543 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
544 DEBUG("FB[0x%02X]", idx);
545 break;
546 case ATOM_ARG_PLL:
547 idx = U8(*ptr);
548 (*ptr)++;
549 DEBUG("PLL[0x%02X]", idx);
550 gctx->card->pll_write(gctx->card, idx, val);
551 break;
552 case ATOM_ARG_MC:
553 idx = U8(*ptr);
554 (*ptr)++;
555 DEBUG("MC[0x%02X]", idx);
556 gctx->card->mc_write(gctx->card, idx, val);
557 return;
558 }
559 switch (align) {
560 case ATOM_SRC_DWORD:
561 DEBUG(".[31:0] <- 0x%08X\n", old_val);
562 break;
563 case ATOM_SRC_WORD0:
564 DEBUG(".[15:0] <- 0x%04X\n", old_val);
565 break;
566 case ATOM_SRC_WORD8:
567 DEBUG(".[23:8] <- 0x%04X\n", old_val);
568 break;
569 case ATOM_SRC_WORD16:
570 DEBUG(".[31:16] <- 0x%04X\n", old_val);
571 break;
572 case ATOM_SRC_BYTE0:
573 DEBUG(".[7:0] <- 0x%02X\n", old_val);
574 break;
575 case ATOM_SRC_BYTE8:
576 DEBUG(".[15:8] <- 0x%02X\n", old_val);
577 break;
578 case ATOM_SRC_BYTE16:
579 DEBUG(".[23:16] <- 0x%02X\n", old_val);
580 break;
581 case ATOM_SRC_BYTE24:
582 DEBUG(".[31:24] <- 0x%02X\n", old_val);
583 break;
584 }
585}
586
587static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
588{
589 uint8_t attr = U8((*ptr)++);
590 uint32_t dst, src, saved;
591 int dptr = *ptr;
592 SDEBUG(" dst: ");
593 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
594 SDEBUG(" src: ");
595 src = atom_get_src(ctx, attr, ptr);
596 dst += src;
597 SDEBUG(" dst: ");
598 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
599}
600
601static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
602{
603 uint8_t attr = U8((*ptr)++);
604 uint32_t dst, src, saved;
605 int dptr = *ptr;
606 SDEBUG(" dst: ");
607 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
608 SDEBUG(" src: ");
609 src = atom_get_src(ctx, attr, ptr);
610 dst &= src;
611 SDEBUG(" dst: ");
612 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
613}
614
615static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
616{
617 printk("ATOM BIOS beeped!\n");
618}
619
620static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
621{
622 int idx = U8((*ptr)++);
623 int r = 0;
624
625 if (idx < ATOM_TABLE_NAMES_CNT)
626 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
627 else
628 SDEBUG(" table: %d\n", idx);
629 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
630 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
631 if (r) {
632 ctx->abort = true;
633 }
634}
635
636static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
637{
638 uint8_t attr = U8((*ptr)++);
639 uint32_t saved;
640 int dptr = *ptr;
641 attr &= 0x38;
642 attr |= atom_def_dst[attr >> 3] << 6;
643 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
644 SDEBUG(" dst: ");
645 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
646}
647
648static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
649{
650 uint8_t attr = U8((*ptr)++);
651 uint32_t dst, src;
652 SDEBUG(" src1: ");
653 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
654 SDEBUG(" src2: ");
655 src = atom_get_src(ctx, attr, ptr);
656 ctx->ctx->cs_equal = (dst == src);
657 ctx->ctx->cs_above = (dst > src);
658 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
659 ctx->ctx->cs_above ? "GT" : "LE");
660}
661
662static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
663{
664 unsigned count = U8((*ptr)++);
665 SDEBUG(" count: %d\n", count);
666 if (arg == ATOM_UNIT_MICROSEC)
667 udelay(count);
668 else
669 msleep(count);
670}
671
672static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
673{
674 uint8_t attr = U8((*ptr)++);
675 uint32_t dst, src;
676 SDEBUG(" src1: ");
677 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
678 SDEBUG(" src2: ");
679 src = atom_get_src(ctx, attr, ptr);
680 if (src != 0) {
681 ctx->ctx->divmul[0] = dst / src;
682 ctx->ctx->divmul[1] = dst % src;
683 } else {
684 ctx->ctx->divmul[0] = 0;
685 ctx->ctx->divmul[1] = 0;
686 }
687}
688
689static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
690{
691 /* functionally, a nop */
692}
693
694static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
695{
696 int execute = 0, target = U16(*ptr);
697 unsigned long cjiffies;
698
699 (*ptr) += 2;
700 switch (arg) {
701 case ATOM_COND_ABOVE:
702 execute = ctx->ctx->cs_above;
703 break;
704 case ATOM_COND_ABOVEOREQUAL:
705 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
706 break;
707 case ATOM_COND_ALWAYS:
708 execute = 1;
709 break;
710 case ATOM_COND_BELOW:
711 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
712 break;
713 case ATOM_COND_BELOWOREQUAL:
714 execute = !ctx->ctx->cs_above;
715 break;
716 case ATOM_COND_EQUAL:
717 execute = ctx->ctx->cs_equal;
718 break;
719 case ATOM_COND_NOTEQUAL:
720 execute = !ctx->ctx->cs_equal;
721 break;
722 }
723 if (arg != ATOM_COND_ALWAYS)
724 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
725 SDEBUG(" target: 0x%04X\n", target);
726 if (execute) {
727 if (ctx->last_jump == (ctx->start + target)) {
728 cjiffies = jiffies;
729 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
730 cjiffies -= ctx->last_jump_jiffies;
731 if ((jiffies_to_msecs(cjiffies) > 5000)) {
732 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
733 ctx->abort = true;
734 }
735 } else {
736 /* jiffies wrap around we will just wait a little longer */
737 ctx->last_jump_jiffies = jiffies;
738 }
739 } else {
740 ctx->last_jump = ctx->start + target;
741 ctx->last_jump_jiffies = jiffies;
742 }
743 *ptr = ctx->start + target;
744 }
745}
746
747static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
748{
749 uint8_t attr = U8((*ptr)++);
750 uint32_t dst, mask, src, saved;
751 int dptr = *ptr;
752 SDEBUG(" dst: ");
753 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
754 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
755 SDEBUG(" mask: 0x%08x", mask);
756 SDEBUG(" src: ");
757 src = atom_get_src(ctx, attr, ptr);
758 dst &= mask;
759 dst |= src;
760 SDEBUG(" dst: ");
761 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
762}
763
764static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
765{
766 uint8_t attr = U8((*ptr)++);
767 uint32_t src, saved;
768 int dptr = *ptr;
769 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
770 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
771 else {
772 atom_skip_dst(ctx, arg, attr, ptr);
773 saved = 0xCDCDCDCD;
774 }
775 SDEBUG(" src: ");
776 src = atom_get_src(ctx, attr, ptr);
777 SDEBUG(" dst: ");
778 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
779}
780
781static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
782{
783 uint8_t attr = U8((*ptr)++);
784 uint32_t dst, src;
785 SDEBUG(" src1: ");
786 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
787 SDEBUG(" src2: ");
788 src = atom_get_src(ctx, attr, ptr);
789 ctx->ctx->divmul[0] = dst * src;
790}
791
792static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
793{
794 /* nothing */
795}
796
797static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
798{
799 uint8_t attr = U8((*ptr)++);
800 uint32_t dst, src, saved;
801 int dptr = *ptr;
802 SDEBUG(" dst: ");
803 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
804 SDEBUG(" src: ");
805 src = atom_get_src(ctx, attr, ptr);
806 dst |= src;
807 SDEBUG(" dst: ");
808 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
809}
810
811static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
812{
813 uint8_t val = U8((*ptr)++);
814 SDEBUG("POST card output: 0x%02X\n", val);
815}
816
817static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
818{
819 printk(KERN_INFO "unimplemented!\n");
820}
821
822static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
823{
824 printk(KERN_INFO "unimplemented!\n");
825}
826
827static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
828{
829 printk(KERN_INFO "unimplemented!\n");
830}
831
832static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
833{
834 int idx = U8(*ptr);
835 (*ptr)++;
836 SDEBUG(" block: %d\n", idx);
837 if (!idx)
838 ctx->ctx->data_block = 0;
839 else if (idx == 255)
840 ctx->ctx->data_block = ctx->start;
841 else
842 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
843 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
844}
845
846static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
847{
848 uint8_t attr = U8((*ptr)++);
849 SDEBUG(" fb_base: ");
850 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
851}
852
853static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
854{
855 int port;
856 switch (arg) {
857 case ATOM_PORT_ATI:
858 port = U16(*ptr);
859 if (port < ATOM_IO_NAMES_CNT)
860 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
861 else
862 SDEBUG(" port: %d\n", port);
863 if (!port)
864 ctx->ctx->io_mode = ATOM_IO_MM;
865 else
866 ctx->ctx->io_mode = ATOM_IO_IIO | port;
867 (*ptr) += 2;
868 break;
869 case ATOM_PORT_PCI:
870 ctx->ctx->io_mode = ATOM_IO_PCI;
871 (*ptr)++;
872 break;
873 case ATOM_PORT_SYSIO:
874 ctx->ctx->io_mode = ATOM_IO_SYSIO;
875 (*ptr)++;
876 break;
877 }
878}
879
880static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
881{
882 ctx->ctx->reg_block = U16(*ptr);
883 (*ptr) += 2;
884 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
885}
886
887static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
888{
889 uint8_t attr = U8((*ptr)++), shift;
890 uint32_t saved, dst;
891 int dptr = *ptr;
892 attr &= 0x38;
893 attr |= atom_def_dst[attr >> 3] << 6;
894 SDEBUG(" dst: ");
895 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
896 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
897 SDEBUG(" shift: %d\n", shift);
898 dst <<= shift;
899 SDEBUG(" dst: ");
900 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
901}
902
903static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
904{
905 uint8_t attr = U8((*ptr)++), shift;
906 uint32_t saved, dst;
907 int dptr = *ptr;
908 attr &= 0x38;
909 attr |= atom_def_dst[attr >> 3] << 6;
910 SDEBUG(" dst: ");
911 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
912 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
913 SDEBUG(" shift: %d\n", shift);
914 dst >>= shift;
915 SDEBUG(" dst: ");
916 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
917}
918
919static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
920{
921 uint8_t attr = U8((*ptr)++), shift;
922 uint32_t saved, dst;
923 int dptr = *ptr;
924 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
925 SDEBUG(" dst: ");
926 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
927 /* op needs to full dst value */
928 dst = saved;
929 shift = atom_get_src(ctx, attr, ptr);
930 SDEBUG(" shift: %d\n", shift);
931 dst <<= shift;
932 dst &= atom_arg_mask[dst_align];
933 dst >>= atom_arg_shift[dst_align];
934 SDEBUG(" dst: ");
935 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
936}
937
938static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
939{
940 uint8_t attr = U8((*ptr)++), shift;
941 uint32_t saved, dst;
942 int dptr = *ptr;
943 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
944 SDEBUG(" dst: ");
945 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
946 /* op needs to full dst value */
947 dst = saved;
948 shift = atom_get_src(ctx, attr, ptr);
949 SDEBUG(" shift: %d\n", shift);
950 dst >>= shift;
951 dst &= atom_arg_mask[dst_align];
952 dst >>= atom_arg_shift[dst_align];
953 SDEBUG(" dst: ");
954 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
955}
956
957static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
958{
959 uint8_t attr = U8((*ptr)++);
960 uint32_t dst, src, saved;
961 int dptr = *ptr;
962 SDEBUG(" dst: ");
963 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
964 SDEBUG(" src: ");
965 src = atom_get_src(ctx, attr, ptr);
966 dst -= src;
967 SDEBUG(" dst: ");
968 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
969}
970
971static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
972{
973 uint8_t attr = U8((*ptr)++);
974 uint32_t src, val, target;
975 SDEBUG(" switch: ");
976 src = atom_get_src(ctx, attr, ptr);
977 while (U16(*ptr) != ATOM_CASE_END)
978 if (U8(*ptr) == ATOM_CASE_MAGIC) {
979 (*ptr)++;
980 SDEBUG(" case: ");
981 val =
982 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
983 ptr);
984 target = U16(*ptr);
985 if (val == src) {
986 SDEBUG(" target: %04X\n", target);
987 *ptr = ctx->start + target;
988 return;
989 }
990 (*ptr) += 2;
991 } else {
992 printk(KERN_INFO "Bad case.\n");
993 return;
994 }
995 (*ptr) += 2;
996}
997
998static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
999{
1000 uint8_t attr = U8((*ptr)++);
1001 uint32_t dst, src;
1002 SDEBUG(" src1: ");
1003 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1004 SDEBUG(" src2: ");
1005 src = atom_get_src(ctx, attr, ptr);
1006 ctx->ctx->cs_equal = ((dst & src) == 0);
1007 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1008}
1009
1010static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1011{
1012 uint8_t attr = U8((*ptr)++);
1013 uint32_t dst, src, saved;
1014 int dptr = *ptr;
1015 SDEBUG(" dst: ");
1016 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1017 SDEBUG(" src: ");
1018 src = atom_get_src(ctx, attr, ptr);
1019 dst ^= src;
1020 SDEBUG(" dst: ");
1021 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1022}
1023
1024static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1025{
1026 printk(KERN_INFO "unimplemented!\n");
1027}
1028
1029static struct {
1030 void (*func) (atom_exec_context *, int *, int);
1031 int arg;
1032} opcode_table[ATOM_OP_CNT] = {
1033 {
1034 NULL, 0}, {
1035 atom_op_move, ATOM_ARG_REG}, {
1036 atom_op_move, ATOM_ARG_PS}, {
1037 atom_op_move, ATOM_ARG_WS}, {
1038 atom_op_move, ATOM_ARG_FB}, {
1039 atom_op_move, ATOM_ARG_PLL}, {
1040 atom_op_move, ATOM_ARG_MC}, {
1041 atom_op_and, ATOM_ARG_REG}, {
1042 atom_op_and, ATOM_ARG_PS}, {
1043 atom_op_and, ATOM_ARG_WS}, {
1044 atom_op_and, ATOM_ARG_FB}, {
1045 atom_op_and, ATOM_ARG_PLL}, {
1046 atom_op_and, ATOM_ARG_MC}, {
1047 atom_op_or, ATOM_ARG_REG}, {
1048 atom_op_or, ATOM_ARG_PS}, {
1049 atom_op_or, ATOM_ARG_WS}, {
1050 atom_op_or, ATOM_ARG_FB}, {
1051 atom_op_or, ATOM_ARG_PLL}, {
1052 atom_op_or, ATOM_ARG_MC}, {
1053 atom_op_shift_left, ATOM_ARG_REG}, {
1054 atom_op_shift_left, ATOM_ARG_PS}, {
1055 atom_op_shift_left, ATOM_ARG_WS}, {
1056 atom_op_shift_left, ATOM_ARG_FB}, {
1057 atom_op_shift_left, ATOM_ARG_PLL}, {
1058 atom_op_shift_left, ATOM_ARG_MC}, {
1059 atom_op_shift_right, ATOM_ARG_REG}, {
1060 atom_op_shift_right, ATOM_ARG_PS}, {
1061 atom_op_shift_right, ATOM_ARG_WS}, {
1062 atom_op_shift_right, ATOM_ARG_FB}, {
1063 atom_op_shift_right, ATOM_ARG_PLL}, {
1064 atom_op_shift_right, ATOM_ARG_MC}, {
1065 atom_op_mul, ATOM_ARG_REG}, {
1066 atom_op_mul, ATOM_ARG_PS}, {
1067 atom_op_mul, ATOM_ARG_WS}, {
1068 atom_op_mul, ATOM_ARG_FB}, {
1069 atom_op_mul, ATOM_ARG_PLL}, {
1070 atom_op_mul, ATOM_ARG_MC}, {
1071 atom_op_div, ATOM_ARG_REG}, {
1072 atom_op_div, ATOM_ARG_PS}, {
1073 atom_op_div, ATOM_ARG_WS}, {
1074 atom_op_div, ATOM_ARG_FB}, {
1075 atom_op_div, ATOM_ARG_PLL}, {
1076 atom_op_div, ATOM_ARG_MC}, {
1077 atom_op_add, ATOM_ARG_REG}, {
1078 atom_op_add, ATOM_ARG_PS}, {
1079 atom_op_add, ATOM_ARG_WS}, {
1080 atom_op_add, ATOM_ARG_FB}, {
1081 atom_op_add, ATOM_ARG_PLL}, {
1082 atom_op_add, ATOM_ARG_MC}, {
1083 atom_op_sub, ATOM_ARG_REG}, {
1084 atom_op_sub, ATOM_ARG_PS}, {
1085 atom_op_sub, ATOM_ARG_WS}, {
1086 atom_op_sub, ATOM_ARG_FB}, {
1087 atom_op_sub, ATOM_ARG_PLL}, {
1088 atom_op_sub, ATOM_ARG_MC}, {
1089 atom_op_setport, ATOM_PORT_ATI}, {
1090 atom_op_setport, ATOM_PORT_PCI}, {
1091 atom_op_setport, ATOM_PORT_SYSIO}, {
1092 atom_op_setregblock, 0}, {
1093 atom_op_setfbbase, 0}, {
1094 atom_op_compare, ATOM_ARG_REG}, {
1095 atom_op_compare, ATOM_ARG_PS}, {
1096 atom_op_compare, ATOM_ARG_WS}, {
1097 atom_op_compare, ATOM_ARG_FB}, {
1098 atom_op_compare, ATOM_ARG_PLL}, {
1099 atom_op_compare, ATOM_ARG_MC}, {
1100 atom_op_switch, 0}, {
1101 atom_op_jump, ATOM_COND_ALWAYS}, {
1102 atom_op_jump, ATOM_COND_EQUAL}, {
1103 atom_op_jump, ATOM_COND_BELOW}, {
1104 atom_op_jump, ATOM_COND_ABOVE}, {
1105 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1106 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1107 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1108 atom_op_test, ATOM_ARG_REG}, {
1109 atom_op_test, ATOM_ARG_PS}, {
1110 atom_op_test, ATOM_ARG_WS}, {
1111 atom_op_test, ATOM_ARG_FB}, {
1112 atom_op_test, ATOM_ARG_PLL}, {
1113 atom_op_test, ATOM_ARG_MC}, {
1114 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1115 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1116 atom_op_calltable, 0}, {
1117 atom_op_repeat, 0}, {
1118 atom_op_clear, ATOM_ARG_REG}, {
1119 atom_op_clear, ATOM_ARG_PS}, {
1120 atom_op_clear, ATOM_ARG_WS}, {
1121 atom_op_clear, ATOM_ARG_FB}, {
1122 atom_op_clear, ATOM_ARG_PLL}, {
1123 atom_op_clear, ATOM_ARG_MC}, {
1124 atom_op_nop, 0}, {
1125 atom_op_eot, 0}, {
1126 atom_op_mask, ATOM_ARG_REG}, {
1127 atom_op_mask, ATOM_ARG_PS}, {
1128 atom_op_mask, ATOM_ARG_WS}, {
1129 atom_op_mask, ATOM_ARG_FB}, {
1130 atom_op_mask, ATOM_ARG_PLL}, {
1131 atom_op_mask, ATOM_ARG_MC}, {
1132 atom_op_postcard, 0}, {
1133 atom_op_beep, 0}, {
1134 atom_op_savereg, 0}, {
1135 atom_op_restorereg, 0}, {
1136 atom_op_setdatablock, 0}, {
1137 atom_op_xor, ATOM_ARG_REG}, {
1138 atom_op_xor, ATOM_ARG_PS}, {
1139 atom_op_xor, ATOM_ARG_WS}, {
1140 atom_op_xor, ATOM_ARG_FB}, {
1141 atom_op_xor, ATOM_ARG_PLL}, {
1142 atom_op_xor, ATOM_ARG_MC}, {
1143 atom_op_shl, ATOM_ARG_REG}, {
1144 atom_op_shl, ATOM_ARG_PS}, {
1145 atom_op_shl, ATOM_ARG_WS}, {
1146 atom_op_shl, ATOM_ARG_FB}, {
1147 atom_op_shl, ATOM_ARG_PLL}, {
1148 atom_op_shl, ATOM_ARG_MC}, {
1149 atom_op_shr, ATOM_ARG_REG}, {
1150 atom_op_shr, ATOM_ARG_PS}, {
1151 atom_op_shr, ATOM_ARG_WS}, {
1152 atom_op_shr, ATOM_ARG_FB}, {
1153 atom_op_shr, ATOM_ARG_PLL}, {
1154 atom_op_shr, ATOM_ARG_MC}, {
1155atom_op_debug, 0},};
1156
1157static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1158{
1159 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1160 int len, ws, ps, ptr;
1161 unsigned char op;
1162 atom_exec_context ectx;
1163 int ret = 0;
1164
1165 if (!base)
1166 return -EINVAL;
1167
1168 len = CU16(base + ATOM_CT_SIZE_PTR);
1169 ws = CU8(base + ATOM_CT_WS_PTR);
1170 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1171 ptr = base + ATOM_CT_CODE_PTR;
1172
1173 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1174
1175 ectx.ctx = ctx;
1176 ectx.ps_shift = ps / 4;
1177 ectx.start = base;
1178 ectx.ps = params;
1179 ectx.abort = false;
1180 ectx.last_jump = 0;
1181 if (ws)
1182 ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
1183 else
1184 ectx.ws = NULL;
1185
1186 debug_depth++;
1187 while (1) {
1188 op = CU8(ptr++);
1189 if (op < ATOM_OP_NAMES_CNT)
1190 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1191 else
1192 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1193 if (ectx.abort) {
1194 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1195 base, len, ws, ps, ptr - 1);
1196 ret = -EINVAL;
1197 goto free;
1198 }
1199
1200 if (op < ATOM_OP_CNT && op > 0)
1201 opcode_table[op].func(&ectx, &ptr,
1202 opcode_table[op].arg);
1203 else
1204 break;
1205
1206 if (op == ATOM_OP_EOT)
1207 break;
1208 }
1209 debug_depth--;
1210 SDEBUG("<<\n");
1211
1212free:
1213 if (ws)
1214 kfree(ectx.ws);
1215 return ret;
1216}
1217
1218int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1219{
1220 int r;
1221
1222 mutex_lock(&ctx->mutex);
1223 /* reset reg block */
1224 ctx->reg_block = 0;
1225 /* reset fb window */
1226 ctx->fb_base = 0;
1227 /* reset io mode */
1228 ctx->io_mode = ATOM_IO_MM;
1229 r = atom_execute_table_locked(ctx, index, params);
1230 mutex_unlock(&ctx->mutex);
1231 return r;
1232}
1233
1234static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1235
1236static void atom_index_iio(struct atom_context *ctx, int base)
1237{
1238 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1239 while (CU8(base) == ATOM_IIO_START) {
1240 ctx->iio[CU8(base + 1)] = base + 2;
1241 base += 2;
1242 while (CU8(base) != ATOM_IIO_END)
1243 base += atom_iio_len[CU8(base)];
1244 base += 3;
1245 }
1246}
1247
1248struct atom_context *atom_parse(struct card_info *card, void *bios)
1249{
1250 int base;
1251 struct atom_context *ctx =
1252 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1253 char *str;
1254 char name[512];
1255 int i;
1256
1257 if (!ctx)
1258 return NULL;
1259
1260 ctx->card = card;
1261 ctx->bios = bios;
1262
1263 if (CU16(0) != ATOM_BIOS_MAGIC) {
1264 printk(KERN_INFO "Invalid BIOS magic.\n");
1265 kfree(ctx);
1266 return NULL;
1267 }
1268 if (strncmp
1269 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1270 strlen(ATOM_ATI_MAGIC))) {
1271 printk(KERN_INFO "Invalid ATI magic.\n");
1272 kfree(ctx);
1273 return NULL;
1274 }
1275
1276 base = CU16(ATOM_ROM_TABLE_PTR);
1277 if (strncmp
1278 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1279 strlen(ATOM_ROM_MAGIC))) {
1280 printk(KERN_INFO "Invalid ATOM magic.\n");
1281 kfree(ctx);
1282 return NULL;
1283 }
1284
1285 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1286 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1287 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1288
1289 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1290 while (*str && ((*str == '\n') || (*str == '\r')))
1291 str++;
1292 /* name string isn't always 0 terminated */
1293 for (i = 0; i < 511; i++) {
1294 name[i] = str[i];
1295 if (name[i] < '.' || name[i] > 'z') {
1296 name[i] = 0;
1297 break;
1298 }
1299 }
1300 printk(KERN_INFO "ATOM BIOS: %s\n", name);
1301
1302 return ctx;
1303}
1304
1305int atom_asic_init(struct atom_context *ctx)
1306{
1307 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1308 uint32_t ps[16];
1309 memset(ps, 0, 64);
1310
1311 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1312 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1313 if (!ps[0] || !ps[1])
1314 return 1;
1315
1316 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1317 return 1;
1318 return atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1319}
1320
1321void atom_destroy(struct atom_context *ctx)
1322{
1323 if (ctx->iio)
1324 kfree(ctx->iio);
1325 kfree(ctx);
1326}
1327
1328bool atom_parse_data_header(struct atom_context *ctx, int index,
1329 uint16_t * size, uint8_t * frev, uint8_t * crev,
1330 uint16_t * data_start)
1331{
1332 int offset = index * 2 + 4;
1333 int idx = CU16(ctx->data_table + offset);
1334 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1335
1336 if (!mdt[index])
1337 return false;
1338
1339 if (size)
1340 *size = CU16(idx);
1341 if (frev)
1342 *frev = CU8(idx + 2);
1343 if (crev)
1344 *crev = CU8(idx + 3);
1345 *data_start = idx;
1346 return true;
1347}
1348
1349bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1350 uint8_t * crev)
1351{
1352 int offset = index * 2 + 4;
1353 int idx = CU16(ctx->cmd_table + offset);
1354 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1355
1356 if (!mct[index])
1357 return false;
1358
1359 if (frev)
1360 *frev = CU8(idx + 2);
1361 if (crev)
1362 *crev = CU8(idx + 3);
1363 return true;
1364}
1365
1366int atom_allocate_fb_scratch(struct atom_context *ctx)
1367{
1368 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1369 uint16_t data_offset;
1370 int usage_bytes = 0;
1371 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1372
1373 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1374 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1375
1376 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1377 firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware,
1378 firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb);
1379
1380 usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024;
1381 }
1382 ctx->scratch_size_bytes = 0;
1383 if (usage_bytes == 0)
1384 usage_bytes = 20 * 1024;
1385 /* allocate some scratch memory */
1386 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1387 if (!ctx->scratch)
1388 return -ENOMEM;
1389 ctx->scratch_size_bytes = usage_bytes;
1390 return 0;
1391}
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28
29#include <asm/unaligned.h>
30
31#include <drm/drm_device.h>
32#include <drm/drm_util.h>
33
34#define ATOM_DEBUG
35
36#include "atom.h"
37#include "atom-names.h"
38#include "atom-bits.h"
39#include "radeon.h"
40
41#define ATOM_COND_ABOVE 0
42#define ATOM_COND_ABOVEOREQUAL 1
43#define ATOM_COND_ALWAYS 2
44#define ATOM_COND_BELOW 3
45#define ATOM_COND_BELOWOREQUAL 4
46#define ATOM_COND_EQUAL 5
47#define ATOM_COND_NOTEQUAL 6
48
49#define ATOM_PORT_ATI 0
50#define ATOM_PORT_PCI 1
51#define ATOM_PORT_SYSIO 2
52
53#define ATOM_UNIT_MICROSEC 0
54#define ATOM_UNIT_MILLISEC 1
55
56#define PLL_INDEX 2
57#define PLL_DATA 3
58
59typedef struct {
60 struct atom_context *ctx;
61 uint32_t *ps, *ws;
62 int ps_shift;
63 uint16_t start;
64 unsigned last_jump;
65 unsigned long last_jump_jiffies;
66 bool abort;
67} atom_exec_context;
68
69int atom_debug = 0;
70static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
71int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
72
73static uint32_t atom_arg_mask[8] = {
74 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
75 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
76};
77static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
78
79static int atom_dst_to_src[8][4] = {
80 /* translate destination alignment field to the source alignment encoding */
81 {0, 0, 0, 0},
82 {1, 2, 3, 0},
83 {1, 2, 3, 0},
84 {1, 2, 3, 0},
85 {4, 5, 6, 7},
86 {4, 5, 6, 7},
87 {4, 5, 6, 7},
88 {4, 5, 6, 7},
89};
90static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
91
92static int debug_depth = 0;
93#ifdef ATOM_DEBUG
94static void debug_print_spaces(int n)
95{
96 while (n--)
97 printk(" ");
98}
99
100#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
101#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
102#else
103#define DEBUG(...) do { } while (0)
104#define SDEBUG(...) do { } while (0)
105#endif
106
107static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
108 uint32_t index, uint32_t data)
109{
110 struct radeon_device *rdev = ctx->card->dev->dev_private;
111 uint32_t temp = 0xCDCDCDCD;
112
113 while (1)
114 switch (CU8(base)) {
115 case ATOM_IIO_NOP:
116 base++;
117 break;
118 case ATOM_IIO_READ:
119 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
120 base += 3;
121 break;
122 case ATOM_IIO_WRITE:
123 if (rdev->family == CHIP_RV515)
124 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
125 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
126 base += 3;
127 break;
128 case ATOM_IIO_CLEAR:
129 temp &=
130 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
131 CU8(base + 2));
132 base += 3;
133 break;
134 case ATOM_IIO_SET:
135 temp |=
136 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
137 2);
138 base += 3;
139 break;
140 case ATOM_IIO_MOVE_INDEX:
141 temp &=
142 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
143 CU8(base + 3));
144 temp |=
145 ((index >> CU8(base + 2)) &
146 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
147 3);
148 base += 4;
149 break;
150 case ATOM_IIO_MOVE_DATA:
151 temp &=
152 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
153 CU8(base + 3));
154 temp |=
155 ((data >> CU8(base + 2)) &
156 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
157 3);
158 base += 4;
159 break;
160 case ATOM_IIO_MOVE_ATTR:
161 temp &=
162 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
163 CU8(base + 3));
164 temp |=
165 ((ctx->
166 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
167 CU8
168 (base
169 +
170 1))))
171 << CU8(base + 3);
172 base += 4;
173 break;
174 case ATOM_IIO_END:
175 return temp;
176 default:
177 pr_info("Unknown IIO opcode\n");
178 return 0;
179 }
180}
181
182static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
183 int *ptr, uint32_t *saved, int print)
184{
185 uint32_t idx, val = 0xCDCDCDCD, align, arg;
186 struct atom_context *gctx = ctx->ctx;
187 arg = attr & 7;
188 align = (attr >> 3) & 7;
189 switch (arg) {
190 case ATOM_ARG_REG:
191 idx = U16(*ptr);
192 (*ptr) += 2;
193 if (print)
194 DEBUG("REG[0x%04X]", idx);
195 idx += gctx->reg_block;
196 switch (gctx->io_mode) {
197 case ATOM_IO_MM:
198 val = gctx->card->reg_read(gctx->card, idx);
199 break;
200 case ATOM_IO_PCI:
201 pr_info("PCI registers are not implemented\n");
202 return 0;
203 case ATOM_IO_SYSIO:
204 pr_info("SYSIO registers are not implemented\n");
205 return 0;
206 default:
207 if (!(gctx->io_mode & 0x80)) {
208 pr_info("Bad IO mode\n");
209 return 0;
210 }
211 if (!gctx->iio[gctx->io_mode & 0x7F]) {
212 pr_info("Undefined indirect IO read method %d\n",
213 gctx->io_mode & 0x7F);
214 return 0;
215 }
216 val =
217 atom_iio_execute(gctx,
218 gctx->iio[gctx->io_mode & 0x7F],
219 idx, 0);
220 }
221 break;
222 case ATOM_ARG_PS:
223 idx = U8(*ptr);
224 (*ptr)++;
225 /* get_unaligned_le32 avoids unaligned accesses from atombios
226 * tables, noticed on a DEC Alpha. */
227 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
228 if (print)
229 DEBUG("PS[0x%02X,0x%04X]", idx, val);
230 break;
231 case ATOM_ARG_WS:
232 idx = U8(*ptr);
233 (*ptr)++;
234 if (print)
235 DEBUG("WS[0x%02X]", idx);
236 switch (idx) {
237 case ATOM_WS_QUOTIENT:
238 val = gctx->divmul[0];
239 break;
240 case ATOM_WS_REMAINDER:
241 val = gctx->divmul[1];
242 break;
243 case ATOM_WS_DATAPTR:
244 val = gctx->data_block;
245 break;
246 case ATOM_WS_SHIFT:
247 val = gctx->shift;
248 break;
249 case ATOM_WS_OR_MASK:
250 val = 1 << gctx->shift;
251 break;
252 case ATOM_WS_AND_MASK:
253 val = ~(1 << gctx->shift);
254 break;
255 case ATOM_WS_FB_WINDOW:
256 val = gctx->fb_base;
257 break;
258 case ATOM_WS_ATTRIBUTES:
259 val = gctx->io_attr;
260 break;
261 case ATOM_WS_REGPTR:
262 val = gctx->reg_block;
263 break;
264 default:
265 val = ctx->ws[idx];
266 }
267 break;
268 case ATOM_ARG_ID:
269 idx = U16(*ptr);
270 (*ptr) += 2;
271 if (print) {
272 if (gctx->data_block)
273 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
274 else
275 DEBUG("ID[0x%04X]", idx);
276 }
277 val = U32(idx + gctx->data_block);
278 break;
279 case ATOM_ARG_FB:
280 idx = U8(*ptr);
281 (*ptr)++;
282 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
283 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
284 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
285 val = 0;
286 } else
287 val = gctx->scratch[(gctx->fb_base / 4) + idx];
288 if (print)
289 DEBUG("FB[0x%02X]", idx);
290 break;
291 case ATOM_ARG_IMM:
292 switch (align) {
293 case ATOM_SRC_DWORD:
294 val = U32(*ptr);
295 (*ptr) += 4;
296 if (print)
297 DEBUG("IMM 0x%08X\n", val);
298 return val;
299 case ATOM_SRC_WORD0:
300 case ATOM_SRC_WORD8:
301 case ATOM_SRC_WORD16:
302 val = U16(*ptr);
303 (*ptr) += 2;
304 if (print)
305 DEBUG("IMM 0x%04X\n", val);
306 return val;
307 case ATOM_SRC_BYTE0:
308 case ATOM_SRC_BYTE8:
309 case ATOM_SRC_BYTE16:
310 case ATOM_SRC_BYTE24:
311 val = U8(*ptr);
312 (*ptr)++;
313 if (print)
314 DEBUG("IMM 0x%02X\n", val);
315 return val;
316 }
317 return 0;
318 case ATOM_ARG_PLL:
319 idx = U8(*ptr);
320 (*ptr)++;
321 if (print)
322 DEBUG("PLL[0x%02X]", idx);
323 val = gctx->card->pll_read(gctx->card, idx);
324 break;
325 case ATOM_ARG_MC:
326 idx = U8(*ptr);
327 (*ptr)++;
328 if (print)
329 DEBUG("MC[0x%02X]", idx);
330 val = gctx->card->mc_read(gctx->card, idx);
331 break;
332 }
333 if (saved)
334 *saved = val;
335 val &= atom_arg_mask[align];
336 val >>= atom_arg_shift[align];
337 if (print)
338 switch (align) {
339 case ATOM_SRC_DWORD:
340 DEBUG(".[31:0] -> 0x%08X\n", val);
341 break;
342 case ATOM_SRC_WORD0:
343 DEBUG(".[15:0] -> 0x%04X\n", val);
344 break;
345 case ATOM_SRC_WORD8:
346 DEBUG(".[23:8] -> 0x%04X\n", val);
347 break;
348 case ATOM_SRC_WORD16:
349 DEBUG(".[31:16] -> 0x%04X\n", val);
350 break;
351 case ATOM_SRC_BYTE0:
352 DEBUG(".[7:0] -> 0x%02X\n", val);
353 break;
354 case ATOM_SRC_BYTE8:
355 DEBUG(".[15:8] -> 0x%02X\n", val);
356 break;
357 case ATOM_SRC_BYTE16:
358 DEBUG(".[23:16] -> 0x%02X\n", val);
359 break;
360 case ATOM_SRC_BYTE24:
361 DEBUG(".[31:24] -> 0x%02X\n", val);
362 break;
363 }
364 return val;
365}
366
367static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
368{
369 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
370 switch (arg) {
371 case ATOM_ARG_REG:
372 case ATOM_ARG_ID:
373 (*ptr) += 2;
374 break;
375 case ATOM_ARG_PLL:
376 case ATOM_ARG_MC:
377 case ATOM_ARG_PS:
378 case ATOM_ARG_WS:
379 case ATOM_ARG_FB:
380 (*ptr)++;
381 break;
382 case ATOM_ARG_IMM:
383 switch (align) {
384 case ATOM_SRC_DWORD:
385 (*ptr) += 4;
386 return;
387 case ATOM_SRC_WORD0:
388 case ATOM_SRC_WORD8:
389 case ATOM_SRC_WORD16:
390 (*ptr) += 2;
391 return;
392 case ATOM_SRC_BYTE0:
393 case ATOM_SRC_BYTE8:
394 case ATOM_SRC_BYTE16:
395 case ATOM_SRC_BYTE24:
396 (*ptr)++;
397 return;
398 }
399 return;
400 }
401}
402
403static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
404{
405 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
406}
407
408static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
409{
410 uint32_t val = 0xCDCDCDCD;
411
412 switch (align) {
413 case ATOM_SRC_DWORD:
414 val = U32(*ptr);
415 (*ptr) += 4;
416 break;
417 case ATOM_SRC_WORD0:
418 case ATOM_SRC_WORD8:
419 case ATOM_SRC_WORD16:
420 val = U16(*ptr);
421 (*ptr) += 2;
422 break;
423 case ATOM_SRC_BYTE0:
424 case ATOM_SRC_BYTE8:
425 case ATOM_SRC_BYTE16:
426 case ATOM_SRC_BYTE24:
427 val = U8(*ptr);
428 (*ptr)++;
429 break;
430 }
431 return val;
432}
433
434static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
435 int *ptr, uint32_t *saved, int print)
436{
437 return atom_get_src_int(ctx,
438 arg | atom_dst_to_src[(attr >> 3) &
439 7][(attr >> 6) & 3] << 3,
440 ptr, saved, print);
441}
442
443static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
444{
445 atom_skip_src_int(ctx,
446 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
447 3] << 3, ptr);
448}
449
450static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
451 int *ptr, uint32_t val, uint32_t saved)
452{
453 uint32_t align =
454 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
455 val, idx;
456 struct atom_context *gctx = ctx->ctx;
457 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
458 val <<= atom_arg_shift[align];
459 val &= atom_arg_mask[align];
460 saved &= ~atom_arg_mask[align];
461 val |= saved;
462 switch (arg) {
463 case ATOM_ARG_REG:
464 idx = U16(*ptr);
465 (*ptr) += 2;
466 DEBUG("REG[0x%04X]", idx);
467 idx += gctx->reg_block;
468 switch (gctx->io_mode) {
469 case ATOM_IO_MM:
470 if (idx == 0)
471 gctx->card->reg_write(gctx->card, idx,
472 val << 2);
473 else
474 gctx->card->reg_write(gctx->card, idx, val);
475 break;
476 case ATOM_IO_PCI:
477 pr_info("PCI registers are not implemented\n");
478 return;
479 case ATOM_IO_SYSIO:
480 pr_info("SYSIO registers are not implemented\n");
481 return;
482 default:
483 if (!(gctx->io_mode & 0x80)) {
484 pr_info("Bad IO mode\n");
485 return;
486 }
487 if (!gctx->iio[gctx->io_mode & 0xFF]) {
488 pr_info("Undefined indirect IO write method %d\n",
489 gctx->io_mode & 0x7F);
490 return;
491 }
492 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
493 idx, val);
494 }
495 break;
496 case ATOM_ARG_PS:
497 idx = U8(*ptr);
498 (*ptr)++;
499 DEBUG("PS[0x%02X]", idx);
500 ctx->ps[idx] = cpu_to_le32(val);
501 break;
502 case ATOM_ARG_WS:
503 idx = U8(*ptr);
504 (*ptr)++;
505 DEBUG("WS[0x%02X]", idx);
506 switch (idx) {
507 case ATOM_WS_QUOTIENT:
508 gctx->divmul[0] = val;
509 break;
510 case ATOM_WS_REMAINDER:
511 gctx->divmul[1] = val;
512 break;
513 case ATOM_WS_DATAPTR:
514 gctx->data_block = val;
515 break;
516 case ATOM_WS_SHIFT:
517 gctx->shift = val;
518 break;
519 case ATOM_WS_OR_MASK:
520 case ATOM_WS_AND_MASK:
521 break;
522 case ATOM_WS_FB_WINDOW:
523 gctx->fb_base = val;
524 break;
525 case ATOM_WS_ATTRIBUTES:
526 gctx->io_attr = val;
527 break;
528 case ATOM_WS_REGPTR:
529 gctx->reg_block = val;
530 break;
531 default:
532 ctx->ws[idx] = val;
533 }
534 break;
535 case ATOM_ARG_FB:
536 idx = U8(*ptr);
537 (*ptr)++;
538 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
539 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
540 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
541 } else
542 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
543 DEBUG("FB[0x%02X]", idx);
544 break;
545 case ATOM_ARG_PLL:
546 idx = U8(*ptr);
547 (*ptr)++;
548 DEBUG("PLL[0x%02X]", idx);
549 gctx->card->pll_write(gctx->card, idx, val);
550 break;
551 case ATOM_ARG_MC:
552 idx = U8(*ptr);
553 (*ptr)++;
554 DEBUG("MC[0x%02X]", idx);
555 gctx->card->mc_write(gctx->card, idx, val);
556 return;
557 }
558 switch (align) {
559 case ATOM_SRC_DWORD:
560 DEBUG(".[31:0] <- 0x%08X\n", old_val);
561 break;
562 case ATOM_SRC_WORD0:
563 DEBUG(".[15:0] <- 0x%04X\n", old_val);
564 break;
565 case ATOM_SRC_WORD8:
566 DEBUG(".[23:8] <- 0x%04X\n", old_val);
567 break;
568 case ATOM_SRC_WORD16:
569 DEBUG(".[31:16] <- 0x%04X\n", old_val);
570 break;
571 case ATOM_SRC_BYTE0:
572 DEBUG(".[7:0] <- 0x%02X\n", old_val);
573 break;
574 case ATOM_SRC_BYTE8:
575 DEBUG(".[15:8] <- 0x%02X\n", old_val);
576 break;
577 case ATOM_SRC_BYTE16:
578 DEBUG(".[23:16] <- 0x%02X\n", old_val);
579 break;
580 case ATOM_SRC_BYTE24:
581 DEBUG(".[31:24] <- 0x%02X\n", old_val);
582 break;
583 }
584}
585
586static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
587{
588 uint8_t attr = U8((*ptr)++);
589 uint32_t dst, src, saved;
590 int dptr = *ptr;
591 SDEBUG(" dst: ");
592 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
593 SDEBUG(" src: ");
594 src = atom_get_src(ctx, attr, ptr);
595 dst += src;
596 SDEBUG(" dst: ");
597 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
598}
599
600static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
601{
602 uint8_t attr = U8((*ptr)++);
603 uint32_t dst, src, saved;
604 int dptr = *ptr;
605 SDEBUG(" dst: ");
606 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
607 SDEBUG(" src: ");
608 src = atom_get_src(ctx, attr, ptr);
609 dst &= src;
610 SDEBUG(" dst: ");
611 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
612}
613
614static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
615{
616 printk("ATOM BIOS beeped!\n");
617}
618
619static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
620{
621 int idx = U8((*ptr)++);
622 int r = 0;
623
624 if (idx < ATOM_TABLE_NAMES_CNT)
625 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
626 else
627 SDEBUG(" table: %d\n", idx);
628 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
629 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
630 if (r) {
631 ctx->abort = true;
632 }
633}
634
635static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
636{
637 uint8_t attr = U8((*ptr)++);
638 uint32_t saved;
639 int dptr = *ptr;
640 attr &= 0x38;
641 attr |= atom_def_dst[attr >> 3] << 6;
642 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
643 SDEBUG(" dst: ");
644 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
645}
646
647static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
648{
649 uint8_t attr = U8((*ptr)++);
650 uint32_t dst, src;
651 SDEBUG(" src1: ");
652 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
653 SDEBUG(" src2: ");
654 src = atom_get_src(ctx, attr, ptr);
655 ctx->ctx->cs_equal = (dst == src);
656 ctx->ctx->cs_above = (dst > src);
657 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
658 ctx->ctx->cs_above ? "GT" : "LE");
659}
660
661static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
662{
663 unsigned count = U8((*ptr)++);
664 SDEBUG(" count: %d\n", count);
665 if (arg == ATOM_UNIT_MICROSEC)
666 udelay(count);
667 else if (!drm_can_sleep())
668 mdelay(count);
669 else
670 msleep(count);
671}
672
673static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
674{
675 uint8_t attr = U8((*ptr)++);
676 uint32_t dst, src;
677 SDEBUG(" src1: ");
678 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
679 SDEBUG(" src2: ");
680 src = atom_get_src(ctx, attr, ptr);
681 if (src != 0) {
682 ctx->ctx->divmul[0] = dst / src;
683 ctx->ctx->divmul[1] = dst % src;
684 } else {
685 ctx->ctx->divmul[0] = 0;
686 ctx->ctx->divmul[1] = 0;
687 }
688}
689
690static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
691{
692 /* functionally, a nop */
693}
694
695static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
696{
697 int execute = 0, target = U16(*ptr);
698 unsigned long cjiffies;
699
700 (*ptr) += 2;
701 switch (arg) {
702 case ATOM_COND_ABOVE:
703 execute = ctx->ctx->cs_above;
704 break;
705 case ATOM_COND_ABOVEOREQUAL:
706 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
707 break;
708 case ATOM_COND_ALWAYS:
709 execute = 1;
710 break;
711 case ATOM_COND_BELOW:
712 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
713 break;
714 case ATOM_COND_BELOWOREQUAL:
715 execute = !ctx->ctx->cs_above;
716 break;
717 case ATOM_COND_EQUAL:
718 execute = ctx->ctx->cs_equal;
719 break;
720 case ATOM_COND_NOTEQUAL:
721 execute = !ctx->ctx->cs_equal;
722 break;
723 }
724 if (arg != ATOM_COND_ALWAYS)
725 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
726 SDEBUG(" target: 0x%04X\n", target);
727 if (execute) {
728 if (ctx->last_jump == (ctx->start + target)) {
729 cjiffies = jiffies;
730 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
731 cjiffies -= ctx->last_jump_jiffies;
732 if ((jiffies_to_msecs(cjiffies) > 5000)) {
733 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
734 ctx->abort = true;
735 }
736 } else {
737 /* jiffies wrap around we will just wait a little longer */
738 ctx->last_jump_jiffies = jiffies;
739 }
740 } else {
741 ctx->last_jump = ctx->start + target;
742 ctx->last_jump_jiffies = jiffies;
743 }
744 *ptr = ctx->start + target;
745 }
746}
747
748static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
749{
750 uint8_t attr = U8((*ptr)++);
751 uint32_t dst, mask, src, saved;
752 int dptr = *ptr;
753 SDEBUG(" dst: ");
754 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
755 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
756 SDEBUG(" mask: 0x%08x", mask);
757 SDEBUG(" src: ");
758 src = atom_get_src(ctx, attr, ptr);
759 dst &= mask;
760 dst |= src;
761 SDEBUG(" dst: ");
762 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
763}
764
765static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
766{
767 uint8_t attr = U8((*ptr)++);
768 uint32_t src, saved;
769 int dptr = *ptr;
770 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
771 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
772 else {
773 atom_skip_dst(ctx, arg, attr, ptr);
774 saved = 0xCDCDCDCD;
775 }
776 SDEBUG(" src: ");
777 src = atom_get_src(ctx, attr, ptr);
778 SDEBUG(" dst: ");
779 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
780}
781
782static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
783{
784 uint8_t attr = U8((*ptr)++);
785 uint32_t dst, src;
786 SDEBUG(" src1: ");
787 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
788 SDEBUG(" src2: ");
789 src = atom_get_src(ctx, attr, ptr);
790 ctx->ctx->divmul[0] = dst * src;
791}
792
793static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
794{
795 /* nothing */
796}
797
798static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
799{
800 uint8_t attr = U8((*ptr)++);
801 uint32_t dst, src, saved;
802 int dptr = *ptr;
803 SDEBUG(" dst: ");
804 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
805 SDEBUG(" src: ");
806 src = atom_get_src(ctx, attr, ptr);
807 dst |= src;
808 SDEBUG(" dst: ");
809 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
810}
811
812static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
813{
814 uint8_t val = U8((*ptr)++);
815 SDEBUG("POST card output: 0x%02X\n", val);
816}
817
818static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
819{
820 pr_info("unimplemented!\n");
821}
822
823static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
824{
825 pr_info("unimplemented!\n");
826}
827
828static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
829{
830 pr_info("unimplemented!\n");
831}
832
833static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
834{
835 int idx = U8(*ptr);
836 (*ptr)++;
837 SDEBUG(" block: %d\n", idx);
838 if (!idx)
839 ctx->ctx->data_block = 0;
840 else if (idx == 255)
841 ctx->ctx->data_block = ctx->start;
842 else
843 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
844 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
845}
846
847static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
848{
849 uint8_t attr = U8((*ptr)++);
850 SDEBUG(" fb_base: ");
851 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
852}
853
854static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
855{
856 int port;
857 switch (arg) {
858 case ATOM_PORT_ATI:
859 port = U16(*ptr);
860 if (port < ATOM_IO_NAMES_CNT)
861 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
862 else
863 SDEBUG(" port: %d\n", port);
864 if (!port)
865 ctx->ctx->io_mode = ATOM_IO_MM;
866 else
867 ctx->ctx->io_mode = ATOM_IO_IIO | port;
868 (*ptr) += 2;
869 break;
870 case ATOM_PORT_PCI:
871 ctx->ctx->io_mode = ATOM_IO_PCI;
872 (*ptr)++;
873 break;
874 case ATOM_PORT_SYSIO:
875 ctx->ctx->io_mode = ATOM_IO_SYSIO;
876 (*ptr)++;
877 break;
878 }
879}
880
881static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
882{
883 ctx->ctx->reg_block = U16(*ptr);
884 (*ptr) += 2;
885 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
886}
887
888static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
889{
890 uint8_t attr = U8((*ptr)++), shift;
891 uint32_t saved, dst;
892 int dptr = *ptr;
893 attr &= 0x38;
894 attr |= atom_def_dst[attr >> 3] << 6;
895 SDEBUG(" dst: ");
896 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
897 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
898 SDEBUG(" shift: %d\n", shift);
899 dst <<= shift;
900 SDEBUG(" dst: ");
901 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
902}
903
904static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
905{
906 uint8_t attr = U8((*ptr)++), shift;
907 uint32_t saved, dst;
908 int dptr = *ptr;
909 attr &= 0x38;
910 attr |= atom_def_dst[attr >> 3] << 6;
911 SDEBUG(" dst: ");
912 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
913 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
914 SDEBUG(" shift: %d\n", shift);
915 dst >>= shift;
916 SDEBUG(" dst: ");
917 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
918}
919
920static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
921{
922 uint8_t attr = U8((*ptr)++), shift;
923 uint32_t saved, dst;
924 int dptr = *ptr;
925 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
926 SDEBUG(" dst: ");
927 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
928 /* op needs to full dst value */
929 dst = saved;
930 shift = atom_get_src(ctx, attr, ptr);
931 SDEBUG(" shift: %d\n", shift);
932 dst <<= shift;
933 dst &= atom_arg_mask[dst_align];
934 dst >>= atom_arg_shift[dst_align];
935 SDEBUG(" dst: ");
936 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
937}
938
939static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
940{
941 uint8_t attr = U8((*ptr)++), shift;
942 uint32_t saved, dst;
943 int dptr = *ptr;
944 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
945 SDEBUG(" dst: ");
946 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
947 /* op needs to full dst value */
948 dst = saved;
949 shift = atom_get_src(ctx, attr, ptr);
950 SDEBUG(" shift: %d\n", shift);
951 dst >>= shift;
952 dst &= atom_arg_mask[dst_align];
953 dst >>= atom_arg_shift[dst_align];
954 SDEBUG(" dst: ");
955 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
956}
957
958static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
959{
960 uint8_t attr = U8((*ptr)++);
961 uint32_t dst, src, saved;
962 int dptr = *ptr;
963 SDEBUG(" dst: ");
964 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
965 SDEBUG(" src: ");
966 src = atom_get_src(ctx, attr, ptr);
967 dst -= src;
968 SDEBUG(" dst: ");
969 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
970}
971
972static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
973{
974 uint8_t attr = U8((*ptr)++);
975 uint32_t src, val, target;
976 SDEBUG(" switch: ");
977 src = atom_get_src(ctx, attr, ptr);
978 while (U16(*ptr) != ATOM_CASE_END)
979 if (U8(*ptr) == ATOM_CASE_MAGIC) {
980 (*ptr)++;
981 SDEBUG(" case: ");
982 val =
983 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
984 ptr);
985 target = U16(*ptr);
986 if (val == src) {
987 SDEBUG(" target: %04X\n", target);
988 *ptr = ctx->start + target;
989 return;
990 }
991 (*ptr) += 2;
992 } else {
993 pr_info("Bad case\n");
994 return;
995 }
996 (*ptr) += 2;
997}
998
999static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1000{
1001 uint8_t attr = U8((*ptr)++);
1002 uint32_t dst, src;
1003 SDEBUG(" src1: ");
1004 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1005 SDEBUG(" src2: ");
1006 src = atom_get_src(ctx, attr, ptr);
1007 ctx->ctx->cs_equal = ((dst & src) == 0);
1008 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1009}
1010
1011static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1012{
1013 uint8_t attr = U8((*ptr)++);
1014 uint32_t dst, src, saved;
1015 int dptr = *ptr;
1016 SDEBUG(" dst: ");
1017 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1018 SDEBUG(" src: ");
1019 src = atom_get_src(ctx, attr, ptr);
1020 dst ^= src;
1021 SDEBUG(" dst: ");
1022 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1023}
1024
1025static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1026{
1027 pr_info("unimplemented!\n");
1028}
1029
1030static struct {
1031 void (*func) (atom_exec_context *, int *, int);
1032 int arg;
1033} opcode_table[ATOM_OP_CNT] = {
1034 {
1035 NULL, 0}, {
1036 atom_op_move, ATOM_ARG_REG}, {
1037 atom_op_move, ATOM_ARG_PS}, {
1038 atom_op_move, ATOM_ARG_WS}, {
1039 atom_op_move, ATOM_ARG_FB}, {
1040 atom_op_move, ATOM_ARG_PLL}, {
1041 atom_op_move, ATOM_ARG_MC}, {
1042 atom_op_and, ATOM_ARG_REG}, {
1043 atom_op_and, ATOM_ARG_PS}, {
1044 atom_op_and, ATOM_ARG_WS}, {
1045 atom_op_and, ATOM_ARG_FB}, {
1046 atom_op_and, ATOM_ARG_PLL}, {
1047 atom_op_and, ATOM_ARG_MC}, {
1048 atom_op_or, ATOM_ARG_REG}, {
1049 atom_op_or, ATOM_ARG_PS}, {
1050 atom_op_or, ATOM_ARG_WS}, {
1051 atom_op_or, ATOM_ARG_FB}, {
1052 atom_op_or, ATOM_ARG_PLL}, {
1053 atom_op_or, ATOM_ARG_MC}, {
1054 atom_op_shift_left, ATOM_ARG_REG}, {
1055 atom_op_shift_left, ATOM_ARG_PS}, {
1056 atom_op_shift_left, ATOM_ARG_WS}, {
1057 atom_op_shift_left, ATOM_ARG_FB}, {
1058 atom_op_shift_left, ATOM_ARG_PLL}, {
1059 atom_op_shift_left, ATOM_ARG_MC}, {
1060 atom_op_shift_right, ATOM_ARG_REG}, {
1061 atom_op_shift_right, ATOM_ARG_PS}, {
1062 atom_op_shift_right, ATOM_ARG_WS}, {
1063 atom_op_shift_right, ATOM_ARG_FB}, {
1064 atom_op_shift_right, ATOM_ARG_PLL}, {
1065 atom_op_shift_right, ATOM_ARG_MC}, {
1066 atom_op_mul, ATOM_ARG_REG}, {
1067 atom_op_mul, ATOM_ARG_PS}, {
1068 atom_op_mul, ATOM_ARG_WS}, {
1069 atom_op_mul, ATOM_ARG_FB}, {
1070 atom_op_mul, ATOM_ARG_PLL}, {
1071 atom_op_mul, ATOM_ARG_MC}, {
1072 atom_op_div, ATOM_ARG_REG}, {
1073 atom_op_div, ATOM_ARG_PS}, {
1074 atom_op_div, ATOM_ARG_WS}, {
1075 atom_op_div, ATOM_ARG_FB}, {
1076 atom_op_div, ATOM_ARG_PLL}, {
1077 atom_op_div, ATOM_ARG_MC}, {
1078 atom_op_add, ATOM_ARG_REG}, {
1079 atom_op_add, ATOM_ARG_PS}, {
1080 atom_op_add, ATOM_ARG_WS}, {
1081 atom_op_add, ATOM_ARG_FB}, {
1082 atom_op_add, ATOM_ARG_PLL}, {
1083 atom_op_add, ATOM_ARG_MC}, {
1084 atom_op_sub, ATOM_ARG_REG}, {
1085 atom_op_sub, ATOM_ARG_PS}, {
1086 atom_op_sub, ATOM_ARG_WS}, {
1087 atom_op_sub, ATOM_ARG_FB}, {
1088 atom_op_sub, ATOM_ARG_PLL}, {
1089 atom_op_sub, ATOM_ARG_MC}, {
1090 atom_op_setport, ATOM_PORT_ATI}, {
1091 atom_op_setport, ATOM_PORT_PCI}, {
1092 atom_op_setport, ATOM_PORT_SYSIO}, {
1093 atom_op_setregblock, 0}, {
1094 atom_op_setfbbase, 0}, {
1095 atom_op_compare, ATOM_ARG_REG}, {
1096 atom_op_compare, ATOM_ARG_PS}, {
1097 atom_op_compare, ATOM_ARG_WS}, {
1098 atom_op_compare, ATOM_ARG_FB}, {
1099 atom_op_compare, ATOM_ARG_PLL}, {
1100 atom_op_compare, ATOM_ARG_MC}, {
1101 atom_op_switch, 0}, {
1102 atom_op_jump, ATOM_COND_ALWAYS}, {
1103 atom_op_jump, ATOM_COND_EQUAL}, {
1104 atom_op_jump, ATOM_COND_BELOW}, {
1105 atom_op_jump, ATOM_COND_ABOVE}, {
1106 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1107 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1108 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1109 atom_op_test, ATOM_ARG_REG}, {
1110 atom_op_test, ATOM_ARG_PS}, {
1111 atom_op_test, ATOM_ARG_WS}, {
1112 atom_op_test, ATOM_ARG_FB}, {
1113 atom_op_test, ATOM_ARG_PLL}, {
1114 atom_op_test, ATOM_ARG_MC}, {
1115 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1116 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1117 atom_op_calltable, 0}, {
1118 atom_op_repeat, 0}, {
1119 atom_op_clear, ATOM_ARG_REG}, {
1120 atom_op_clear, ATOM_ARG_PS}, {
1121 atom_op_clear, ATOM_ARG_WS}, {
1122 atom_op_clear, ATOM_ARG_FB}, {
1123 atom_op_clear, ATOM_ARG_PLL}, {
1124 atom_op_clear, ATOM_ARG_MC}, {
1125 atom_op_nop, 0}, {
1126 atom_op_eot, 0}, {
1127 atom_op_mask, ATOM_ARG_REG}, {
1128 atom_op_mask, ATOM_ARG_PS}, {
1129 atom_op_mask, ATOM_ARG_WS}, {
1130 atom_op_mask, ATOM_ARG_FB}, {
1131 atom_op_mask, ATOM_ARG_PLL}, {
1132 atom_op_mask, ATOM_ARG_MC}, {
1133 atom_op_postcard, 0}, {
1134 atom_op_beep, 0}, {
1135 atom_op_savereg, 0}, {
1136 atom_op_restorereg, 0}, {
1137 atom_op_setdatablock, 0}, {
1138 atom_op_xor, ATOM_ARG_REG}, {
1139 atom_op_xor, ATOM_ARG_PS}, {
1140 atom_op_xor, ATOM_ARG_WS}, {
1141 atom_op_xor, ATOM_ARG_FB}, {
1142 atom_op_xor, ATOM_ARG_PLL}, {
1143 atom_op_xor, ATOM_ARG_MC}, {
1144 atom_op_shl, ATOM_ARG_REG}, {
1145 atom_op_shl, ATOM_ARG_PS}, {
1146 atom_op_shl, ATOM_ARG_WS}, {
1147 atom_op_shl, ATOM_ARG_FB}, {
1148 atom_op_shl, ATOM_ARG_PLL}, {
1149 atom_op_shl, ATOM_ARG_MC}, {
1150 atom_op_shr, ATOM_ARG_REG}, {
1151 atom_op_shr, ATOM_ARG_PS}, {
1152 atom_op_shr, ATOM_ARG_WS}, {
1153 atom_op_shr, ATOM_ARG_FB}, {
1154 atom_op_shr, ATOM_ARG_PLL}, {
1155 atom_op_shr, ATOM_ARG_MC}, {
1156atom_op_debug, 0},};
1157
1158static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1159{
1160 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1161 int len, ws, ps, ptr;
1162 unsigned char op;
1163 atom_exec_context ectx;
1164 int ret = 0;
1165
1166 if (!base)
1167 return -EINVAL;
1168
1169 len = CU16(base + ATOM_CT_SIZE_PTR);
1170 ws = CU8(base + ATOM_CT_WS_PTR);
1171 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1172 ptr = base + ATOM_CT_CODE_PTR;
1173
1174 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1175
1176 ectx.ctx = ctx;
1177 ectx.ps_shift = ps / 4;
1178 ectx.start = base;
1179 ectx.ps = params;
1180 ectx.abort = false;
1181 ectx.last_jump = 0;
1182 if (ws)
1183 ectx.ws = kcalloc(4, ws, GFP_KERNEL);
1184 else
1185 ectx.ws = NULL;
1186
1187 debug_depth++;
1188 while (1) {
1189 op = CU8(ptr++);
1190 if (op < ATOM_OP_NAMES_CNT)
1191 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1192 else
1193 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1194 if (ectx.abort) {
1195 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1196 base, len, ws, ps, ptr - 1);
1197 ret = -EINVAL;
1198 goto free;
1199 }
1200
1201 if (op < ATOM_OP_CNT && op > 0)
1202 opcode_table[op].func(&ectx, &ptr,
1203 opcode_table[op].arg);
1204 else
1205 break;
1206
1207 if (op == ATOM_OP_EOT)
1208 break;
1209 }
1210 debug_depth--;
1211 SDEBUG("<<\n");
1212
1213free:
1214 kfree(ectx.ws);
1215 return ret;
1216}
1217
1218int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1219{
1220 int r;
1221
1222 mutex_lock(&ctx->mutex);
1223 /* reset data block */
1224 ctx->data_block = 0;
1225 /* reset reg block */
1226 ctx->reg_block = 0;
1227 /* reset fb window */
1228 ctx->fb_base = 0;
1229 /* reset io mode */
1230 ctx->io_mode = ATOM_IO_MM;
1231 /* reset divmul */
1232 ctx->divmul[0] = 0;
1233 ctx->divmul[1] = 0;
1234 r = atom_execute_table_locked(ctx, index, params);
1235 mutex_unlock(&ctx->mutex);
1236 return r;
1237}
1238
1239int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1240{
1241 int r;
1242 mutex_lock(&ctx->scratch_mutex);
1243 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1244 mutex_unlock(&ctx->scratch_mutex);
1245 return r;
1246}
1247
1248static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1249
1250static void atom_index_iio(struct atom_context *ctx, int base)
1251{
1252 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1253 if (!ctx->iio)
1254 return;
1255 while (CU8(base) == ATOM_IIO_START) {
1256 ctx->iio[CU8(base + 1)] = base + 2;
1257 base += 2;
1258 while (CU8(base) != ATOM_IIO_END)
1259 base += atom_iio_len[CU8(base)];
1260 base += 3;
1261 }
1262}
1263
1264struct atom_context *atom_parse(struct card_info *card, void *bios)
1265{
1266 int base;
1267 struct atom_context *ctx =
1268 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1269 char *str;
1270 char name[512];
1271 int i;
1272
1273 if (!ctx)
1274 return NULL;
1275
1276 ctx->card = card;
1277 ctx->bios = bios;
1278
1279 if (CU16(0) != ATOM_BIOS_MAGIC) {
1280 pr_info("Invalid BIOS magic\n");
1281 kfree(ctx);
1282 return NULL;
1283 }
1284 if (strncmp
1285 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1286 strlen(ATOM_ATI_MAGIC))) {
1287 pr_info("Invalid ATI magic\n");
1288 kfree(ctx);
1289 return NULL;
1290 }
1291
1292 base = CU16(ATOM_ROM_TABLE_PTR);
1293 if (strncmp
1294 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1295 strlen(ATOM_ROM_MAGIC))) {
1296 pr_info("Invalid ATOM magic\n");
1297 kfree(ctx);
1298 return NULL;
1299 }
1300
1301 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1302 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1303 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1304 if (!ctx->iio) {
1305 atom_destroy(ctx);
1306 return NULL;
1307 }
1308
1309 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1310 while (*str && ((*str == '\n') || (*str == '\r')))
1311 str++;
1312 /* name string isn't always 0 terminated */
1313 for (i = 0; i < 511; i++) {
1314 name[i] = str[i];
1315 if (name[i] < '.' || name[i] > 'z') {
1316 name[i] = 0;
1317 break;
1318 }
1319 }
1320 pr_info("ATOM BIOS: %s\n", name);
1321
1322 return ctx;
1323}
1324
1325int atom_asic_init(struct atom_context *ctx)
1326{
1327 struct radeon_device *rdev = ctx->card->dev->dev_private;
1328 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1329 uint32_t ps[16];
1330 int ret;
1331
1332 memset(ps, 0, 64);
1333
1334 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1335 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1336 if (!ps[0] || !ps[1])
1337 return 1;
1338
1339 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1340 return 1;
1341 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1342 if (ret)
1343 return ret;
1344
1345 memset(ps, 0, 64);
1346
1347 if (rdev->family < CHIP_R600) {
1348 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1349 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1350 }
1351 return ret;
1352}
1353
1354void atom_destroy(struct atom_context *ctx)
1355{
1356 kfree(ctx->iio);
1357 kfree(ctx);
1358}
1359
1360bool atom_parse_data_header(struct atom_context *ctx, int index,
1361 uint16_t * size, uint8_t * frev, uint8_t * crev,
1362 uint16_t * data_start)
1363{
1364 int offset = index * 2 + 4;
1365 int idx = CU16(ctx->data_table + offset);
1366 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1367
1368 if (!mdt[index])
1369 return false;
1370
1371 if (size)
1372 *size = CU16(idx);
1373 if (frev)
1374 *frev = CU8(idx + 2);
1375 if (crev)
1376 *crev = CU8(idx + 3);
1377 *data_start = idx;
1378 return true;
1379}
1380
1381bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1382 uint8_t * crev)
1383{
1384 int offset = index * 2 + 4;
1385 int idx = CU16(ctx->cmd_table + offset);
1386 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1387
1388 if (!mct[index])
1389 return false;
1390
1391 if (frev)
1392 *frev = CU8(idx + 2);
1393 if (crev)
1394 *crev = CU8(idx + 3);
1395 return true;
1396}
1397
1398int atom_allocate_fb_scratch(struct atom_context *ctx)
1399{
1400 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1401 uint16_t data_offset;
1402 int usage_bytes = 0;
1403 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1404
1405 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1406 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1407
1408 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1409 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1410 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1411
1412 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1413 }
1414 ctx->scratch_size_bytes = 0;
1415 if (usage_bytes == 0)
1416 usage_bytes = 20 * 1024;
1417 /* allocate some scratch memory */
1418 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1419 if (!ctx->scratch)
1420 return -ENOMEM;
1421 ctx->scratch_size_bytes = usage_bytes;
1422 return 0;
1423}