1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25#ifndef __DAL_AUDIO_DCE_110_H__
 26#define __DAL_AUDIO_DCE_110_H__
 27
 28#include "audio.h"
 29
 30#define AUD_COMMON_REG_LIST(id)\
 31	SRI(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZF0ENDPOINT, id),\
 32	SRI(AZALIA_F0_CODEC_ENDPOINT_DATA, AZF0ENDPOINT, id),\
 33	SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS),\
 34	SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES),\
 35	SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES),\
 36	SR(DCCG_AUDIO_DTO_SOURCE),\
 37	SR(DCCG_AUDIO_DTO0_MODULE),\
 38	SR(DCCG_AUDIO_DTO0_PHASE),\
 39	SR(DCCG_AUDIO_DTO1_MODULE),\
 40	SR(DCCG_AUDIO_DTO1_PHASE)
 41
 42
 43 /* set field name */
 44#define SF(reg_name, field_name, post_fix)\
 45	.field_name = reg_name ## __ ## field_name ## post_fix
 46
 47
 48#define AUD_COMMON_MASK_SH_LIST_BASE(mask_sh)\
 49		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
 50		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
 51		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO2_USE_512FBR_DTO, mask_sh),\
 52		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_USE_512FBR_DTO, mask_sh),\
 53		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO1_USE_512FBR_DTO, mask_sh),\
 54		SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
 55		SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
 56		SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
 57		SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
 58		SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES, AUDIO_RATE_CAPABILITIES, mask_sh),\
 59		SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, CLKSTOP, mask_sh),\
 60		SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, EPSS, mask_sh)
 61
 62#define AUD_COMMON_MASK_SH_LIST(mask_sh)\
 63		AUD_COMMON_MASK_SH_LIST_BASE(mask_sh),\
 64		SF(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZALIA_ENDPOINT_REG_INDEX, mask_sh),\
 65		SF(AZALIA_F0_CODEC_ENDPOINT_DATA, AZALIA_ENDPOINT_REG_DATA, mask_sh)
 66
 67
 68struct dce_audio_registers {
 69	uint32_t AZALIA_F0_CODEC_ENDPOINT_INDEX;
 70	uint32_t AZALIA_F0_CODEC_ENDPOINT_DATA;
 71
 72	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS;
 73	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES;
 74	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES;
 75
 76	uint32_t DCCG_AUDIO_DTO_SOURCE;
 77	uint32_t DCCG_AUDIO_DTO0_MODULE;
 78	uint32_t DCCG_AUDIO_DTO0_PHASE;
 79	uint32_t DCCG_AUDIO_DTO1_MODULE;
 80	uint32_t DCCG_AUDIO_DTO1_PHASE;
 81
 82	uint32_t AUDIO_RATE_CAPABILITIES;
 83};
 84
 85struct dce_audio_shift {
 86	uint8_t AZALIA_ENDPOINT_REG_INDEX;
 87	uint8_t AZALIA_ENDPOINT_REG_DATA;
 88
 89	uint8_t AUDIO_RATE_CAPABILITIES;
 90	uint8_t CLKSTOP;
 91	uint8_t EPSS;
 92
 93	uint8_t DCCG_AUDIO_DTO0_SOURCE_SEL;
 94	uint8_t DCCG_AUDIO_DTO_SEL;
 95	uint8_t DCCG_AUDIO_DTO0_MODULE;
 96	uint8_t DCCG_AUDIO_DTO0_PHASE;
 97	uint8_t DCCG_AUDIO_DTO1_MODULE;
 98	uint8_t DCCG_AUDIO_DTO1_PHASE;
 99	uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
100	uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
101	uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
102};
103
104struct dce_audio_mask {
105	uint32_t AZALIA_ENDPOINT_REG_INDEX;
106	uint32_t AZALIA_ENDPOINT_REG_DATA;
107
108	uint32_t AUDIO_RATE_CAPABILITIES;
109	uint32_t CLKSTOP;
110	uint32_t EPSS;
111
112	uint32_t DCCG_AUDIO_DTO0_SOURCE_SEL;
113	uint32_t DCCG_AUDIO_DTO_SEL;
114	uint32_t DCCG_AUDIO_DTO0_MODULE;
115	uint32_t DCCG_AUDIO_DTO0_PHASE;
116	uint32_t DCCG_AUDIO_DTO1_MODULE;
117	uint32_t DCCG_AUDIO_DTO1_PHASE;
118	uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
119	uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
120	uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
121
122};
123
124struct dce_audio {
125	struct audio base;
126	const struct dce_audio_registers *regs;
127	const struct dce_audio_shift *shifts;
128	const struct dce_audio_mask *masks;
129};
130
131struct audio *dce_audio_create(
132		struct dc_context *ctx,
133		unsigned int inst,
134		const struct dce_audio_registers *reg,
135		const struct dce_audio_shift *shifts,
136		const struct dce_audio_mask *masks);
137
138void dce_aud_destroy(struct audio **audio);
139
140void dce_aud_hw_init(struct audio *audio);
141
142void dce_aud_az_enable(struct audio *audio);
143void dce_aud_az_disable(struct audio *audio);
144
145void dce_aud_az_configure(struct audio *audio,
146	enum signal_type signal,
147	const struct audio_crtc_info *crtc_info,
148	const struct audio_info *audio_info);
149
150void dce_aud_wall_dto_setup(struct audio *audio,
151	enum signal_type signal,
152	const struct audio_crtc_info *crtc_info,
153	const struct audio_pll_info *pll_info);
154
155#endif   /*__DAL_AUDIO_DCE_110_H__*/