1#
  2# For a description of the syntax of this configuration file,
  3# see Documentation/kbuild/config-language.txt.
  4#
  5
  6config OPENRISC
  7	def_bool y
 
 
 
 
  8	select OF
  9	select OF_EARLY_FLATTREE
 10	select HAVE_MEMBLOCK
 11	select ARCH_WANT_OPTIONAL_GPIOLIB
 12        select HAVE_ARCH_TRACEHOOK
 13	select HAVE_GENERIC_HARDIRQS
 
 14	select GENERIC_IRQ_CHIP
 15	select GENERIC_IRQ_PROBE
 16	select GENERIC_IRQ_SHOW
 17	select GENERIC_IOMAP
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 18
 19config MMU
 20	def_bool y
 21
 22config WISHBONE_BUS_BIG_ENDIAN
 23	def_bool y
 24
 25config SYMBOL_PREFIX
 26        string
 27        default ""
 28
 29config HAVE_DMA_ATTRS
 30	def_bool y
 31
 32config UID16
 33	def_bool y
 34
 35config RWSEM_GENERIC_SPINLOCK
 36	def_bool y
 37
 38config RWSEM_XCHGADD_ALGORITHM
 39	def_bool n
 40
 41config GENERIC_HWEIGHT
 42	def_bool y
 43
 44config GENERIC_IOMAP
 45	def_bool y
 46
 47config NO_IOPORT
 48	def_bool y
 49
 50config GENERIC_GPIO
 51	def_bool y
 52
 53config GENERIC_CLOCKEVENTS
 54	def_bool y
 55
 56config TRACE_IRQFLAGS_SUPPORT
 57        def_bool y
 58
 59# For now, use generic checksum functions
 60#These can be reimplemented in assembly later if so inclined
 61config GENERIC_CSUM
 62        def_bool y
 63
 64config GENERIC_FIND_NEXT_BIT
 65	def_bool y
 66
 67source "init/Kconfig"
 
 68
 
 
 69
 70menu "Processor type and features"
 71
 72choice
 73	prompt "Subarchitecture"
 74	default OR1K_1200
 75
 76config OR1K_1200
 77	bool "OR1200"
 78	help
 79	  Generic OpenRISC 1200 architecture
 80
 81endchoice
 82
 
 
 
 
 
 
 
 
 
 
 
 83config OPENRISC_BUILTIN_DTB
 84        string "Builtin DTB"
 85        default ""
 86
 87menu "Class II Instructions"
 88
 89config OPENRISC_HAVE_INST_FF1
 90	bool "Have instruction l.ff1"
 91	default y
 92	help
 93	  Select this if your implementation has the Class II instruction l.ff1
 94
 95config OPENRISC_HAVE_INST_FL1
 96	bool "Have instruction l.fl1"
 97	default y
 98	help
 99	  Select this if your implementation has the Class II instruction l.fl1
100
101config OPENRISC_HAVE_INST_MUL
102	bool "Have instruction l.mul for hardware multiply"
103	default y
104	help
105	  Select this if your implementation has a hardware multiply instruction
106
107config OPENRISC_HAVE_INST_DIV
108	bool "Have instruction l.div for hardware divide"
109	default y
110	help
111	  Select this if your implementation has a hardware divide instruction
112endmenu
113
 
 
 
 
 
 
 
 
 
 
 
 
 
 
114
115source "kernel/time/Kconfig"
116source kernel/Kconfig.hz
117source kernel/Kconfig.preempt
118source "mm/Kconfig"
119
120config OPENRISC_NO_SPR_SR_DSX
121	bool "use SPR_SR_DSX software emulation" if OR1K_1200
122	default y
123	help
124	  SPR_SR_DSX bit is status register bit indicating whether
125	  the last exception has happened in delay slot.
126
127	  OpenRISC architecture makes it optional to have it implemented
128	  in hardware and the OR1200 does not have it.
129
130	  Say N here if you know that your OpenRISC processor has
131	  SPR_SR_DSX bit implemented. Say Y if you are unsure.
132
133config CMDLINE
134        string "Default kernel command string"
135        default ""
136        help
137          On some architectures there is currently no way for the boot loader
138          to pass arguments to the kernel. For these architectures, you should
139          supply some command-line options at build time by entering them
140          here.
141
142menu "Debugging options"
 
143
144config DEBUG_STACKOVERFLOW
145	bool "Check for kernel stack overflow"
146	default y
147	help
148	  Make extra checks for space avaliable on stack in some
149          critical functions. This will cause kernel to run a bit slower,
150	  but will catch most of kernel stack overruns and exit gracefuly.
 
151
152	  Say Y if you are unsure.
153
154config JUMP_UPON_UNHANDLED_EXCEPTION
155	bool "Try to die gracefully"
156	default y
157	help
158	  Now this puts kernel into infinite loop after first oops. Till
159	  your kernel crashes this doesn't have any influence.
160
161	  Say Y if you are unsure.
162
163config OPENRISC_EXCEPTION_DEBUG
164	bool "Print processor state at each exception"
165	default n
166	help
167	  This option will make your kernel unusable for all but kernel
168	  debugging.
169
170	  Say N if you are unsure.
171
172config OPENRISC_ESR_EXCEPTION_BUG_CHECK
173	bool "Check for possible ESR exception bug"
174	default n
175	help
176	  This option enables some checks that might expose some problems
177          in kernel.
178
179	  Say N if you are unsure.
180
181endmenu
182
183endmenu
184
185menu "Executable file formats"
186
187source "fs/Kconfig.binfmt"
188
189endmenu
190
191source "net/Kconfig"
192
193source "drivers/Kconfig"
194
195source "fs/Kconfig"
196
197source "security/Kconfig"
198
199source "crypto/Kconfig"
200
201source "lib/Kconfig"
202
203menu "Kernel hacking"
204
205source "lib/Kconfig.debug"
206
207endmenu

  1# SPDX-License-Identifier: GPL-2.0
  2#
  3# For a description of the syntax of this configuration file,
  4# see Documentation/kbuild/kconfig-language.rst.
  5#
  6
  7config OPENRISC
  8	def_bool y
  9	select ARCH_32BIT_OFF_T
 10	select ARCH_HAS_DMA_SET_UNCACHED
 11	select ARCH_HAS_DMA_CLEAR_UNCACHED
 12	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
 13	select OF
 14	select OF_EARLY_FLATTREE
 15	select IRQ_DOMAIN
 16	select HANDLE_DOMAIN_IRQ
 17	select GPIOLIB
 18	select HAVE_ARCH_TRACEHOOK
 19	select SPARSE_IRQ
 20	select GENERIC_IRQ_CHIP
 21	select GENERIC_IRQ_PROBE
 22	select GENERIC_IRQ_SHOW
 23	select GENERIC_IOMAP
 24	select GENERIC_CPU_DEVICES
 25	select HAVE_UID16
 26	select GENERIC_ATOMIC64
 27	select GENERIC_CLOCKEVENTS
 28	select GENERIC_CLOCKEVENTS_BROADCAST
 29	select GENERIC_STRNCPY_FROM_USER
 30	select GENERIC_STRNLEN_USER
 31	select GENERIC_SMP_IDLE_THREAD
 32	select MODULES_USE_ELF_RELA
 33	select HAVE_DEBUG_STACKOVERFLOW
 34	select OR1K_PIC
 35	select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
 36	select ARCH_USE_QUEUED_SPINLOCKS
 37	select ARCH_USE_QUEUED_RWLOCKS
 38	select OMPIC if SMP
 39	select ARCH_WANT_FRAME_POINTERS
 40	select GENERIC_IRQ_MULTI_HANDLER
 41	select MMU_GATHER_NO_RANGE if MMU
 42
 43config CPU_BIG_ENDIAN
 
 
 
 44	def_bool y
 45
 46config MMU
 
 
 
 
 
 
 
 
 
 
 47	def_bool y
 48
 
 
 
 49config GENERIC_HWEIGHT
 50	def_bool y
 51
 52config NO_IOPORT_MAP
 
 
 
 
 
 
 
 
 
 53	def_bool y
 54
 55config TRACE_IRQFLAGS_SUPPORT
 56	def_bool y
 57
 58# For now, use generic checksum functions
 59#These can be reimplemented in assembly later if so inclined
 60config GENERIC_CSUM
 
 
 
 61	def_bool y
 62
 63config STACKTRACE_SUPPORT
 64	def_bool y
 65
 66config LOCKDEP_SUPPORT
 67	def_bool  y
 68
 69menu "Processor type and features"
 70
 71choice
 72	prompt "Subarchitecture"
 73	default OR1K_1200
 74
 75config OR1K_1200
 76	bool "OR1200"
 77	help
 78	  Generic OpenRISC 1200 architecture
 79
 80endchoice
 81
 82config DCACHE_WRITETHROUGH
 83	bool "Have write through data caches"
 84	default n
 85	help
 86	  Select this if your implementation features write through data caches.
 87	  Selecting 'N' here will allow the kernel to force flushing of data
 88	  caches at relevant times. Most OpenRISC implementations support write-
 89	  through data caches.
 90
 91	  If unsure say N here
 92
 93config OPENRISC_BUILTIN_DTB
 94	string "Builtin DTB"
 95	default ""
 96
 97menu "Class II Instructions"
 98
 99config OPENRISC_HAVE_INST_FF1
100	bool "Have instruction l.ff1"
101	default y
102	help
103	  Select this if your implementation has the Class II instruction l.ff1
104
105config OPENRISC_HAVE_INST_FL1
106	bool "Have instruction l.fl1"
107	default y
108	help
109	  Select this if your implementation has the Class II instruction l.fl1
110
111config OPENRISC_HAVE_INST_MUL
112	bool "Have instruction l.mul for hardware multiply"
113	default y
114	help
115	  Select this if your implementation has a hardware multiply instruction
116
117config OPENRISC_HAVE_INST_DIV
118	bool "Have instruction l.div for hardware divide"
119	default y
120	help
121	  Select this if your implementation has a hardware divide instruction
122endmenu
123
124config NR_CPUS
125	int "Maximum number of CPUs (2-32)"
126	range 2 32
127	depends on SMP
128	default "2"
129
130config SMP
131	bool "Symmetric Multi-Processing support"
132	help
133	  This enables support for systems with more than one CPU. If you have
134	  a system with only one CPU, say N. If you have a system with more
135	  than one CPU, say Y.
136
137	  If you don't know what to do here, say N.
138
139source "kernel/Kconfig.hz"
 
 
 
140
141config OPENRISC_NO_SPR_SR_DSX
142	bool "use SPR_SR_DSX software emulation" if OR1K_1200
143	default y
144	help
145	  SPR_SR_DSX bit is status register bit indicating whether
146	  the last exception has happened in delay slot.
147
148	  OpenRISC architecture makes it optional to have it implemented
149	  in hardware and the OR1200 does not have it.
150
151	  Say N here if you know that your OpenRISC processor has
152	  SPR_SR_DSX bit implemented. Say Y if you are unsure.
153
154config OPENRISC_HAVE_SHADOW_GPRS
155	bool "Support for shadow gpr files" if !SMP
156	default y if SMP
157	help
158	  Say Y here if your OpenRISC processor features shadowed
159	  register files. They will in such case be used as a
160	  scratch reg storage on exception entry.
 
161
162	  On SMP systems, this feature is mandatory.
163	  On a unicore system it's safe to say N here if you are unsure.
164
165config CMDLINE
166	string "Default kernel command string"
167	default ""
168	help
169	  On some architectures there is currently no way for the boot loader
170	  to pass arguments to the kernel. For these architectures, you should
171	  supply some command-line options at build time by entering them
172	  here.
173
174menu "Debugging options"
175
176config JUMP_UPON_UNHANDLED_EXCEPTION
177	bool "Try to die gracefully"
178	default y
179	help
180	  Now this puts kernel into infinite loop after first oops. Till
181	  your kernel crashes this doesn't have any influence.
182
183	  Say Y if you are unsure.
184
 
 
 
 
 
 
 
 
 
185config OPENRISC_ESR_EXCEPTION_BUG_CHECK
186	bool "Check for possible ESR exception bug"
187	default n
188	help
189	  This option enables some checks that might expose some problems
190	  in kernel.
191
192	  Say N if you are unsure.
193
194endmenu
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
195
196endmenu