Linux Audio

Check our new training course

Yocto / OpenEmbedded training

Feb 10-13, 2025
Register
Loading...
Note: File does not exist in v3.1.
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Broadcom Northstar USB 2.0 PHY Driver
  4 *
  5 * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
  6 */
  7
  8#include <linux/bcma/bcma.h>
  9#include <linux/clk.h>
 10#include <linux/delay.h>
 11#include <linux/err.h>
 12#include <linux/module.h>
 13#include <linux/of_address.h>
 14#include <linux/of_platform.h>
 15#include <linux/phy/phy.h>
 16#include <linux/platform_device.h>
 17#include <linux/slab.h>
 18
 19struct bcm_ns_usb2 {
 20	struct device *dev;
 21	struct clk *ref_clk;
 22	struct phy *phy;
 23	void __iomem *dmu;
 24};
 25
 26static int bcm_ns_usb2_phy_init(struct phy *phy)
 27{
 28	struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy);
 29	struct device *dev = usb2->dev;
 30	void __iomem *dmu = usb2->dmu;
 31	u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
 32	int err = 0;
 33
 34	err = clk_prepare_enable(usb2->ref_clk);
 35	if (err < 0) {
 36		dev_err(dev, "Failed to prepare ref clock: %d\n", err);
 37		goto err_out;
 38	}
 39
 40	ref_clk_rate = clk_get_rate(usb2->ref_clk);
 41	if (!ref_clk_rate) {
 42		dev_err(dev, "Failed to get ref clock rate\n");
 43		err = -EINVAL;
 44		goto err_clk_off;
 45	}
 46
 47	usb2ctl = readl(dmu + BCMA_DMU_CRU_USB2_CONTROL);
 48
 49	if (usb2ctl & BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK) {
 50		usb_pll_pdiv = usb2ctl;
 51		usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
 52		usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
 53	} else {
 54		usb_pll_pdiv = 1 << 3;
 55	}
 56
 57	/* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
 58	usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
 59
 60	/* Unlock DMU PLL settings with some magic value */
 61	writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
 62
 63	/* Write USB 2.0 PLL control setting */
 64	usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
 65	usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
 66	writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
 67
 68	/* Lock DMU PLL settings */
 69	writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
 70
 71err_clk_off:
 72	clk_disable_unprepare(usb2->ref_clk);
 73err_out:
 74	return err;
 75}
 76
 77static const struct phy_ops ops = {
 78	.init		= bcm_ns_usb2_phy_init,
 79	.owner		= THIS_MODULE,
 80};
 81
 82static int bcm_ns_usb2_probe(struct platform_device *pdev)
 83{
 84	struct device *dev = &pdev->dev;
 85	struct bcm_ns_usb2 *usb2;
 86	struct resource *res;
 87	struct phy_provider *phy_provider;
 88
 89	usb2 = devm_kzalloc(&pdev->dev, sizeof(*usb2), GFP_KERNEL);
 90	if (!usb2)
 91		return -ENOMEM;
 92	usb2->dev = dev;
 93
 94	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmu");
 95	usb2->dmu = devm_ioremap_resource(dev, res);
 96	if (IS_ERR(usb2->dmu)) {
 97		dev_err(dev, "Failed to map DMU regs\n");
 98		return PTR_ERR(usb2->dmu);
 99	}
100
101	usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk");
102	if (IS_ERR(usb2->ref_clk)) {
103		dev_err(dev, "Clock not defined\n");
104		return PTR_ERR(usb2->ref_clk);
105	}
106
107	usb2->phy = devm_phy_create(dev, NULL, &ops);
108	if (IS_ERR(usb2->phy))
109		return PTR_ERR(usb2->phy);
110
111	phy_set_drvdata(usb2->phy, usb2);
112	platform_set_drvdata(pdev, usb2);
113
114	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
115	return PTR_ERR_OR_ZERO(phy_provider);
116}
117
118static const struct of_device_id bcm_ns_usb2_id_table[] = {
119	{ .compatible = "brcm,ns-usb2-phy", },
120	{},
121};
122MODULE_DEVICE_TABLE(of, bcm_ns_usb2_id_table);
123
124static struct platform_driver bcm_ns_usb2_driver = {
125	.probe		= bcm_ns_usb2_probe,
126	.driver = {
127		.name = "bcm_ns_usb2",
128		.of_match_table = bcm_ns_usb2_id_table,
129	},
130};
131module_platform_driver(bcm_ns_usb2_driver);
132
133MODULE_LICENSE("GPL v2");