Linux Audio

Check our new training course

Loading...
Note: File does not exist in v5.4.
  1/******************************************************************************
  2 *
  3 * This file is provided under a dual BSD/GPLv2 license.  When using or
  4 * redistributing this file, you may do so under either license.
  5 *
  6 * GPL LICENSE SUMMARY
  7 *
  8 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
  9 *
 10 * This program is free software; you can redistribute it and/or modify
 11 * it under the terms of version 2 of the GNU General Public License as
 12 * published by the Free Software Foundation.
 13 *
 14 * This program is distributed in the hope that it will be useful, but
 15 * WITHOUT ANY WARRANTY; without even the implied warranty of
 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 17 * General Public License for more details.
 18 *
 19 * You should have received a copy of the GNU General Public License
 20 * along with this program; if not, write to the Free Software
 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
 22 * USA
 23 *
 24 * The full GNU General Public License is included in this distribution
 25 * in the file called LICENSE.GPL.
 26 *
 27 * Contact Information:
 28 *  Intel Linux Wireless <ilw@linux.intel.com>
 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 30 *
 31 * BSD LICENSE
 32 *
 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
 34 * All rights reserved.
 35 *
 36 * Redistribution and use in source and binary forms, with or without
 37 * modification, are permitted provided that the following conditions
 38 * are met:
 39 *
 40 *  * Redistributions of source code must retain the above copyright
 41 *    notice, this list of conditions and the following disclaimer.
 42 *  * Redistributions in binary form must reproduce the above copyright
 43 *    notice, this list of conditions and the following disclaimer in
 44 *    the documentation and/or other materials provided with the
 45 *    distribution.
 46 *  * Neither the name Intel Corporation nor the names of its
 47 *    contributors may be used to endorse or promote products derived
 48 *    from this software without specific prior written permission.
 49 *
 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 61 *
 62 *****************************************************************************/
 63#include <linux/pci.h>
 64#include <linux/pci-aspm.h>
 65
 66#include "iwl-bus.h"
 67#include "iwl-agn.h"
 68#include "iwl-core.h"
 69#include "iwl-io.h"
 70
 71/* PCI registers */
 72#define PCI_CFG_RETRY_TIMEOUT	0x041
 73#define PCI_CFG_LINK_CTRL_VAL_L0S_EN	0x01
 74#define PCI_CFG_LINK_CTRL_VAL_L1_EN	0x02
 75
 76struct iwl_pci_bus {
 77	/* basic pci-network driver stuff */
 78	struct pci_dev *pci_dev;
 79
 80	/* pci hardware address support */
 81	void __iomem *hw_base;
 82};
 83
 84#define IWL_BUS_GET_PCI_BUS(_iwl_bus) \
 85			((struct iwl_pci_bus *) ((_iwl_bus)->bus_specific))
 86
 87#define IWL_BUS_GET_PCI_DEV(_iwl_bus) \
 88			((IWL_BUS_GET_PCI_BUS(_iwl_bus))->pci_dev)
 89
 90static u16 iwl_pciexp_link_ctrl(struct iwl_bus *bus)
 91{
 92	int pos;
 93	u16 pci_lnk_ctl;
 94	struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
 95
 96	pos = pci_pcie_cap(pci_dev);
 97	pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
 98	return pci_lnk_ctl;
 99}
100
101static bool iwl_pci_is_pm_supported(struct iwl_bus *bus)
102{
103	u16 lctl = iwl_pciexp_link_ctrl(bus);
104
105	return !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
106}
107
108static void iwl_pci_apm_config(struct iwl_bus *bus)
109{
110	/*
111	 * HW bug W/A for instability in PCIe bus L0S->L1 transition.
112	 * Check if BIOS (or OS) enabled L1-ASPM on this device.
113	 * If so (likely), disable L0S, so device moves directly L0->L1;
114	 *    costs negligible amount of power savings.
115	 * If not (unlikely), enable L0S, so there is at least some
116	 *    power savings, even without L1.
117	 */
118	u16 lctl = iwl_pciexp_link_ctrl(bus);
119
120	if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
121				PCI_CFG_LINK_CTRL_VAL_L1_EN) {
122		/* L1-ASPM enabled; disable(!) L0S */
123		iwl_set_bit(bus->drv_data, CSR_GIO_REG,
124				CSR_GIO_REG_VAL_L0S_ENABLED);
125		dev_printk(KERN_INFO, bus->dev, "L1 Enabled; Disabling L0S\n");
126	} else {
127		/* L1-ASPM disabled; enable(!) L0S */
128		iwl_clear_bit(bus->drv_data, CSR_GIO_REG,
129				CSR_GIO_REG_VAL_L0S_ENABLED);
130		dev_printk(KERN_INFO, bus->dev, "L1 Disabled; Enabling L0S\n");
131	}
132}
133
134static void iwl_pci_set_drv_data(struct iwl_bus *bus, void *drv_data)
135{
136	bus->drv_data = drv_data;
137	pci_set_drvdata(IWL_BUS_GET_PCI_DEV(bus), drv_data);
138}
139
140static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
141			      int buf_len)
142{
143	struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
144
145	snprintf(buf, buf_len, "PCI ID: 0x%04X:0x%04X", pci_dev->device,
146		 pci_dev->subsystem_device);
147}
148
149static void iwl_pci_write8(struct iwl_bus *bus, u32 ofs, u8 val)
150{
151	iowrite8(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
152}
153
154static void iwl_pci_write32(struct iwl_bus *bus, u32 ofs, u32 val)
155{
156	iowrite32(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
157}
158
159static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
160{
161	u32 val = ioread32(IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
162	return val;
163}
164
165static struct iwl_bus_ops pci_ops = {
166	.get_pm_support = iwl_pci_is_pm_supported,
167	.apm_config = iwl_pci_apm_config,
168	.set_drv_data = iwl_pci_set_drv_data,
169	.get_hw_id = iwl_pci_get_hw_id,
170	.write8 = iwl_pci_write8,
171	.write32 = iwl_pci_write32,
172	.read32 = iwl_pci_read32,
173};
174
175#define IWL_PCI_DEVICE(dev, subdev, cfg) \
176	.vendor = PCI_VENDOR_ID_INTEL,  .device = (dev), \
177	.subvendor = PCI_ANY_ID, .subdevice = (subdev), \
178	.driver_data = (kernel_ulong_t)&(cfg)
179
180/* Hardware specific file defines the PCI IDs table for that hardware module */
181static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
182	{IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
183	{IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
184	{IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
185	{IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
186	{IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
187	{IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
188	{IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
189	{IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
190	{IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
191	{IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
192	{IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
193	{IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
194	{IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
195	{IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
196	{IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
197	{IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
198	{IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
199	{IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
200	{IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
201	{IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
202	{IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
203	{IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
204	{IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
205	{IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
206
207/* 5300 Series WiFi */
208	{IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
209	{IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
210	{IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
211	{IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
212	{IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
213	{IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
214	{IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
215	{IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
216	{IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
217	{IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
218	{IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
219	{IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
220
221/* 5350 Series WiFi/WiMax */
222	{IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
223	{IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
224	{IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
225
226/* 5150 Series Wifi/WiMax */
227	{IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
228	{IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
229	{IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
230	{IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
231	{IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
232	{IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
233
234	{IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
235	{IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
236	{IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
237	{IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
238
239/* 6x00 Series */
240	{IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
241	{IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
242	{IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
243	{IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
244	{IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
245	{IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
246	{IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
247	{IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
248	{IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
249	{IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
250
251/* 6x05 Series */
252	{IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
253	{IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
254	{IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
255	{IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
256	{IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
257	{IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
258	{IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
259
260/* 6x30 Series */
261	{IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
262	{IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
263	{IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
264	{IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
265	{IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
266	{IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
267	{IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
268	{IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
269	{IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
270	{IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
271	{IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
272	{IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
273	{IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
274	{IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
275	{IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
276	{IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
277
278/* 6x50 WiFi/WiMax Series */
279	{IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
280	{IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
281	{IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
282	{IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
283	{IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
284	{IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
285
286/* 6150 WiFi/WiMax Series */
287	{IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
288	{IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
289	{IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
290	{IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
291	{IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
292	{IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
293
294/* 1000 Series WiFi */
295	{IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
296	{IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
297	{IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
298	{IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
299	{IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
300	{IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
301	{IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
302	{IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
303	{IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
304	{IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
305	{IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
306	{IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
307
308/* 100 Series WiFi */
309	{IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
310	{IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
311	{IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
312	{IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
313	{IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
314	{IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
315
316/* 130 Series WiFi */
317	{IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
318	{IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
319	{IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
320	{IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
321	{IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
322	{IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
323
324/* 2x00 Series */
325	{IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
326	{IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
327	{IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
328	{IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
329	{IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
330	{IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
331
332/* 2x30 Series */
333	{IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
334	{IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
335	{IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
336	{IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
337	{IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
338	{IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
339
340/* 6x35 Series */
341	{IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
342	{IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
343	{IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
344	{IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
345	{IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
346	{IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
347	{IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
348	{IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
349	{IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
350
351/* 105 Series */
352	{IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
353	{IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
354	{IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
355	{IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
356	{IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
357	{IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
358
359/* 135 Series */
360	{IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
361	{IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
362	{IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
363	{IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
364	{IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
365	{IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
366
367	{0}
368};
369MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
370
371static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
372{
373	struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
374	struct iwl_bus *bus;
375	struct iwl_pci_bus *pci_bus;
376	u16 pci_cmd;
377	int err;
378
379	bus = kzalloc(sizeof(*bus) + sizeof(*pci_bus), GFP_KERNEL);
380	if (!bus) {
381		dev_printk(KERN_ERR, &pdev->dev,
382			   "Couldn't allocate iwl_pci_bus");
383		err = -ENOMEM;
384		goto out_no_pci;
385	}
386
387	pci_bus = IWL_BUS_GET_PCI_BUS(bus);
388	pci_bus->pci_dev = pdev;
389
390	/* W/A - seems to solve weird behavior. We need to remove this if we
391	 * don't want to stay in L1 all the time. This wastes a lot of power */
392	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
393				PCIE_LINK_STATE_CLKPM);
394
395	if (pci_enable_device(pdev)) {
396		err = -ENODEV;
397		goto out_no_pci;
398	}
399
400	pci_set_master(pdev);
401
402	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
403	if (!err)
404		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
405	if (err) {
406		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
407		if (!err)
408			err = pci_set_consistent_dma_mask(pdev,
409							DMA_BIT_MASK(32));
410		/* both attempts failed: */
411		if (err) {
412			dev_printk(KERN_ERR, bus->dev,
413				   "No suitable DMA available.\n");
414			goto out_pci_disable_device;
415		}
416	}
417
418	err = pci_request_regions(pdev, DRV_NAME);
419	if (err) {
420		dev_printk(KERN_ERR, bus->dev, "pci_request_regions failed");
421		goto out_pci_disable_device;
422	}
423
424	pci_bus->hw_base = pci_iomap(pdev, 0, 0);
425	if (!pci_bus->hw_base) {
426		dev_printk(KERN_ERR, bus->dev, "pci_iomap failed");
427		err = -ENODEV;
428		goto out_pci_release_regions;
429	}
430
431	dev_printk(KERN_INFO, &pdev->dev,
432		"pci_resource_len = 0x%08llx\n",
433		(unsigned long long) pci_resource_len(pdev, 0));
434	dev_printk(KERN_INFO, &pdev->dev,
435		"pci_resource_base = %p\n", pci_bus->hw_base);
436
437	dev_printk(KERN_INFO, &pdev->dev,
438		"HW Revision ID = 0x%X\n", pdev->revision);
439
440	/* We disable the RETRY_TIMEOUT register (0x41) to keep
441	 * PCI Tx retries from interfering with C3 CPU state */
442	pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
443
444	err = pci_enable_msi(pdev);
445	if (err) {
446		dev_printk(KERN_ERR, &pdev->dev, "pci_enable_msi failed");
447		goto out_iounmap;
448	}
449
450	/* TODO: Move this away, not needed if not MSI */
451	/* enable rfkill interrupt: hw bug w/a */
452	pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
453	if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
454		pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
455		pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
456	}
457
458	bus->dev = &pdev->dev;
459	bus->irq = pdev->irq;
460	bus->ops = &pci_ops;
461
462	err = iwl_probe(bus, cfg);
463	if (err)
464		goto out_disable_msi;
465	return 0;
466
467out_disable_msi:
468	pci_disable_msi(pdev);
469out_iounmap:
470	pci_iounmap(pdev, pci_bus->hw_base);
471out_pci_release_regions:
472	pci_set_drvdata(pdev, NULL);
473	pci_release_regions(pdev);
474out_pci_disable_device:
475	pci_disable_device(pdev);
476out_no_pci:
477	kfree(bus);
478	return err;
479}
480
481static void __devexit iwl_pci_remove(struct pci_dev *pdev)
482{
483	struct iwl_priv *priv = pci_get_drvdata(pdev);
484	struct iwl_bus *bus = priv->bus;
485	struct iwl_pci_bus *pci_bus = IWL_BUS_GET_PCI_BUS(bus);
486	struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
487
488	iwl_remove(priv);
489
490	pci_disable_msi(pci_dev);
491	pci_iounmap(pci_dev, pci_bus->hw_base);
492	pci_release_regions(pci_dev);
493	pci_disable_device(pci_dev);
494	pci_set_drvdata(pci_dev, NULL);
495
496	kfree(bus);
497}
498
499#ifdef CONFIG_PM
500
501static int iwl_pci_suspend(struct device *device)
502{
503	struct pci_dev *pdev = to_pci_dev(device);
504	struct iwl_priv *priv = pci_get_drvdata(pdev);
505
506	/* Before you put code here, think about WoWLAN. You cannot check here
507	 * whether WoWLAN is enabled or not, and your code will run even if
508	 * WoWLAN is enabled - don't kill the NIC, someone may need it in Sx.
509	 */
510
511	return iwl_suspend(priv);
512}
513
514static int iwl_pci_resume(struct device *device)
515{
516	struct pci_dev *pdev = to_pci_dev(device);
517	struct iwl_priv *priv = pci_get_drvdata(pdev);
518
519	/* Before you put code here, think about WoWLAN. You cannot check here
520	 * whether WoWLAN is enabled or not, and your code will run even if
521	 * WoWLAN is enabled - the NIC may be alive.
522	 */
523
524	/*
525	 * We disable the RETRY_TIMEOUT register (0x41) to keep
526	 * PCI Tx retries from interfering with C3 CPU state.
527	 */
528	pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
529
530	return iwl_resume(priv);
531}
532
533static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume);
534
535#define IWL_PM_OPS	(&iwl_dev_pm_ops)
536
537#else
538
539#define IWL_PM_OPS	NULL
540
541#endif
542
543static struct pci_driver iwl_pci_driver = {
544	.name = DRV_NAME,
545	.id_table = iwl_hw_card_ids,
546	.probe = iwl_pci_probe,
547	.remove = __devexit_p(iwl_pci_remove),
548	.driver.pm = IWL_PM_OPS,
549};
550
551int __must_check iwl_pci_register_driver(void)
552{
553	int ret;
554	ret = pci_register_driver(&iwl_pci_driver);
555	if (ret)
556		pr_err("Unable to initialize PCI module\n");
557
558	return ret;
559}
560
561void iwl_pci_unregister_driver(void)
562{
563	pci_unregister_driver(&iwl_pci_driver);
564}