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1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include "vf.h"
29
30/**
31 * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx
32 * @hw: pointer to hardware structure
33 *
34 * Starts the hardware by filling the bus info structure and media type, clears
35 * all on chip counters, initializes receive address registers, multicast
36 * table, VLAN filter table, calls routine to set up link and flow control
37 * settings, and leaves transmit and receive units disabled and uninitialized
38 **/
39static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
40{
41 /* Clear adapter stopped flag */
42 hw->adapter_stopped = false;
43
44 return 0;
45}
46
47/**
48 * ixgbevf_init_hw_vf - virtual function hardware initialization
49 * @hw: pointer to hardware structure
50 *
51 * Initialize the hardware by resetting the hardware and then starting
52 * the hardware
53 **/
54static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
55{
56 s32 status = hw->mac.ops.start_hw(hw);
57
58 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
59
60 return status;
61}
62
63/**
64 * ixgbevf_reset_hw_vf - Performs hardware reset
65 * @hw: pointer to hardware structure
66 *
67 * Resets the hardware by reseting the transmit and receive units, masks and
68 * clears all interrupts.
69 **/
70static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
71{
72 struct ixgbe_mbx_info *mbx = &hw->mbx;
73 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
74 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
75 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
76 u8 *addr = (u8 *)(&msgbuf[1]);
77
78 /* Call adapter stop to disable tx/rx and clear interrupts */
79 hw->mac.ops.stop_adapter(hw);
80
81 IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
82 IXGBE_WRITE_FLUSH(hw);
83
84 /* we cannot reset while the RSTI / RSTD bits are asserted */
85 while (!mbx->ops.check_for_rst(hw) && timeout) {
86 timeout--;
87 udelay(5);
88 }
89
90 if (!timeout)
91 return IXGBE_ERR_RESET_FAILED;
92
93 /* mailbox timeout can now become active */
94 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
95
96 msgbuf[0] = IXGBE_VF_RESET;
97 mbx->ops.write_posted(hw, msgbuf, 1);
98
99 msleep(10);
100
101 /* set our "perm_addr" based on info provided by PF */
102 /* also set up the mc_filter_type which is piggy backed
103 * on the mac address in word 3 */
104 ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
105 if (ret_val)
106 return ret_val;
107
108 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
109 return IXGBE_ERR_INVALID_MAC_ADDR;
110
111 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
112 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
113
114 return 0;
115}
116
117/**
118 * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units
119 * @hw: pointer to hardware structure
120 *
121 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
122 * disables transmit and receive units. The adapter_stopped flag is used by
123 * the shared code and drivers to determine if the adapter is in a stopped
124 * state and should not touch the hardware.
125 **/
126static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
127{
128 u32 number_of_queues;
129 u32 reg_val;
130 u16 i;
131
132 /*
133 * Set the adapter_stopped flag so other driver functions stop touching
134 * the hardware
135 */
136 hw->adapter_stopped = true;
137
138 /* Disable the receive unit by stopped each queue */
139 number_of_queues = hw->mac.max_rx_queues;
140 for (i = 0; i < number_of_queues; i++) {
141 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
142 if (reg_val & IXGBE_RXDCTL_ENABLE) {
143 reg_val &= ~IXGBE_RXDCTL_ENABLE;
144 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
145 }
146 }
147
148 IXGBE_WRITE_FLUSH(hw);
149
150 /* Clear interrupt mask to stop from interrupts being generated */
151 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
152
153 /* Clear any pending interrupts */
154 IXGBE_READ_REG(hw, IXGBE_VTEICR);
155
156 /* Disable the transmit unit. Each queue must be disabled. */
157 number_of_queues = hw->mac.max_tx_queues;
158 for (i = 0; i < number_of_queues; i++) {
159 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
160 if (reg_val & IXGBE_TXDCTL_ENABLE) {
161 reg_val &= ~IXGBE_TXDCTL_ENABLE;
162 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
163 }
164 }
165
166 return 0;
167}
168
169/**
170 * ixgbevf_mta_vector - Determines bit-vector in multicast table to set
171 * @hw: pointer to hardware structure
172 * @mc_addr: the multicast address
173 *
174 * Extracts the 12 bits, from a multicast address, to determine which
175 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
176 * incoming rx multicast addresses, to determine the bit-vector to check in
177 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
178 * by the MO field of the MCSTCTRL. The MO field is set during initialization
179 * to mc_filter_type.
180 **/
181static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
182{
183 u32 vector = 0;
184
185 switch (hw->mac.mc_filter_type) {
186 case 0: /* use bits [47:36] of the address */
187 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
188 break;
189 case 1: /* use bits [46:35] of the address */
190 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
191 break;
192 case 2: /* use bits [45:34] of the address */
193 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
194 break;
195 case 3: /* use bits [43:32] of the address */
196 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
197 break;
198 default: /* Invalid mc_filter_type */
199 break;
200 }
201
202 /* vector can only be 12-bits or boundary will be exceeded */
203 vector &= 0xFFF;
204 return vector;
205}
206
207/**
208 * ixgbevf_get_mac_addr_vf - Read device MAC address
209 * @hw: pointer to the HW structure
210 * @mac_addr: pointer to storage for retrieved MAC address
211 **/
212static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
213{
214 memcpy(mac_addr, hw->mac.perm_addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
215
216 return 0;
217}
218
219static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
220{
221 struct ixgbe_mbx_info *mbx = &hw->mbx;
222 u32 msgbuf[3];
223 u8 *msg_addr = (u8 *)(&msgbuf[1]);
224 s32 ret_val;
225
226 memset(msgbuf, 0, sizeof(msgbuf));
227 /*
228 * If index is one then this is the start of a new list and needs
229 * indication to the PF so it can do it's own list management.
230 * If it is zero then that tells the PF to just clear all of
231 * this VF's macvlans and there is no new list.
232 */
233 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
234 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
235 if (addr)
236 memcpy(msg_addr, addr, 6);
237 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
238
239 if (!ret_val)
240 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
241
242 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
243
244 if (!ret_val)
245 if (msgbuf[0] ==
246 (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
247 ret_val = -ENOMEM;
248
249 return ret_val;
250}
251
252/**
253 * ixgbevf_set_rar_vf - set device MAC address
254 * @hw: pointer to hardware structure
255 * @index: Receive address register to write
256 * @addr: Address to put into receive address register
257 * @vmdq: Unused in this implementation
258 **/
259static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
260 u32 vmdq)
261{
262 struct ixgbe_mbx_info *mbx = &hw->mbx;
263 u32 msgbuf[3];
264 u8 *msg_addr = (u8 *)(&msgbuf[1]);
265 s32 ret_val;
266
267 memset(msgbuf, 0, sizeof(msgbuf));
268 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
269 memcpy(msg_addr, addr, 6);
270 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
271
272 if (!ret_val)
273 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
274
275 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
276
277 /* if nacked the address was rejected, use "perm_addr" */
278 if (!ret_val &&
279 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
280 ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
281
282 return ret_val;
283}
284
285/**
286 * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses
287 * @hw: pointer to the HW structure
288 * @netdev: pointer to net device structure
289 *
290 * Updates the Multicast Table Array.
291 **/
292static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
293 struct net_device *netdev)
294{
295 struct netdev_hw_addr *ha;
296 struct ixgbe_mbx_info *mbx = &hw->mbx;
297 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
298 u16 *vector_list = (u16 *)&msgbuf[1];
299 u32 cnt, i;
300
301 /* Each entry in the list uses 1 16 bit word. We have 30
302 * 16 bit words available in our HW msg buffer (minus 1 for the
303 * msg type). That's 30 hash values if we pack 'em right. If
304 * there are more than 30 MC addresses to add then punt the
305 * extras for now and then add code to handle more than 30 later.
306 * It would be unusual for a server to request that many multi-cast
307 * addresses except for in large enterprise network environments.
308 */
309
310 cnt = netdev_mc_count(netdev);
311 if (cnt > 30)
312 cnt = 30;
313 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
314 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
315
316 i = 0;
317 netdev_for_each_mc_addr(ha, netdev) {
318 if (i == cnt)
319 break;
320 vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
321 }
322
323 mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
324
325 return 0;
326}
327
328/**
329 * ixgbevf_set_vfta_vf - Set/Unset vlan filter table address
330 * @hw: pointer to the HW structure
331 * @vlan: 12 bit VLAN ID
332 * @vind: unused by VF drivers
333 * @vlan_on: if true then set bit, else clear bit
334 **/
335static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
336 bool vlan_on)
337{
338 struct ixgbe_mbx_info *mbx = &hw->mbx;
339 u32 msgbuf[2];
340
341 msgbuf[0] = IXGBE_VF_SET_VLAN;
342 msgbuf[1] = vlan;
343 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
344 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
345
346 return mbx->ops.write_posted(hw, msgbuf, 2);
347}
348
349/**
350 * ixgbevf_setup_mac_link_vf - Setup MAC link settings
351 * @hw: pointer to hardware structure
352 * @speed: Unused in this implementation
353 * @autoneg: Unused in this implementation
354 * @autoneg_wait_to_complete: Unused in this implementation
355 *
356 * Do nothing and return success. VF drivers are not allowed to change
357 * global settings. Maintained for driver compatibility.
358 **/
359static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
360 ixgbe_link_speed speed, bool autoneg,
361 bool autoneg_wait_to_complete)
362{
363 return 0;
364}
365
366/**
367 * ixgbevf_check_mac_link_vf - Get link/speed status
368 * @hw: pointer to hardware structure
369 * @speed: pointer to link speed
370 * @link_up: true is link is up, false otherwise
371 * @autoneg_wait_to_complete: true when waiting for completion is needed
372 *
373 * Reads the links register to determine if link is up and the current speed
374 **/
375static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
376 ixgbe_link_speed *speed,
377 bool *link_up,
378 bool autoneg_wait_to_complete)
379{
380 u32 links_reg;
381
382 if (!(hw->mbx.ops.check_for_rst(hw))) {
383 *link_up = false;
384 *speed = 0;
385 return -1;
386 }
387
388 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
389
390 if (links_reg & IXGBE_LINKS_UP)
391 *link_up = true;
392 else
393 *link_up = false;
394
395 if ((links_reg & IXGBE_LINKS_SPEED_82599) ==
396 IXGBE_LINKS_SPEED_10G_82599)
397 *speed = IXGBE_LINK_SPEED_10GB_FULL;
398 else
399 *speed = IXGBE_LINK_SPEED_1GB_FULL;
400
401 return 0;
402}
403
404static struct ixgbe_mac_operations ixgbevf_mac_ops = {
405 .init_hw = ixgbevf_init_hw_vf,
406 .reset_hw = ixgbevf_reset_hw_vf,
407 .start_hw = ixgbevf_start_hw_vf,
408 .get_mac_addr = ixgbevf_get_mac_addr_vf,
409 .stop_adapter = ixgbevf_stop_hw_vf,
410 .setup_link = ixgbevf_setup_mac_link_vf,
411 .check_link = ixgbevf_check_mac_link_vf,
412 .set_rar = ixgbevf_set_rar_vf,
413 .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
414 .set_uc_addr = ixgbevf_set_uc_addr_vf,
415 .set_vfta = ixgbevf_set_vfta_vf,
416};
417
418struct ixgbevf_info ixgbevf_82599_vf_info = {
419 .mac = ixgbe_mac_82599_vf,
420 .mac_ops = &ixgbevf_mac_ops,
421};
422
423struct ixgbevf_info ixgbevf_X540_vf_info = {
424 .mac = ixgbe_mac_X540_vf,
425 .mac_ops = &ixgbevf_mac_ops,
426};