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  1/* SPDX-License-Identifier: GPL-2.0+ */
  2// Copyright (c) 2016-2017 Hisilicon Limited.
  3
  4#ifndef __HNAE3_H
  5#define __HNAE3_H
  6
  7/* Names used in this framework:
  8 *      ae handle (handle):
  9 *        a set of queues provided by AE
 10 *      ring buffer queue (rbq):
 11 *        the channel between upper layer and the AE, can do tx and rx
 12 *      ring:
 13 *        a tx or rx channel within a rbq
 14 *      ring description (desc):
 15 *        an element in the ring with packet information
 16 *      buffer:
 17 *        a memory region referred by desc with the full packet payload
 18 *
 19 * "num" means a static number set as a parameter, "count" mean a dynamic
 20 *   number set while running
 21 * "cb" means control block
 22 */
 23
 24#include <linux/acpi.h>
 25#include <linux/dcbnl.h>
 26#include <linux/delay.h>
 27#include <linux/device.h>
 28#include <linux/module.h>
 29#include <linux/netdevice.h>
 30#include <linux/pci.h>
 31#include <linux/types.h>
 32
 33#define HNAE3_MOD_VERSION "1.0"
 34
 35#define HNAE3_MIN_VECTOR_NUM	2 /* first one for misc, another for IO */
 36
 37/* Device IDs */
 38#define HNAE3_DEV_ID_GE				0xA220
 39#define HNAE3_DEV_ID_25GE			0xA221
 40#define HNAE3_DEV_ID_25GE_RDMA			0xA222
 41#define HNAE3_DEV_ID_25GE_RDMA_MACSEC		0xA223
 42#define HNAE3_DEV_ID_50GE_RDMA			0xA224
 43#define HNAE3_DEV_ID_50GE_RDMA_MACSEC		0xA225
 44#define HNAE3_DEV_ID_100G_RDMA_MACSEC		0xA226
 45#define HNAE3_DEV_ID_100G_VF			0xA22E
 46#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF	0xA22F
 47
 48#define HNAE3_CLASS_NAME_SIZE 16
 49
 50#define HNAE3_DEV_INITED_B			0x0
 51#define HNAE3_DEV_SUPPORT_ROCE_B		0x1
 52#define HNAE3_DEV_SUPPORT_DCB_B			0x2
 53#define HNAE3_KNIC_CLIENT_INITED_B		0x3
 54#define HNAE3_UNIC_CLIENT_INITED_B		0x4
 55#define HNAE3_ROCE_CLIENT_INITED_B		0x5
 56#define HNAE3_DEV_SUPPORT_FD_B			0x6
 57#define HNAE3_DEV_SUPPORT_GRO_B			0x7
 58
 59#define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
 60		BIT(HNAE3_DEV_SUPPORT_ROCE_B))
 61
 62#define hnae3_dev_roce_supported(hdev) \
 63	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
 64
 65#define hnae3_dev_dcb_supported(hdev) \
 66	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
 67
 68#define hnae3_dev_fd_supported(hdev) \
 69	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
 70
 71#define hnae3_dev_gro_supported(hdev) \
 72	hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
 73
 74#define ring_ptr_move_fw(ring, p) \
 75	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 76#define ring_ptr_move_bw(ring, p) \
 77	((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
 78
 79enum hns_desc_type {
 80	DESC_TYPE_SKB,
 81	DESC_TYPE_PAGE,
 82};
 83
 84struct hnae3_handle;
 85
 86struct hnae3_queue {
 87	void __iomem *io_base;
 88	struct hnae3_ae_algo *ae_algo;
 89	struct hnae3_handle *handle;
 90	int tqp_index;		/* index in a handle */
 91	u32 buf_size;		/* size for hnae_desc->addr, preset by AE */
 92	u16 tx_desc_num;	/* total number of tx desc */
 93	u16 rx_desc_num;	/* total number of rx desc */
 94};
 95
 96struct hns3_mac_stats {
 97	u64 tx_pause_cnt;
 98	u64 rx_pause_cnt;
 99};
100
101/* hnae3 loop mode */
102enum hnae3_loop {
103	HNAE3_LOOP_APP,
104	HNAE3_LOOP_SERIAL_SERDES,
105	HNAE3_LOOP_PARALLEL_SERDES,
106	HNAE3_LOOP_PHY,
107	HNAE3_LOOP_NONE,
108};
109
110enum hnae3_client_type {
111	HNAE3_CLIENT_KNIC,
112	HNAE3_CLIENT_ROCE,
113};
114
115/* mac media type */
116enum hnae3_media_type {
117	HNAE3_MEDIA_TYPE_UNKNOWN,
118	HNAE3_MEDIA_TYPE_FIBER,
119	HNAE3_MEDIA_TYPE_COPPER,
120	HNAE3_MEDIA_TYPE_BACKPLANE,
121	HNAE3_MEDIA_TYPE_NONE,
122};
123
124/* must be consistent with definition in firmware */
125enum hnae3_module_type {
126	HNAE3_MODULE_TYPE_UNKNOWN	= 0x00,
127	HNAE3_MODULE_TYPE_FIBRE_LR	= 0x01,
128	HNAE3_MODULE_TYPE_FIBRE_SR	= 0x02,
129	HNAE3_MODULE_TYPE_AOC		= 0x03,
130	HNAE3_MODULE_TYPE_CR		= 0x04,
131	HNAE3_MODULE_TYPE_KR		= 0x05,
132	HNAE3_MODULE_TYPE_TP		= 0x06,
133
134};
135
136enum hnae3_fec_mode {
137	HNAE3_FEC_AUTO = 0,
138	HNAE3_FEC_BASER,
139	HNAE3_FEC_RS,
140	HNAE3_FEC_USER_DEF,
141};
142
143enum hnae3_reset_notify_type {
144	HNAE3_UP_CLIENT,
145	HNAE3_DOWN_CLIENT,
146	HNAE3_INIT_CLIENT,
147	HNAE3_UNINIT_CLIENT,
148	HNAE3_RESTORE_CLIENT,
149};
150
151enum hnae3_hw_error_type {
152	HNAE3_PPU_POISON_ERROR,
153	HNAE3_CMDQ_ECC_ERROR,
154	HNAE3_IMP_RD_POISON_ERROR,
155};
156
157enum hnae3_reset_type {
158	HNAE3_VF_RESET,
159	HNAE3_VF_FUNC_RESET,
160	HNAE3_VF_PF_FUNC_RESET,
161	HNAE3_VF_FULL_RESET,
162	HNAE3_FLR_RESET,
163	HNAE3_FUNC_RESET,
164	HNAE3_GLOBAL_RESET,
165	HNAE3_IMP_RESET,
166	HNAE3_UNKNOWN_RESET,
167	HNAE3_NONE_RESET,
168};
169
170enum hnae3_flr_state {
171	HNAE3_FLR_DOWN,
172	HNAE3_FLR_DONE,
173};
174
175enum hnae3_port_base_vlan_state {
176	HNAE3_PORT_BASE_VLAN_DISABLE,
177	HNAE3_PORT_BASE_VLAN_ENABLE,
178	HNAE3_PORT_BASE_VLAN_MODIFY,
179	HNAE3_PORT_BASE_VLAN_NOCHANGE,
180};
181
182struct hnae3_vector_info {
183	u8 __iomem *io_addr;
184	int vector;
185};
186
187#define HNAE3_RING_TYPE_B 0
188#define HNAE3_RING_TYPE_TX 0
189#define HNAE3_RING_TYPE_RX 1
190#define HNAE3_RING_GL_IDX_S 0
191#define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
192#define HNAE3_RING_GL_RX 0
193#define HNAE3_RING_GL_TX 1
194
195#define HNAE3_FW_VERSION_BYTE3_SHIFT	24
196#define HNAE3_FW_VERSION_BYTE3_MASK	GENMASK(31, 24)
197#define HNAE3_FW_VERSION_BYTE2_SHIFT	16
198#define HNAE3_FW_VERSION_BYTE2_MASK	GENMASK(23, 16)
199#define HNAE3_FW_VERSION_BYTE1_SHIFT	8
200#define HNAE3_FW_VERSION_BYTE1_MASK	GENMASK(15, 8)
201#define HNAE3_FW_VERSION_BYTE0_SHIFT	0
202#define HNAE3_FW_VERSION_BYTE0_MASK	GENMASK(7, 0)
203
204struct hnae3_ring_chain_node {
205	struct hnae3_ring_chain_node *next;
206	u32 tqp_index;
207	u32 flag;
208	u32 int_gl_idx;
209};
210
211#define HNAE3_IS_TX_RING(node) \
212	(((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
213
214struct hnae3_client_ops {
215	int (*init_instance)(struct hnae3_handle *handle);
216	void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
217	void (*link_status_change)(struct hnae3_handle *handle, bool state);
218	int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
219	int (*reset_notify)(struct hnae3_handle *handle,
220			    enum hnae3_reset_notify_type type);
221	void (*process_hw_error)(struct hnae3_handle *handle,
222				 enum hnae3_hw_error_type);
223};
224
225#define HNAE3_CLIENT_NAME_LENGTH 16
226struct hnae3_client {
227	char name[HNAE3_CLIENT_NAME_LENGTH];
228	unsigned long state;
229	enum hnae3_client_type type;
230	const struct hnae3_client_ops *ops;
231	struct list_head node;
232};
233
234struct hnae3_ae_dev {
235	struct pci_dev *pdev;
236	const struct hnae3_ae_ops *ops;
237	struct list_head node;
238	u32 flag;
239	unsigned long hw_err_reset_req;
240	enum hnae3_reset_type reset_type;
241	void *priv;
242};
243
244/* This struct defines the operation on the handle.
245 *
246 * init_ae_dev(): (mandatory)
247 *   Get PF configure from pci_dev and initialize PF hardware
248 * uninit_ae_dev()
249 *   Disable PF device and release PF resource
250 * register_client
251 *   Register client to ae_dev
252 * unregister_client()
253 *   Unregister client from ae_dev
254 * start()
255 *   Enable the hardware
256 * stop()
257 *   Disable the hardware
258 * start_client()
259 *   Inform the hclge that client has been started
260 * stop_client()
261 *   Inform the hclge that client has been stopped
262 * get_status()
263 *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
264 *   non-ok
265 * get_ksettings_an_result()
266 *   Get negotiation status,speed and duplex
267 * get_media_type()
268 *   Get media type of MAC
269 * check_port_speed()
270 *   Check target speed whether is supported
271 * adjust_link()
272 *   Adjust link status
273 * set_loopback()
274 *   Set loopback
275 * set_promisc_mode
276 *   Set promisc mode
277 * set_mtu()
278 *   set mtu
279 * get_pauseparam()
280 *   get tx and rx of pause frame use
281 * set_pauseparam()
282 *   set tx and rx of pause frame use
283 * set_autoneg()
284 *   set auto autonegotiation of pause frame use
285 * get_autoneg()
286 *   get auto autonegotiation of pause frame use
287 * restart_autoneg()
288 *   restart autonegotiation
289 * halt_autoneg()
290 *   halt/resume autonegotiation when autonegotiation on
291 * get_coalesce_usecs()
292 *   get usecs to delay a TX interrupt after a packet is sent
293 * get_rx_max_coalesced_frames()
294 *   get Maximum number of packets to be sent before a TX interrupt.
295 * set_coalesce_usecs()
296 *   set usecs to delay a TX interrupt after a packet is sent
297 * set_coalesce_frames()
298 *   set Maximum number of packets to be sent before a TX interrupt.
299 * get_mac_addr()
300 *   get mac address
301 * set_mac_addr()
302 *   set mac address
303 * add_uc_addr
304 *   Add unicast addr to mac table
305 * rm_uc_addr
306 *   Remove unicast addr from mac table
307 * set_mc_addr()
308 *   Set multicast address
309 * add_mc_addr
310 *   Add multicast address to mac table
311 * rm_mc_addr
312 *   Remove multicast address from mac table
313 * update_stats()
314 *   Update Old network device statistics
315 * get_mac_stats()
316 *   get mac pause statistics including tx_cnt and rx_cnt
317 * get_ethtool_stats()
318 *   Get ethtool network device statistics
319 * get_strings()
320 *   Get a set of strings that describe the requested objects
321 * get_sset_count()
322 *   Get number of strings that @get_strings will write
323 * update_led_status()
324 *   Update the led status
325 * set_led_id()
326 *   Set led id
327 * get_regs()
328 *   Get regs dump
329 * get_regs_len()
330 *   Get the len of the regs dump
331 * get_rss_key_size()
332 *   Get rss key size
333 * get_rss_indir_size()
334 *   Get rss indirection table size
335 * get_rss()
336 *   Get rss table
337 * set_rss()
338 *   Set rss table
339 * get_tc_size()
340 *   Get tc size of handle
341 * get_vector()
342 *   Get vector number and vector information
343 * put_vector()
344 *   Put the vector in hdev
345 * map_ring_to_vector()
346 *   Map rings to vector
347 * unmap_ring_from_vector()
348 *   Unmap rings from vector
349 * reset_queue()
350 *   Reset queue
351 * get_fw_version()
352 *   Get firmware version
353 * get_mdix_mode()
354 *   Get media typr of phy
355 * enable_vlan_filter()
356 *   Enable vlan filter
357 * set_vlan_filter()
358 *   Set vlan filter config of Ports
359 * set_vf_vlan_filter()
360 *   Set vlan filter config of vf
361 * restore_vlan_table()
362 *   Restore vlan filter entries after reset
363 * enable_hw_strip_rxvtag()
364 *   Enable/disable hardware strip vlan tag of packets received
365 * set_gro_en
366 *   Enable/disable HW GRO
367 * add_arfs_entry
368 *   Check the 5-tuples of flow, and create flow director rule
369 */
370struct hnae3_ae_ops {
371	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
372	void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
373	void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
374	void (*flr_done)(struct hnae3_ae_dev *ae_dev);
375	int (*init_client_instance)(struct hnae3_client *client,
376				    struct hnae3_ae_dev *ae_dev);
377	void (*uninit_client_instance)(struct hnae3_client *client,
378				       struct hnae3_ae_dev *ae_dev);
379	int (*start)(struct hnae3_handle *handle);
380	void (*stop)(struct hnae3_handle *handle);
381	int (*client_start)(struct hnae3_handle *handle);
382	void (*client_stop)(struct hnae3_handle *handle);
383	int (*get_status)(struct hnae3_handle *handle);
384	void (*get_ksettings_an_result)(struct hnae3_handle *handle,
385					u8 *auto_neg, u32 *speed, u8 *duplex);
386
387	int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
388				   u8 duplex);
389
390	void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
391			       u8 *module_type);
392	int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
393	void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
394			u8 *fec_mode);
395	int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
396	void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
397	int (*set_loopback)(struct hnae3_handle *handle,
398			    enum hnae3_loop loop_mode, bool en);
399
400	int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
401				bool en_mc_pmc);
402	int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
403
404	void (*get_pauseparam)(struct hnae3_handle *handle,
405			       u32 *auto_neg, u32 *rx_en, u32 *tx_en);
406	int (*set_pauseparam)(struct hnae3_handle *handle,
407			      u32 auto_neg, u32 rx_en, u32 tx_en);
408
409	int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
410	int (*get_autoneg)(struct hnae3_handle *handle);
411	int (*restart_autoneg)(struct hnae3_handle *handle);
412	int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
413
414	void (*get_coalesce_usecs)(struct hnae3_handle *handle,
415				   u32 *tx_usecs, u32 *rx_usecs);
416	void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
417					    u32 *tx_frames, u32 *rx_frames);
418	int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
419	int (*set_coalesce_frames)(struct hnae3_handle *handle,
420				   u32 coalesce_frames);
421	void (*get_coalesce_range)(struct hnae3_handle *handle,
422				   u32 *tx_frames_low, u32 *rx_frames_low,
423				   u32 *tx_frames_high, u32 *rx_frames_high,
424				   u32 *tx_usecs_low, u32 *rx_usecs_low,
425				   u32 *tx_usecs_high, u32 *rx_usecs_high);
426
427	void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
428	int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
429			    bool is_first);
430	int (*do_ioctl)(struct hnae3_handle *handle,
431			struct ifreq *ifr, int cmd);
432	int (*add_uc_addr)(struct hnae3_handle *handle,
433			   const unsigned char *addr);
434	int (*rm_uc_addr)(struct hnae3_handle *handle,
435			  const unsigned char *addr);
436	int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
437	int (*add_mc_addr)(struct hnae3_handle *handle,
438			   const unsigned char *addr);
439	int (*rm_mc_addr)(struct hnae3_handle *handle,
440			  const unsigned char *addr);
441	void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
442	void (*update_stats)(struct hnae3_handle *handle,
443			     struct net_device_stats *net_stats);
444	void (*get_stats)(struct hnae3_handle *handle, u64 *data);
445	void (*get_mac_stats)(struct hnae3_handle *handle,
446			      struct hns3_mac_stats *mac_stats);
447	void (*get_strings)(struct hnae3_handle *handle,
448			    u32 stringset, u8 *data);
449	int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
450
451	void (*get_regs)(struct hnae3_handle *handle, u32 *version,
452			 void *data);
453	int (*get_regs_len)(struct hnae3_handle *handle);
454
455	u32 (*get_rss_key_size)(struct hnae3_handle *handle);
456	u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
457	int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
458		       u8 *hfunc);
459	int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
460		       const u8 *key, const u8 hfunc);
461	int (*set_rss_tuple)(struct hnae3_handle *handle,
462			     struct ethtool_rxnfc *cmd);
463	int (*get_rss_tuple)(struct hnae3_handle *handle,
464			     struct ethtool_rxnfc *cmd);
465
466	int (*get_tc_size)(struct hnae3_handle *handle);
467
468	int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
469			  struct hnae3_vector_info *vector_info);
470	int (*put_vector)(struct hnae3_handle *handle, int vector_num);
471	int (*map_ring_to_vector)(struct hnae3_handle *handle,
472				  int vector_num,
473				  struct hnae3_ring_chain_node *vr_chain);
474	int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
475				      int vector_num,
476				      struct hnae3_ring_chain_node *vr_chain);
477
478	int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
479	u32 (*get_fw_version)(struct hnae3_handle *handle);
480	void (*get_mdix_mode)(struct hnae3_handle *handle,
481			      u8 *tp_mdix_ctrl, u8 *tp_mdix);
482
483	void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
484	int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
485			       u16 vlan_id, bool is_kill);
486	int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
487				  u16 vlan, u8 qos, __be16 proto);
488	int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
489	void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
490	enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
491						 unsigned long *addr);
492	void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
493					  enum hnae3_reset_type rst_type);
494	void (*get_channels)(struct hnae3_handle *handle,
495			     struct ethtool_channels *ch);
496	void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
497				      u16 *alloc_tqps, u16 *max_rss_size);
498	int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
499			    bool rxfh_configured);
500	void (*get_flowctrl_adv)(struct hnae3_handle *handle,
501				 u32 *flowctrl_adv);
502	int (*set_led_id)(struct hnae3_handle *handle,
503			  enum ethtool_phys_id_state status);
504	void (*get_link_mode)(struct hnae3_handle *handle,
505			      unsigned long *supported,
506			      unsigned long *advertising);
507	int (*add_fd_entry)(struct hnae3_handle *handle,
508			    struct ethtool_rxnfc *cmd);
509	int (*del_fd_entry)(struct hnae3_handle *handle,
510			    struct ethtool_rxnfc *cmd);
511	void (*del_all_fd_entries)(struct hnae3_handle *handle,
512				   bool clear_list);
513	int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
514			       struct ethtool_rxnfc *cmd);
515	int (*get_fd_rule_info)(struct hnae3_handle *handle,
516				struct ethtool_rxnfc *cmd);
517	int (*get_fd_all_rules)(struct hnae3_handle *handle,
518				struct ethtool_rxnfc *cmd, u32 *rule_locs);
519	int (*restore_fd_rules)(struct hnae3_handle *handle);
520	void (*enable_fd)(struct hnae3_handle *handle, bool enable);
521	int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
522			      u16 flow_id, struct flow_keys *fkeys);
523	int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf);
524	pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
525	bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
526	bool (*ae_dev_resetting)(struct hnae3_handle *handle);
527	unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
528	int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
529	u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
530	void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
531	int (*mac_connect_phy)(struct hnae3_handle *handle);
532	void (*mac_disconnect_phy)(struct hnae3_handle *handle);
533	void (*restore_vlan_table)(struct hnae3_handle *handle);
534};
535
536struct hnae3_dcb_ops {
537	/* IEEE 802.1Qaz std */
538	int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
539	int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
540	int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
541	int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
542
543	/* DCBX configuration */
544	u8   (*getdcbx)(struct hnae3_handle *);
545	u8   (*setdcbx)(struct hnae3_handle *, u8);
546
547	int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
548};
549
550struct hnae3_ae_algo {
551	const struct hnae3_ae_ops *ops;
552	struct list_head node;
553	const struct pci_device_id *pdev_id_table;
554};
555
556#define HNAE3_INT_NAME_LEN        (IFNAMSIZ + 16)
557#define HNAE3_ITR_COUNTDOWN_START 100
558
559struct hnae3_tc_info {
560	u16	tqp_offset;	/* TQP offset from base TQP */
561	u16	tqp_count;	/* Total TQPs */
562	u8	tc;		/* TC index */
563	bool	enable;		/* If this TC is enable or not */
564};
565
566#define HNAE3_MAX_TC		8
567#define HNAE3_MAX_USER_PRIO	8
568struct hnae3_knic_private_info {
569	struct net_device *netdev; /* Set by KNIC client when init instance */
570	u16 rss_size;		   /* Allocated RSS queues */
571	u16 req_rss_size;
572	u16 rx_buf_len;
573	u16 num_tx_desc;
574	u16 num_rx_desc;
575
576	u8 num_tc;		   /* Total number of enabled TCs */
577	u8 prio_tc[HNAE3_MAX_USER_PRIO];  /* TC indexed by prio */
578	struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
579
580	u16 num_tqps;		  /* total number of TQPs in this handle */
581	struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
582	const struct hnae3_dcb_ops *dcb_ops;
583
584	u16 int_rl_setting;
585	enum pkt_hash_types rss_type;
586};
587
588struct hnae3_roce_private_info {
589	struct net_device *netdev;
590	void __iomem *roce_io_base;
591	int base_vector;
592	int num_vectors;
593
594	/* The below attributes defined for RoCE client, hnae3 gives
595	 * initial values to them, and RoCE client can modify and use
596	 * them.
597	 */
598	unsigned long reset_state;
599	unsigned long instance_state;
600	unsigned long state;
601};
602
603struct hnae3_unic_private_info {
604	struct net_device *netdev;
605	u16 rx_buf_len;
606	u16 num_tx_desc;
607	u16 num_rx_desc;
608
609	u16 num_tqps;	/* total number of tqps in this handle */
610	struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
611};
612
613#define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
614#define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
615#define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK	BIT(2)
616#define HNAE3_SUPPORT_VF	      BIT(3)
617#define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK	BIT(4)
618
619#define HNAE3_USER_UPE		BIT(0)	/* unicast promisc enabled by user */
620#define HNAE3_USER_MPE		BIT(1)	/* mulitcast promisc enabled by user */
621#define HNAE3_BPE		BIT(2)	/* broadcast promisc enable */
622#define HNAE3_OVERFLOW_UPE	BIT(3)	/* unicast mac vlan overflow */
623#define HNAE3_OVERFLOW_MPE	BIT(4)	/* multicast mac vlan overflow */
624#define HNAE3_VLAN_FLTR		BIT(5)	/* enable vlan filter */
625#define HNAE3_UPE		(HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
626#define HNAE3_MPE		(HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
627
628struct hnae3_handle {
629	struct hnae3_client *client;
630	struct pci_dev *pdev;
631	void *priv;
632	struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
633	u64 flags; /* Indicate the capabilities for this handle */
634
635	union {
636		struct net_device *netdev; /* first member */
637		struct hnae3_knic_private_info kinfo;
638		struct hnae3_unic_private_info uinfo;
639		struct hnae3_roce_private_info rinfo;
640	};
641
642	u32 numa_node_mask;	/* for multi-chip support */
643
644	enum hnae3_port_base_vlan_state port_base_vlan_state;
645
646	u8 netdev_flags;
647	struct dentry *hnae3_dbgfs;
648
649	/* Network interface message level enabled bits */
650	u32 msg_enable;
651};
652
653#define hnae3_set_field(origin, mask, shift, val) \
654	do { \
655		(origin) &= (~(mask)); \
656		(origin) |= ((val) << (shift)) & (mask); \
657	} while (0)
658#define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
659
660#define hnae3_set_bit(origin, shift, val) \
661	hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
662#define hnae3_get_bit(origin, shift) \
663	hnae3_get_field((origin), (0x1 << (shift)), (shift))
664
665int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
666void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
667
668void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
669void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
670
671void hnae3_unregister_client(struct hnae3_client *client);
672int hnae3_register_client(struct hnae3_client *client);
673
674void hnae3_set_client_init_flag(struct hnae3_client *client,
675				struct hnae3_ae_dev *ae_dev,
676				unsigned int inited);
677#endif