1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net>
  4 */
  5
  6#include <linux/component.h>
  7#include <linux/module.h>
  8#include <linux/of_device.h>
  9#include <linux/platform_device.h>
 10
 11#include <drm/drm_crtc_helper.h>
 12#include <drm/drm_of.h>
 13
 14#include "sun8i_dw_hdmi.h"
 15#include "sun8i_tcon_top.h"
 16
 17static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder,
 18					   struct drm_display_mode *mode,
 19					   struct drm_display_mode *adj_mode)
 20{
 21	struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder);
 22
 23	if (hdmi->quirks->set_rate)
 24		clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000);
 25}
 26
 27static const struct drm_encoder_helper_funcs
 28sun8i_dw_hdmi_encoder_helper_funcs = {
 29	.mode_set = sun8i_dw_hdmi_encoder_mode_set,
 30};
 31
 32static const struct drm_encoder_funcs sun8i_dw_hdmi_encoder_funcs = {
 33	.destroy = drm_encoder_cleanup,
 34};
 35
 36static enum drm_mode_status
 37sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector,
 38			      const struct drm_display_mode *mode)
 39{
 40	if (mode->clock > 297000)
 41		return MODE_CLOCK_HIGH;
 42
 43	return MODE_OK;
 44}
 45
 46static enum drm_mode_status
 47sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector,
 48			    const struct drm_display_mode *mode)
 49{
 50	/*
 51	 * Controller support maximum of 594 MHz, which correlates to
 52	 * 4K@60Hz 4:4:4 or RGB. However, for frequencies greater than
 53	 * 340 MHz scrambling has to be enabled. Because scrambling is
 54	 * not yet implemented, just limit to 340 MHz for now.
 55	 */
 56	if (mode->clock > 340000)
 57		return MODE_CLOCK_HIGH;
 58
 59	return MODE_OK;
 60}
 61
 62static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node)
 63{
 64	return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
 65		!!of_match_node(sun8i_tcon_top_of_table, node);
 66}
 67
 68static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm,
 69					     struct device_node *node)
 70{
 71	struct device_node *port, *ep, *remote, *remote_port;
 72	u32 crtcs = 0;
 73
 74	remote = of_graph_get_remote_node(node, 0, -1);
 75	if (!remote)
 76		return 0;
 77
 78	if (sun8i_dw_hdmi_node_is_tcon_top(remote)) {
 79		port = of_graph_get_port_by_id(remote, 4);
 80		if (!port)
 81			goto crtcs_exit;
 82
 83		for_each_child_of_node(port, ep) {
 84			remote_port = of_graph_get_remote_port(ep);
 85			if (remote_port) {
 86				crtcs |= drm_of_crtc_port_mask(drm, remote_port);
 87				of_node_put(remote_port);
 88			}
 89		}
 90	} else {
 91		crtcs = drm_of_find_possible_crtcs(drm, node);
 92	}
 93
 94crtcs_exit:
 95	of_node_put(remote);
 96
 97	return crtcs;
 98}
 99
100static int sun8i_dw_hdmi_find_connector_pdev(struct device *dev,
101					     struct platform_device **pdev_out)
102{
103	struct platform_device *pdev;
104	struct device_node *remote;
105
106	remote = of_graph_get_remote_node(dev->of_node, 1, -1);
107	if (!remote)
108		return -ENODEV;
109
110	if (!of_device_is_compatible(remote, "hdmi-connector")) {
111		of_node_put(remote);
112		return -ENODEV;
113	}
114
115	pdev = of_find_device_by_node(remote);
116	of_node_put(remote);
117	if (!pdev)
118		return -ENODEV;
119
120	*pdev_out = pdev;
121	return 0;
122}
123
124static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
125			      void *data)
126{
127	struct platform_device *pdev = to_platform_device(dev), *connector_pdev;
128	struct dw_hdmi_plat_data *plat_data;
129	struct drm_device *drm = data;
130	struct device_node *phy_node;
131	struct drm_encoder *encoder;
132	struct sun8i_dw_hdmi *hdmi;
133	int ret;
134
135	if (!pdev->dev.of_node)
136		return -ENODEV;
137
138	hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
139	if (!hdmi)
140		return -ENOMEM;
141
142	plat_data = &hdmi->plat_data;
143	hdmi->dev = &pdev->dev;
144	encoder = &hdmi->encoder;
145
146	hdmi->quirks = of_device_get_match_data(dev);
147
148	encoder->possible_crtcs =
149		sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node);
150	/*
151	 * If we failed to find the CRTC(s) which this encoder is
152	 * supposed to be connected to, it's because the CRTC has
153	 * not been registered yet.  Defer probing, and hope that
154	 * the required CRTC is added later.
155	 */
156	if (encoder->possible_crtcs == 0)
157		return -EPROBE_DEFER;
158
159	hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl");
160	if (IS_ERR(hdmi->rst_ctrl)) {
161		dev_err(dev, "Could not get ctrl reset control\n");
162		return PTR_ERR(hdmi->rst_ctrl);
163	}
164
165	hdmi->clk_tmds = devm_clk_get(dev, "tmds");
166	if (IS_ERR(hdmi->clk_tmds)) {
167		dev_err(dev, "Couldn't get the tmds clock\n");
168		return PTR_ERR(hdmi->clk_tmds);
169	}
170
171	hdmi->regulator = devm_regulator_get(dev, "hvcc");
172	if (IS_ERR(hdmi->regulator)) {
173		dev_err(dev, "Couldn't get regulator\n");
174		return PTR_ERR(hdmi->regulator);
175	}
176
177	ret = sun8i_dw_hdmi_find_connector_pdev(dev, &connector_pdev);
178	if (!ret) {
179		hdmi->ddc_en = gpiod_get_optional(&connector_pdev->dev,
180						  "ddc-en", GPIOD_OUT_HIGH);
181		platform_device_put(connector_pdev);
182
183		if (IS_ERR(hdmi->ddc_en)) {
184			dev_err(dev, "Couldn't get ddc-en gpio\n");
185			return PTR_ERR(hdmi->ddc_en);
186		}
187	}
188
189	ret = regulator_enable(hdmi->regulator);
190	if (ret) {
191		dev_err(dev, "Failed to enable regulator\n");
192		goto err_unref_ddc_en;
193	}
194
195	gpiod_set_value(hdmi->ddc_en, 1);
196
197	ret = reset_control_deassert(hdmi->rst_ctrl);
198	if (ret) {
199		dev_err(dev, "Could not deassert ctrl reset control\n");
200		goto err_disable_ddc_en;
201	}
202
203	ret = clk_prepare_enable(hdmi->clk_tmds);
204	if (ret) {
205		dev_err(dev, "Could not enable tmds clock\n");
206		goto err_assert_ctrl_reset;
207	}
208
209	phy_node = of_parse_phandle(dev->of_node, "phys", 0);
210	if (!phy_node) {
211		dev_err(dev, "Can't found PHY phandle\n");
212		goto err_disable_clk_tmds;
213	}
214
215	ret = sun8i_hdmi_phy_probe(hdmi, phy_node);
216	of_node_put(phy_node);
217	if (ret) {
218		dev_err(dev, "Couldn't get the HDMI PHY\n");
219		goto err_disable_clk_tmds;
220	}
221
222	drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
223	drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs,
224			 DRM_MODE_ENCODER_TMDS, NULL);
225
226	sun8i_hdmi_phy_init(hdmi->phy);
227
228	plat_data->mode_valid = hdmi->quirks->mode_valid;
229	sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
230
231	platform_set_drvdata(pdev, hdmi);
232
233	hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
234
235	/*
236	 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
237	 * which would have called the encoder cleanup.  Do it manually.
238	 */
239	if (IS_ERR(hdmi->hdmi)) {
240		ret = PTR_ERR(hdmi->hdmi);
241		goto cleanup_encoder;
242	}
243
244	return 0;
245
246cleanup_encoder:
247	drm_encoder_cleanup(encoder);
248	sun8i_hdmi_phy_remove(hdmi);
249err_disable_clk_tmds:
250	clk_disable_unprepare(hdmi->clk_tmds);
251err_assert_ctrl_reset:
252	reset_control_assert(hdmi->rst_ctrl);
253err_disable_ddc_en:
254	gpiod_set_value(hdmi->ddc_en, 0);
255	regulator_disable(hdmi->regulator);
256err_unref_ddc_en:
257	if (hdmi->ddc_en)
258		gpiod_put(hdmi->ddc_en);
259
260	return ret;
261}
262
263static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master,
264				 void *data)
265{
266	struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
267
268	dw_hdmi_unbind(hdmi->hdmi);
269	sun8i_hdmi_phy_remove(hdmi);
270	clk_disable_unprepare(hdmi->clk_tmds);
271	reset_control_assert(hdmi->rst_ctrl);
272	gpiod_set_value(hdmi->ddc_en, 0);
273	regulator_disable(hdmi->regulator);
274
275	if (hdmi->ddc_en)
276		gpiod_put(hdmi->ddc_en);
277}
278
279static const struct component_ops sun8i_dw_hdmi_ops = {
280	.bind	= sun8i_dw_hdmi_bind,
281	.unbind	= sun8i_dw_hdmi_unbind,
282};
283
284static int sun8i_dw_hdmi_probe(struct platform_device *pdev)
285{
286	return component_add(&pdev->dev, &sun8i_dw_hdmi_ops);
287}
288
289static int sun8i_dw_hdmi_remove(struct platform_device *pdev)
290{
291	component_del(&pdev->dev, &sun8i_dw_hdmi_ops);
292
293	return 0;
294}
295
296static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
297	.mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
298	.set_rate = true,
299};
300
301static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = {
302	.mode_valid = sun8i_dw_hdmi_mode_valid_h6,
303};
304
305static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
306	{
307		.compatible = "allwinner,sun8i-a83t-dw-hdmi",
308		.data = &sun8i_a83t_quirks,
309	},
310	{
311		.compatible = "allwinner,sun50i-h6-dw-hdmi",
312		.data = &sun50i_h6_quirks,
313	},
314	{ /* sentinel */ },
315};
316MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids);
317
318static struct platform_driver sun8i_dw_hdmi_pltfm_driver = {
319	.probe  = sun8i_dw_hdmi_probe,
320	.remove = sun8i_dw_hdmi_remove,
321	.driver = {
322		.name = "sun8i-dw-hdmi",
323		.of_match_table = sun8i_dw_hdmi_dt_ids,
324	},
325};
326module_platform_driver(sun8i_dw_hdmi_pltfm_driver);
327
328MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
329MODULE_DESCRIPTION("Allwinner DW HDMI bridge");
330MODULE_LICENSE("GPL");