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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2018 Renesas Electronics
4 *
5 * Copyright (C) 2016 Atmel
6 * Bo Shen <voice.shen@atmel.com>
7 *
8 * Authors: Bo Shen <voice.shen@atmel.com>
9 * Boris Brezillon <boris.brezillon@free-electrons.com>
10 * Wu, Songjun <Songjun.Wu@atmel.com>
11 *
12 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
13 */
14
15#include <linux/gpio/consumer.h>
16#include <linux/i2c-mux.h>
17#include <linux/i2c.h>
18#include <linux/module.h>
19#include <linux/regmap.h>
20#include <linux/clk.h>
21
22#include <drm/drm_atomic_helper.h>
23#include <drm/drm_drv.h>
24#include <drm/drm_edid.h>
25#include <drm/drm_print.h>
26#include <drm/drm_probe_helper.h>
27
28#include <sound/hdmi-codec.h>
29
30#define SII902X_TPI_VIDEO_DATA 0x0
31
32#define SII902X_TPI_PIXEL_REPETITION 0x8
33#define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)
34#define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)
35#define SII902X_TPI_AVI_PIXEL_REP_4X 3
36#define SII902X_TPI_AVI_PIXEL_REP_2X 1
37#define SII902X_TPI_AVI_PIXEL_REP_NONE 0
38#define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
39#define SII902X_TPI_CLK_RATIO_1X (1 << 6)
40#define SII902X_TPI_CLK_RATIO_2X (2 << 6)
41#define SII902X_TPI_CLK_RATIO_4X (3 << 6)
42
43#define SII902X_TPI_AVI_IN_FORMAT 0x9
44#define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)
45#define SII902X_TPI_AVI_INPUT_DITHER BIT(6)
46#define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)
47#define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)
48#define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
49#define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
50#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
51#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
52#define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
53
54#define SII902X_TPI_AVI_INFOFRAME 0x0c
55
56#define SII902X_SYS_CTRL_DATA 0x1a
57#define SII902X_SYS_CTRL_PWR_DWN BIT(4)
58#define SII902X_SYS_CTRL_AV_MUTE BIT(3)
59#define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)
60#define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)
61#define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
62#define SII902X_SYS_CTRL_OUTPUT_HDMI 1
63#define SII902X_SYS_CTRL_OUTPUT_DVI 0
64
65#define SII902X_REG_CHIPID(n) (0x1b + (n))
66
67#define SII902X_PWR_STATE_CTRL 0x1e
68#define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
69#define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)
70
71/* Audio */
72#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
73#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
74#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
75#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
76#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
77#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)
78#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)
79#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
80#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)
81#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)
82#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)
83#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)
84
85#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
86#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
87#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
88#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
89#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)
90#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
91#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)
92#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
93#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)
94#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
95#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)
96#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)
97#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)
98#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)
99#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)
100#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)
101#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)
102#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
103#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)
104
105#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
106#define SII902X_TPI_I2S_STRM_HDR_SIZE 5
107
108#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
109#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
110#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
111#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
112#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
113#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
114#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
115#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
116#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
117#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
118#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
119#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)
120#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
121#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)
122#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
123#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)
124#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)
125
126#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
127#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
128#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)
129#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)
130#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)
131#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)
132#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)
133#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)
134#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)
135#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
136#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)
137#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)
138#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)
139
140#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
141
142#define SII902X_INT_ENABLE 0x3c
143#define SII902X_INT_STATUS 0x3d
144#define SII902X_HOTPLUG_EVENT BIT(0)
145#define SII902X_PLUGGED_STATUS BIT(2)
146
147#define SII902X_REG_TPI_RQB 0xc7
148
149/* Indirect internal register access */
150#define SII902X_IND_SET_PAGE 0xbc
151#define SII902X_IND_OFFSET 0xbd
152#define SII902X_IND_VALUE 0xbe
153
154#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
155#define SII902X_TPI_MISC_INFOFRAME_END 0xde
156#define SII902X_TPI_MISC_INFOFRAME_SIZE \
157 (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
158
159#define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500
160
161#define SII902X_AUDIO_PORT_INDEX 3
162
163struct sii902x {
164 struct i2c_client *i2c;
165 struct regmap *regmap;
166 struct drm_bridge bridge;
167 struct drm_connector connector;
168 struct gpio_desc *reset_gpio;
169 struct i2c_mux_core *i2cmux;
170 /*
171 * Mutex protects audio and video functions from interfering
172 * each other, by keeping their i2c command sequences atomic.
173 */
174 struct mutex mutex;
175 struct sii902x_audio {
176 struct platform_device *pdev;
177 struct clk *mclk;
178 u32 i2s_fifo_sequence[4];
179 } audio;
180};
181
182static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
183{
184 union i2c_smbus_data data;
185 int ret;
186
187 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
188 I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
189
190 if (ret < 0)
191 return ret;
192
193 *val = data.byte;
194 return 0;
195}
196
197static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
198{
199 union i2c_smbus_data data;
200
201 data.byte = val;
202
203 return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
204 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
205 &data);
206}
207
208static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
209 u8 val)
210{
211 int ret;
212 u8 status;
213
214 ret = sii902x_read_unlocked(i2c, reg, &status);
215 if (ret)
216 return ret;
217 status &= ~mask;
218 status |= val & mask;
219 return sii902x_write_unlocked(i2c, reg, status);
220}
221
222static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
223{
224 return container_of(bridge, struct sii902x, bridge);
225}
226
227static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
228{
229 return container_of(con, struct sii902x, connector);
230}
231
232static void sii902x_reset(struct sii902x *sii902x)
233{
234 if (!sii902x->reset_gpio)
235 return;
236
237 gpiod_set_value(sii902x->reset_gpio, 1);
238
239 /* The datasheet says treset-min = 100us. Make it 150us to be sure. */
240 usleep_range(150, 200);
241
242 gpiod_set_value(sii902x->reset_gpio, 0);
243}
244
245static enum drm_connector_status
246sii902x_connector_detect(struct drm_connector *connector, bool force)
247{
248 struct sii902x *sii902x = connector_to_sii902x(connector);
249 unsigned int status;
250
251 mutex_lock(&sii902x->mutex);
252
253 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
254
255 mutex_unlock(&sii902x->mutex);
256
257 return (status & SII902X_PLUGGED_STATUS) ?
258 connector_status_connected : connector_status_disconnected;
259}
260
261static const struct drm_connector_funcs sii902x_connector_funcs = {
262 .detect = sii902x_connector_detect,
263 .fill_modes = drm_helper_probe_single_connector_modes,
264 .destroy = drm_connector_cleanup,
265 .reset = drm_atomic_helper_connector_reset,
266 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
267 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
268};
269
270static int sii902x_get_modes(struct drm_connector *connector)
271{
272 struct sii902x *sii902x = connector_to_sii902x(connector);
273 u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
274 u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
275 struct edid *edid;
276 int num = 0, ret;
277
278 mutex_lock(&sii902x->mutex);
279
280 edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]);
281 drm_connector_update_edid_property(connector, edid);
282 if (edid) {
283 if (drm_detect_hdmi_monitor(edid))
284 output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
285
286 num = drm_add_edid_modes(connector, edid);
287 kfree(edid);
288 }
289
290 ret = drm_display_info_set_bus_formats(&connector->display_info,
291 &bus_format, 1);
292 if (ret)
293 goto error_out;
294
295 ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
296 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
297 if (ret)
298 goto error_out;
299
300 ret = num;
301
302error_out:
303 mutex_unlock(&sii902x->mutex);
304
305 return ret;
306}
307
308static enum drm_mode_status sii902x_mode_valid(struct drm_connector *connector,
309 struct drm_display_mode *mode)
310{
311 /* TODO: check mode */
312
313 return MODE_OK;
314}
315
316static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
317 .get_modes = sii902x_get_modes,
318 .mode_valid = sii902x_mode_valid,
319};
320
321static void sii902x_bridge_disable(struct drm_bridge *bridge)
322{
323 struct sii902x *sii902x = bridge_to_sii902x(bridge);
324
325 mutex_lock(&sii902x->mutex);
326
327 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
328 SII902X_SYS_CTRL_PWR_DWN,
329 SII902X_SYS_CTRL_PWR_DWN);
330
331 mutex_unlock(&sii902x->mutex);
332}
333
334static void sii902x_bridge_enable(struct drm_bridge *bridge)
335{
336 struct sii902x *sii902x = bridge_to_sii902x(bridge);
337
338 mutex_lock(&sii902x->mutex);
339
340 regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
341 SII902X_AVI_POWER_STATE_MSK,
342 SII902X_AVI_POWER_STATE_D(0));
343 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
344 SII902X_SYS_CTRL_PWR_DWN, 0);
345
346 mutex_unlock(&sii902x->mutex);
347}
348
349static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
350 const struct drm_display_mode *mode,
351 const struct drm_display_mode *adj)
352{
353 struct sii902x *sii902x = bridge_to_sii902x(bridge);
354 struct regmap *regmap = sii902x->regmap;
355 u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
356 struct hdmi_avi_infoframe frame;
357 u16 pixel_clock_10kHz = adj->clock / 10;
358 int ret;
359
360 buf[0] = pixel_clock_10kHz & 0xff;
361 buf[1] = pixel_clock_10kHz >> 8;
362 buf[2] = adj->vrefresh;
363 buf[3] = 0x00;
364 buf[4] = adj->hdisplay;
365 buf[5] = adj->hdisplay >> 8;
366 buf[6] = adj->vdisplay;
367 buf[7] = adj->vdisplay >> 8;
368 buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
369 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
370 buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
371 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
372
373 mutex_lock(&sii902x->mutex);
374
375 ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
376 if (ret)
377 goto out;
378
379 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
380 &sii902x->connector, adj);
381 if (ret < 0) {
382 DRM_ERROR("couldn't fill AVI infoframe\n");
383 goto out;
384 }
385
386 ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
387 if (ret < 0) {
388 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
389 goto out;
390 }
391
392 /* Do not send the infoframe header, but keep the CRC field. */
393 regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
394 buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
395 HDMI_AVI_INFOFRAME_SIZE + 1);
396
397out:
398 mutex_unlock(&sii902x->mutex);
399}
400
401static int sii902x_bridge_attach(struct drm_bridge *bridge)
402{
403 struct sii902x *sii902x = bridge_to_sii902x(bridge);
404 struct drm_device *drm = bridge->dev;
405 int ret;
406
407 drm_connector_helper_add(&sii902x->connector,
408 &sii902x_connector_helper_funcs);
409
410 if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
411 dev_err(&sii902x->i2c->dev,
412 "sii902x driver is only compatible with DRM devices supporting atomic updates\n");
413 return -ENOTSUPP;
414 }
415
416 ret = drm_connector_init(drm, &sii902x->connector,
417 &sii902x_connector_funcs,
418 DRM_MODE_CONNECTOR_HDMIA);
419 if (ret)
420 return ret;
421
422 if (sii902x->i2c->irq > 0)
423 sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
424 else
425 sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
426
427 drm_connector_attach_encoder(&sii902x->connector, bridge->encoder);
428
429 return 0;
430}
431
432static const struct drm_bridge_funcs sii902x_bridge_funcs = {
433 .attach = sii902x_bridge_attach,
434 .mode_set = sii902x_bridge_mode_set,
435 .disable = sii902x_bridge_disable,
436 .enable = sii902x_bridge_enable,
437};
438
439static int sii902x_mute(struct sii902x *sii902x, bool mute)
440{
441 struct device *dev = &sii902x->i2c->dev;
442 unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
443 SII902X_TPI_AUDIO_MUTE_DISABLE;
444
445 dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
446
447 return regmap_update_bits(sii902x->regmap,
448 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
449 SII902X_TPI_AUDIO_MUTE_ENABLE, val);
450}
451
452static const int sii902x_mclk_div_table[] = {
453 128, 256, 384, 512, 768, 1024, 1152, 192 };
454
455static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
456 unsigned int mclk)
457{
458 int div = mclk / rate;
459 int distance = 100000;
460 u8 i, nearest = 0;
461
462 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
463 unsigned int d = abs(div - sii902x_mclk_div_table[i]);
464
465 if (d >= distance)
466 continue;
467
468 nearest = i;
469 distance = d;
470 if (d == 0)
471 break;
472 }
473
474 *i2s_config_reg |= nearest << 4;
475
476 return sii902x_mclk_div_table[nearest];
477}
478
479static const struct sii902x_sample_freq {
480 u32 freq;
481 u8 val;
482} sii902x_sample_freq[] = {
483 { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },
484 { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },
485 { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },
486 { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },
487 { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },
488 { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },
489 { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },
490};
491
492static int sii902x_audio_hw_params(struct device *dev, void *data,
493 struct hdmi_codec_daifmt *daifmt,
494 struct hdmi_codec_params *params)
495{
496 struct sii902x *sii902x = dev_get_drvdata(dev);
497 u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
498 u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
499 SII902X_TPI_AUDIO_MUTE_ENABLE |
500 SII902X_TPI_AUDIO_CODING_PCM);
501 u8 config_byte3_reg = 0;
502 u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
503 unsigned long mclk_rate;
504 int i, ret;
505
506 if (daifmt->bit_clk_master || daifmt->frame_clk_master) {
507 dev_dbg(dev, "%s: I2S master mode not supported\n", __func__);
508 return -EINVAL;
509 }
510
511 switch (daifmt->fmt) {
512 case HDMI_I2S:
513 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
514 SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
515 break;
516 case HDMI_RIGHT_J:
517 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
518 break;
519 case HDMI_LEFT_J:
520 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
521 break;
522 default:
523 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
524 daifmt->fmt);
525 return -EINVAL;
526 }
527
528 if (daifmt->bit_clk_inv)
529 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
530 else
531 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
532
533 if (daifmt->frame_clk_inv)
534 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
535 else
536 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
537
538 if (params->channels > 2)
539 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
540 else
541 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
542
543 switch (params->sample_width) {
544 case 16:
545 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
546 break;
547 case 20:
548 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
549 break;
550 case 24:
551 case 32:
552 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
553 break;
554 default:
555 dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
556 params->sample_width);
557 return -EINVAL;
558 }
559
560 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
561 if (params->sample_rate == sii902x_sample_freq[i].freq) {
562 config_byte3_reg |= sii902x_sample_freq[i].val;
563 break;
564 }
565 }
566
567 ret = clk_prepare_enable(sii902x->audio.mclk);
568 if (ret) {
569 dev_err(dev, "Enabling mclk failed: %d\n", ret);
570 return ret;
571 }
572
573 if (sii902x->audio.mclk) {
574 mclk_rate = clk_get_rate(sii902x->audio.mclk);
575 ret = sii902x_select_mclk_div(&i2s_config_reg,
576 params->sample_rate, mclk_rate);
577 if (mclk_rate != ret * params->sample_rate)
578 dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
579 mclk_rate, ret, params->sample_rate);
580 }
581
582 mutex_lock(&sii902x->mutex);
583
584 ret = regmap_write(sii902x->regmap,
585 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
586 config_byte2_reg);
587 if (ret < 0)
588 goto out;
589
590 ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
591 i2s_config_reg);
592 if (ret)
593 goto out;
594
595 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
596 sii902x->audio.i2s_fifo_sequence[i]; i++)
597 regmap_write(sii902x->regmap,
598 SII902X_TPI_I2S_ENABLE_MAPPING_REG,
599 sii902x->audio.i2s_fifo_sequence[i]);
600
601 ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
602 config_byte3_reg);
603 if (ret)
604 goto out;
605
606 ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
607 params->iec.status,
608 min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
609 sizeof(params->iec.status)));
610 if (ret)
611 goto out;
612
613 ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf,
614 sizeof(infoframe_buf));
615 if (ret < 0) {
616 dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
617 __func__, ret);
618 goto out;
619 }
620
621 ret = regmap_bulk_write(sii902x->regmap,
622 SII902X_TPI_MISC_INFOFRAME_BASE,
623 infoframe_buf,
624 min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
625 if (ret)
626 goto out;
627
628 /* Decode Level 0 Packets */
629 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
630 if (ret)
631 goto out;
632
633 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
634 if (ret)
635 goto out;
636
637 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
638 if (ret)
639 goto out;
640
641 dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
642out:
643 mutex_unlock(&sii902x->mutex);
644
645 if (ret) {
646 clk_disable_unprepare(sii902x->audio.mclk);
647 dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
648 ret);
649 }
650
651 return ret;
652}
653
654static void sii902x_audio_shutdown(struct device *dev, void *data)
655{
656 struct sii902x *sii902x = dev_get_drvdata(dev);
657
658 mutex_lock(&sii902x->mutex);
659
660 regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
661 SII902X_TPI_AUDIO_INTERFACE_DISABLE);
662
663 mutex_unlock(&sii902x->mutex);
664
665 clk_disable_unprepare(sii902x->audio.mclk);
666}
667
668static int sii902x_audio_digital_mute(struct device *dev,
669 void *data, bool enable)
670{
671 struct sii902x *sii902x = dev_get_drvdata(dev);
672
673 mutex_lock(&sii902x->mutex);
674
675 sii902x_mute(sii902x, enable);
676
677 mutex_unlock(&sii902x->mutex);
678
679 return 0;
680}
681
682static int sii902x_audio_get_eld(struct device *dev, void *data,
683 uint8_t *buf, size_t len)
684{
685 struct sii902x *sii902x = dev_get_drvdata(dev);
686
687 mutex_lock(&sii902x->mutex);
688
689 memcpy(buf, sii902x->connector.eld,
690 min(sizeof(sii902x->connector.eld), len));
691
692 mutex_unlock(&sii902x->mutex);
693
694 return 0;
695}
696
697static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
698 struct device_node *endpoint)
699{
700 struct of_endpoint of_ep;
701 int ret;
702
703 ret = of_graph_parse_endpoint(endpoint, &of_ep);
704 if (ret < 0)
705 return ret;
706
707 /*
708 * HDMI sound should be located at reg = <3>
709 * Return expected DAI index 0.
710 */
711 if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
712 return 0;
713
714 return -EINVAL;
715}
716
717static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
718 .hw_params = sii902x_audio_hw_params,
719 .audio_shutdown = sii902x_audio_shutdown,
720 .digital_mute = sii902x_audio_digital_mute,
721 .get_eld = sii902x_audio_get_eld,
722 .get_dai_id = sii902x_audio_get_dai_id,
723};
724
725static int sii902x_audio_codec_init(struct sii902x *sii902x,
726 struct device *dev)
727{
728 static const u8 audio_fifo_id[] = {
729 SII902X_TPI_I2S_CONFIG_FIFO0,
730 SII902X_TPI_I2S_CONFIG_FIFO1,
731 SII902X_TPI_I2S_CONFIG_FIFO2,
732 SII902X_TPI_I2S_CONFIG_FIFO3,
733 };
734 static const u8 i2s_lane_id[] = {
735 SII902X_TPI_I2S_SELECT_SD0,
736 SII902X_TPI_I2S_SELECT_SD1,
737 SII902X_TPI_I2S_SELECT_SD2,
738 SII902X_TPI_I2S_SELECT_SD3,
739 };
740 struct hdmi_codec_pdata codec_data = {
741 .ops = &sii902x_audio_codec_ops,
742 .i2s = 1, /* Only i2s support for now. */
743 .spdif = 0,
744 .max_i2s_channels = 0,
745 };
746 u8 lanes[4];
747 int num_lanes, i;
748
749 if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {
750 dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
751 __func__);
752 return 0;
753 }
754
755 num_lanes = of_property_read_variable_u8_array(dev->of_node,
756 "sil,i2s-data-lanes",
757 lanes, 1,
758 ARRAY_SIZE(lanes));
759
760 if (num_lanes == -EINVAL) {
761 dev_dbg(dev,
762 "%s: No \"sil,i2s-data-lanes\", use default <0>\n",
763 __func__);
764 num_lanes = 1;
765 lanes[0] = 0;
766 } else if (num_lanes < 0) {
767 dev_err(dev,
768 "%s: Error gettin \"sil,i2s-data-lanes\": %d\n",
769 __func__, num_lanes);
770 return num_lanes;
771 }
772 codec_data.max_i2s_channels = 2 * num_lanes;
773
774 for (i = 0; i < num_lanes; i++)
775 sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
776 i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;
777
778 sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
779 if (IS_ERR(sii902x->audio.mclk)) {
780 dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
781 __func__, PTR_ERR(sii902x->audio.mclk));
782 return PTR_ERR(sii902x->audio.mclk);
783 }
784
785 sii902x->audio.pdev = platform_device_register_data(
786 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
787 &codec_data, sizeof(codec_data));
788
789 return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
790}
791
792static const struct regmap_range sii902x_volatile_ranges[] = {
793 { .range_min = 0, .range_max = 0xff },
794};
795
796static const struct regmap_access_table sii902x_volatile_table = {
797 .yes_ranges = sii902x_volatile_ranges,
798 .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
799};
800
801static const struct regmap_config sii902x_regmap_config = {
802 .reg_bits = 8,
803 .val_bits = 8,
804 .disable_locking = true, /* struct sii902x mutex should be enough */
805 .max_register = SII902X_TPI_MISC_INFOFRAME_END,
806 .volatile_table = &sii902x_volatile_table,
807 .cache_type = REGCACHE_NONE,
808};
809
810static irqreturn_t sii902x_interrupt(int irq, void *data)
811{
812 struct sii902x *sii902x = data;
813 unsigned int status = 0;
814
815 mutex_lock(&sii902x->mutex);
816
817 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
818 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
819
820 mutex_unlock(&sii902x->mutex);
821
822 if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev)
823 drm_helper_hpd_irq_event(sii902x->bridge.dev);
824
825 return IRQ_HANDLED;
826}
827
828/*
829 * The purpose of sii902x_i2c_bypass_select is to enable the pass through
830 * mode of the HDMI transmitter. Do not use regmap from within this function,
831 * only use sii902x_*_unlocked functions to read/modify/write registers.
832 * We are holding the parent adapter lock here, keep this in mind before
833 * adding more i2c transactions.
834 *
835 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
836 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
837 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
838 * we leave the remaining bits as we have found them.
839 */
840static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
841{
842 struct sii902x *sii902x = i2c_mux_priv(mux);
843 struct device *dev = &sii902x->i2c->dev;
844 unsigned long timeout;
845 u8 status;
846 int ret;
847
848 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
849 SII902X_SYS_CTRL_DDC_BUS_REQ,
850 SII902X_SYS_CTRL_DDC_BUS_REQ);
851 if (ret)
852 return ret;
853
854 timeout = jiffies +
855 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
856 do {
857 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
858 &status);
859 if (ret)
860 return ret;
861 } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
862 time_before(jiffies, timeout));
863
864 if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
865 dev_err(dev, "Failed to acquire the i2c bus\n");
866 return -ETIMEDOUT;
867 }
868
869 return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
870 status);
871}
872
873/*
874 * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
875 * mode of the HDMI transmitter. Do not use regmap from within this function,
876 * only use sii902x_*_unlocked functions to read/modify/write registers.
877 * We are holding the parent adapter lock here, keep this in mind before
878 * adding more i2c transactions.
879 *
880 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
881 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
882 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
883 * we leave the remaining bits as we have found them.
884 */
885static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
886{
887 struct sii902x *sii902x = i2c_mux_priv(mux);
888 struct device *dev = &sii902x->i2c->dev;
889 unsigned long timeout;
890 unsigned int retries;
891 u8 status;
892 int ret;
893
894 /*
895 * When the HDMI transmitter is in pass through mode, we need an
896 * (undocumented) additional delay between STOP and START conditions
897 * to guarantee the bus won't get stuck.
898 */
899 udelay(30);
900
901 /*
902 * Sometimes the I2C bus can stall after failure to use the
903 * EDID channel. Retry a few times to see if things clear
904 * up, else continue anyway.
905 */
906 retries = 5;
907 do {
908 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
909 &status);
910 retries--;
911 } while (ret && retries);
912 if (ret) {
913 dev_err(dev, "failed to read status (%d)\n", ret);
914 return ret;
915 }
916
917 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
918 SII902X_SYS_CTRL_DDC_BUS_REQ |
919 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
920 if (ret)
921 return ret;
922
923 timeout = jiffies +
924 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
925 do {
926 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
927 &status);
928 if (ret)
929 return ret;
930 } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
931 SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
932 time_before(jiffies, timeout));
933
934 if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
935 SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
936 dev_err(dev, "failed to release the i2c bus\n");
937 return -ETIMEDOUT;
938 }
939
940 return 0;
941}
942
943static const struct drm_bridge_timings default_sii902x_timings = {
944 .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
945 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
946 | DRM_BUS_FLAG_DE_HIGH,
947};
948
949static int sii902x_probe(struct i2c_client *client,
950 const struct i2c_device_id *id)
951{
952 struct device *dev = &client->dev;
953 unsigned int status = 0;
954 struct sii902x *sii902x;
955 u8 chipid[4];
956 int ret;
957
958 ret = i2c_check_functionality(client->adapter,
959 I2C_FUNC_SMBUS_BYTE_DATA);
960 if (!ret) {
961 dev_err(dev, "I2C adapter not suitable\n");
962 return -EIO;
963 }
964
965 sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL);
966 if (!sii902x)
967 return -ENOMEM;
968
969 sii902x->i2c = client;
970 sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
971 if (IS_ERR(sii902x->regmap))
972 return PTR_ERR(sii902x->regmap);
973
974 sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
975 GPIOD_OUT_LOW);
976 if (IS_ERR(sii902x->reset_gpio)) {
977 dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
978 PTR_ERR(sii902x->reset_gpio));
979 return PTR_ERR(sii902x->reset_gpio);
980 }
981
982 mutex_init(&sii902x->mutex);
983
984 sii902x_reset(sii902x);
985
986 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
987 if (ret)
988 return ret;
989
990 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
991 &chipid, 4);
992 if (ret) {
993 dev_err(dev, "regmap_read failed %d\n", ret);
994 return ret;
995 }
996
997 if (chipid[0] != 0xb0) {
998 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
999 chipid[0]);
1000 return -EINVAL;
1001 }
1002
1003 /* Clear all pending interrupts */
1004 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
1005 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
1006
1007 if (client->irq > 0) {
1008 regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
1009 SII902X_HOTPLUG_EVENT);
1010
1011 ret = devm_request_threaded_irq(dev, client->irq, NULL,
1012 sii902x_interrupt,
1013 IRQF_ONESHOT, dev_name(dev),
1014 sii902x);
1015 if (ret)
1016 return ret;
1017 }
1018
1019 sii902x->bridge.funcs = &sii902x_bridge_funcs;
1020 sii902x->bridge.of_node = dev->of_node;
1021 sii902x->bridge.timings = &default_sii902x_timings;
1022 drm_bridge_add(&sii902x->bridge);
1023
1024 sii902x_audio_codec_init(sii902x, dev);
1025
1026 i2c_set_clientdata(client, sii902x);
1027
1028 sii902x->i2cmux = i2c_mux_alloc(client->adapter, dev,
1029 1, 0, I2C_MUX_GATE,
1030 sii902x_i2c_bypass_select,
1031 sii902x_i2c_bypass_deselect);
1032 if (!sii902x->i2cmux)
1033 return -ENOMEM;
1034
1035 sii902x->i2cmux->priv = sii902x;
1036 return i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0);
1037}
1038
1039static int sii902x_remove(struct i2c_client *client)
1040
1041{
1042 struct sii902x *sii902x = i2c_get_clientdata(client);
1043
1044 i2c_mux_del_adapters(sii902x->i2cmux);
1045 drm_bridge_remove(&sii902x->bridge);
1046
1047 return 0;
1048}
1049
1050static const struct of_device_id sii902x_dt_ids[] = {
1051 { .compatible = "sil,sii9022", },
1052 { }
1053};
1054MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
1055
1056static const struct i2c_device_id sii902x_i2c_ids[] = {
1057 { "sii9022", 0 },
1058 { },
1059};
1060MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
1061
1062static struct i2c_driver sii902x_driver = {
1063 .probe = sii902x_probe,
1064 .remove = sii902x_remove,
1065 .driver = {
1066 .name = "sii902x",
1067 .of_match_table = sii902x_dt_ids,
1068 },
1069 .id_table = sii902x_i2c_ids,
1070};
1071module_i2c_driver(sii902x_driver);
1072
1073MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
1074MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
1075MODULE_LICENSE("GPL");