1/*
  2 * Copyright 2015 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 */
 24
 25#ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
 26#define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
 27
 28#include "core_types.h"
 29#include "core_status.h"
 30#include "dal_asic_id.h"
 31#include "dm_pp_smu.h"
 32
 33#define MEMORY_TYPE_MULTIPLIER_CZ 4
 34#define MEMORY_TYPE_HBM 2
 35
 36
 37enum dce_version resource_parse_asic_id(
 38		struct hw_asic_id asic_id);
 39
 40struct resource_caps {
 41	int num_timing_generator;
 42	int num_opp;
 43	int num_video_plane;
 44	int num_audio;
 45	int num_stream_encoder;
 46	int num_pll;
 47	int num_dwb;
 48	int num_ddc;
 49#ifdef CONFIG_DRM_AMD_DC_DCN2_0
 50	int num_vmid;
 51#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 52	int num_dsc;
 53#endif
 54#endif
 55};
 56
 57struct resource_straps {
 58	uint32_t hdmi_disable;
 59	uint32_t dc_pinstraps_audio;
 60	uint32_t audio_stream_number;
 61};
 62
 63struct resource_create_funcs {
 64	void (*read_dce_straps)(
 65			struct dc_context *ctx, struct resource_straps *straps);
 66
 67	struct audio *(*create_audio)(
 68			struct dc_context *ctx, unsigned int inst);
 69
 70	struct stream_encoder *(*create_stream_encoder)(
 71			enum engine_id eng_id, struct dc_context *ctx);
 72
 73	struct dce_hwseq *(*create_hwseq)(
 74			struct dc_context *ctx);
 75};
 76
 77bool resource_construct(
 78	unsigned int num_virtual_links,
 79	struct dc *dc,
 80	struct resource_pool *pool,
 81	const struct resource_create_funcs *create_funcs);
 82
 83struct resource_pool *dc_create_resource_pool(struct dc  *dc,
 84					      const struct dc_init_data *init_data,
 85					      enum dce_version dc_version);
 86
 87void dc_destroy_resource_pool(struct dc *dc);
 88
 89enum dc_status resource_map_pool_resources(
 90		const struct dc *dc,
 91		struct dc_state *context,
 92		struct dc_stream_state *stream);
 93
 94bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
 95
 96enum dc_status resource_build_scaling_params_for_context(
 97		const struct dc *dc,
 98		struct dc_state *context);
 99
100void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
101
102void resource_unreference_clock_source(
103		struct resource_context *res_ctx,
104		const struct resource_pool *pool,
105		struct clock_source *clock_source);
106
107void resource_reference_clock_source(
108		struct resource_context *res_ctx,
109		const struct resource_pool *pool,
110		struct clock_source *clock_source);
111
112int resource_get_clock_source_reference(
113		struct resource_context *res_ctx,
114		const struct resource_pool *pool,
115		struct clock_source *clock_source);
116
117bool resource_are_streams_timing_synchronizable(
118		struct dc_stream_state *stream1,
119		struct dc_stream_state *stream2);
120
121struct clock_source *resource_find_used_clk_src_for_sharing(
122		struct resource_context *res_ctx,
123		struct pipe_ctx *pipe_ctx);
124
125struct clock_source *dc_resource_find_first_free_pll(
126		struct resource_context *res_ctx,
127		const struct resource_pool *pool);
128
129struct pipe_ctx *resource_get_head_pipe_for_stream(
130		struct resource_context *res_ctx,
131		struct dc_stream_state *stream);
132
133bool resource_attach_surfaces_to_context(
134		struct dc_plane_state *const *plane_state,
135		int surface_count,
136		struct dc_stream_state *dc_stream,
137		struct dc_state *context,
138		const struct resource_pool *pool);
139
140struct pipe_ctx *find_idle_secondary_pipe(
141		struct resource_context *res_ctx,
142		const struct resource_pool *pool,
143		const struct pipe_ctx *primary_pipe);
144
145bool resource_is_stream_unchanged(
146	struct dc_state *old_context, struct dc_stream_state *stream);
147
148bool resource_validate_attach_surfaces(
149		const struct dc_validation_set set[],
150		int set_count,
151		const struct dc_state *old_context,
152		struct dc_state *context,
153		const struct resource_pool *pool);
154
155void resource_validate_ctx_update_pointer_after_copy(
156		const struct dc_state *src_ctx,
157		struct dc_state *dst_ctx);
158
159enum dc_status resource_map_clock_resources(
160		const struct dc *dc,
161		struct dc_state *context,
162		struct dc_stream_state *stream);
163
164enum dc_status resource_map_phy_clock_resources(
165		const struct dc *dc,
166		struct dc_state *context,
167		struct dc_stream_state *stream);
168
169bool pipe_need_reprogram(
170		struct pipe_ctx *pipe_ctx_old,
171		struct pipe_ctx *pipe_ctx);
172
173void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
174		struct bit_depth_reduction_params *fmt_bit_depth);
175
176void update_audio_usage(
177		struct resource_context *res_ctx,
178		const struct resource_pool *pool,
179		struct audio *audio,
180		bool acquired);
181
182unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
183
184#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */