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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * FPGA Manager Core
4 *
5 * Copyright (C) 2013-2015 Altera Corporation
6 * Copyright (C) 2017 Intel Corporation
7 *
8 * With code from the mailing list:
9 * Copyright (C) 2013 Xilinx, Inc.
10 */
11#include <linux/firmware.h>
12#include <linux/fpga/fpga-mgr.h>
13#include <linux/idr.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/mutex.h>
17#include <linux/slab.h>
18#include <linux/scatterlist.h>
19#include <linux/highmem.h>
20
21static DEFINE_IDA(fpga_mgr_ida);
22static struct class *fpga_mgr_class;
23
24/**
25 * fpga_image_info_alloc - Allocate a FPGA image info struct
26 * @dev: owning device
27 *
28 * Return: struct fpga_image_info or NULL
29 */
30struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
31{
32 struct fpga_image_info *info;
33
34 get_device(dev);
35
36 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
37 if (!info) {
38 put_device(dev);
39 return NULL;
40 }
41
42 info->dev = dev;
43
44 return info;
45}
46EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
47
48/**
49 * fpga_image_info_free - Free a FPGA image info struct
50 * @info: FPGA image info struct to free
51 */
52void fpga_image_info_free(struct fpga_image_info *info)
53{
54 struct device *dev;
55
56 if (!info)
57 return;
58
59 dev = info->dev;
60 if (info->firmware_name)
61 devm_kfree(dev, info->firmware_name);
62
63 devm_kfree(dev, info);
64 put_device(dev);
65}
66EXPORT_SYMBOL_GPL(fpga_image_info_free);
67
68/*
69 * Call the low level driver's write_init function. This will do the
70 * device-specific things to get the FPGA into the state where it is ready to
71 * receive an FPGA image. The low level driver only gets to see the first
72 * initial_header_size bytes in the buffer.
73 */
74static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
75 struct fpga_image_info *info,
76 const char *buf, size_t count)
77{
78 int ret;
79
80 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
81 if (!mgr->mops->initial_header_size)
82 ret = mgr->mops->write_init(mgr, info, NULL, 0);
83 else
84 ret = mgr->mops->write_init(
85 mgr, info, buf, min(mgr->mops->initial_header_size, count));
86
87 if (ret) {
88 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
89 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
90 return ret;
91 }
92
93 return 0;
94}
95
96static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
97 struct fpga_image_info *info,
98 struct sg_table *sgt)
99{
100 struct sg_mapping_iter miter;
101 size_t len;
102 char *buf;
103 int ret;
104
105 if (!mgr->mops->initial_header_size)
106 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
107
108 /*
109 * First try to use miter to map the first fragment to access the
110 * header, this is the typical path.
111 */
112 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
113 if (sg_miter_next(&miter) &&
114 miter.length >= mgr->mops->initial_header_size) {
115 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
116 miter.length);
117 sg_miter_stop(&miter);
118 return ret;
119 }
120 sg_miter_stop(&miter);
121
122 /* Otherwise copy the fragments into temporary memory. */
123 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
124 if (!buf)
125 return -ENOMEM;
126
127 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
128 mgr->mops->initial_header_size);
129 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
130
131 kfree(buf);
132
133 return ret;
134}
135
136/*
137 * After all the FPGA image has been written, do the device specific steps to
138 * finish and set the FPGA into operating mode.
139 */
140static int fpga_mgr_write_complete(struct fpga_manager *mgr,
141 struct fpga_image_info *info)
142{
143 int ret;
144
145 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
146 ret = mgr->mops->write_complete(mgr, info);
147 if (ret) {
148 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
149 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
150 return ret;
151 }
152 mgr->state = FPGA_MGR_STATE_OPERATING;
153
154 return 0;
155}
156
157/**
158 * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
159 * @mgr: fpga manager
160 * @info: fpga image specific information
161 * @sgt: scatterlist table
162 *
163 * Step the low level fpga manager through the device-specific steps of getting
164 * an FPGA ready to be configured, writing the image to it, then doing whatever
165 * post-configuration steps necessary. This code assumes the caller got the
166 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
167 * not an error code.
168 *
169 * This is the preferred entry point for FPGA programming, it does not require
170 * any contiguous kernel memory.
171 *
172 * Return: 0 on success, negative error code otherwise.
173 */
174static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
175 struct fpga_image_info *info,
176 struct sg_table *sgt)
177{
178 int ret;
179
180 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
181 if (ret)
182 return ret;
183
184 /* Write the FPGA image to the FPGA. */
185 mgr->state = FPGA_MGR_STATE_WRITE;
186 if (mgr->mops->write_sg) {
187 ret = mgr->mops->write_sg(mgr, sgt);
188 } else {
189 struct sg_mapping_iter miter;
190
191 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
192 while (sg_miter_next(&miter)) {
193 ret = mgr->mops->write(mgr, miter.addr, miter.length);
194 if (ret)
195 break;
196 }
197 sg_miter_stop(&miter);
198 }
199
200 if (ret) {
201 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
202 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
203 return ret;
204 }
205
206 return fpga_mgr_write_complete(mgr, info);
207}
208
209static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
210 struct fpga_image_info *info,
211 const char *buf, size_t count)
212{
213 int ret;
214
215 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
216 if (ret)
217 return ret;
218
219 /*
220 * Write the FPGA image to the FPGA.
221 */
222 mgr->state = FPGA_MGR_STATE_WRITE;
223 ret = mgr->mops->write(mgr, buf, count);
224 if (ret) {
225 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
226 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
227 return ret;
228 }
229
230 return fpga_mgr_write_complete(mgr, info);
231}
232
233/**
234 * fpga_mgr_buf_load - load fpga from image in buffer
235 * @mgr: fpga manager
236 * @info: fpga image info
237 * @buf: buffer contain fpga image
238 * @count: byte count of buf
239 *
240 * Step the low level fpga manager through the device-specific steps of getting
241 * an FPGA ready to be configured, writing the image to it, then doing whatever
242 * post-configuration steps necessary. This code assumes the caller got the
243 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
244 *
245 * Return: 0 on success, negative error code otherwise.
246 */
247static int fpga_mgr_buf_load(struct fpga_manager *mgr,
248 struct fpga_image_info *info,
249 const char *buf, size_t count)
250{
251 struct page **pages;
252 struct sg_table sgt;
253 const void *p;
254 int nr_pages;
255 int index;
256 int rc;
257
258 /*
259 * This is just a fast path if the caller has already created a
260 * contiguous kernel buffer and the driver doesn't require SG, non-SG
261 * drivers will still work on the slow path.
262 */
263 if (mgr->mops->write)
264 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
265
266 /*
267 * Convert the linear kernel pointer into a sg_table of pages for use
268 * by the driver.
269 */
270 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
271 (unsigned long)buf / PAGE_SIZE;
272 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
273 if (!pages)
274 return -ENOMEM;
275
276 p = buf - offset_in_page(buf);
277 for (index = 0; index < nr_pages; index++) {
278 if (is_vmalloc_addr(p))
279 pages[index] = vmalloc_to_page(p);
280 else
281 pages[index] = kmap_to_page((void *)p);
282 if (!pages[index]) {
283 kfree(pages);
284 return -EFAULT;
285 }
286 p += PAGE_SIZE;
287 }
288
289 /*
290 * The temporary pages list is used to code share the merging algorithm
291 * in sg_alloc_table_from_pages
292 */
293 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
294 count, GFP_KERNEL);
295 kfree(pages);
296 if (rc)
297 return rc;
298
299 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
300 sg_free_table(&sgt);
301
302 return rc;
303}
304
305/**
306 * fpga_mgr_firmware_load - request firmware and load to fpga
307 * @mgr: fpga manager
308 * @info: fpga image specific information
309 * @image_name: name of image file on the firmware search path
310 *
311 * Request an FPGA image using the firmware class, then write out to the FPGA.
312 * Update the state before each step to provide info on what step failed if
313 * there is a failure. This code assumes the caller got the mgr pointer
314 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
315 * code.
316 *
317 * Return: 0 on success, negative error code otherwise.
318 */
319static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
320 struct fpga_image_info *info,
321 const char *image_name)
322{
323 struct device *dev = &mgr->dev;
324 const struct firmware *fw;
325 int ret;
326
327 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
328
329 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
330
331 ret = request_firmware(&fw, image_name, dev);
332 if (ret) {
333 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
334 dev_err(dev, "Error requesting firmware %s\n", image_name);
335 return ret;
336 }
337
338 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
339
340 release_firmware(fw);
341
342 return ret;
343}
344
345/**
346 * fpga_mgr_load - load FPGA from scatter/gather table, buffer, or firmware
347 * @mgr: fpga manager
348 * @info: fpga image information.
349 *
350 * Load the FPGA from an image which is indicated in @info. If successful, the
351 * FPGA ends up in operating mode.
352 *
353 * Return: 0 on success, negative error code otherwise.
354 */
355int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
356{
357 if (info->sgt)
358 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
359 if (info->buf && info->count)
360 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
361 if (info->firmware_name)
362 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
363 return -EINVAL;
364}
365EXPORT_SYMBOL_GPL(fpga_mgr_load);
366
367static const char * const state_str[] = {
368 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
369 [FPGA_MGR_STATE_POWER_OFF] = "power off",
370 [FPGA_MGR_STATE_POWER_UP] = "power up",
371 [FPGA_MGR_STATE_RESET] = "reset",
372
373 /* requesting FPGA image from firmware */
374 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
375 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
376
377 /* Preparing FPGA to receive image */
378 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
379 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
380
381 /* Writing image to FPGA */
382 [FPGA_MGR_STATE_WRITE] = "write",
383 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
384
385 /* Finishing configuration after image has been written */
386 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
387 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
388
389 /* FPGA reports to be in normal operating mode */
390 [FPGA_MGR_STATE_OPERATING] = "operating",
391};
392
393static ssize_t name_show(struct device *dev,
394 struct device_attribute *attr, char *buf)
395{
396 struct fpga_manager *mgr = to_fpga_manager(dev);
397
398 return sprintf(buf, "%s\n", mgr->name);
399}
400
401static ssize_t state_show(struct device *dev,
402 struct device_attribute *attr, char *buf)
403{
404 struct fpga_manager *mgr = to_fpga_manager(dev);
405
406 return sprintf(buf, "%s\n", state_str[mgr->state]);
407}
408
409static ssize_t status_show(struct device *dev,
410 struct device_attribute *attr, char *buf)
411{
412 struct fpga_manager *mgr = to_fpga_manager(dev);
413 u64 status;
414 int len = 0;
415
416 if (!mgr->mops->status)
417 return -ENOENT;
418
419 status = mgr->mops->status(mgr);
420
421 if (status & FPGA_MGR_STATUS_OPERATION_ERR)
422 len += sprintf(buf + len, "reconfig operation error\n");
423 if (status & FPGA_MGR_STATUS_CRC_ERR)
424 len += sprintf(buf + len, "reconfig CRC error\n");
425 if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
426 len += sprintf(buf + len, "reconfig incompatible image\n");
427 if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
428 len += sprintf(buf + len, "reconfig IP protocol error\n");
429 if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
430 len += sprintf(buf + len, "reconfig fifo overflow error\n");
431
432 return len;
433}
434
435static DEVICE_ATTR_RO(name);
436static DEVICE_ATTR_RO(state);
437static DEVICE_ATTR_RO(status);
438
439static struct attribute *fpga_mgr_attrs[] = {
440 &dev_attr_name.attr,
441 &dev_attr_state.attr,
442 &dev_attr_status.attr,
443 NULL,
444};
445ATTRIBUTE_GROUPS(fpga_mgr);
446
447static struct fpga_manager *__fpga_mgr_get(struct device *dev)
448{
449 struct fpga_manager *mgr;
450
451 mgr = to_fpga_manager(dev);
452
453 if (!try_module_get(dev->parent->driver->owner))
454 goto err_dev;
455
456 return mgr;
457
458err_dev:
459 put_device(dev);
460 return ERR_PTR(-ENODEV);
461}
462
463static int fpga_mgr_dev_match(struct device *dev, const void *data)
464{
465 return dev->parent == data;
466}
467
468/**
469 * fpga_mgr_get - Given a device, get a reference to a fpga mgr.
470 * @dev: parent device that fpga mgr was registered with
471 *
472 * Return: fpga manager struct or IS_ERR() condition containing error code.
473 */
474struct fpga_manager *fpga_mgr_get(struct device *dev)
475{
476 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
477 fpga_mgr_dev_match);
478 if (!mgr_dev)
479 return ERR_PTR(-ENODEV);
480
481 return __fpga_mgr_get(mgr_dev);
482}
483EXPORT_SYMBOL_GPL(fpga_mgr_get);
484
485/**
486 * of_fpga_mgr_get - Given a device node, get a reference to a fpga mgr.
487 *
488 * @node: device node
489 *
490 * Return: fpga manager struct or IS_ERR() condition containing error code.
491 */
492struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
493{
494 struct device *dev;
495
496 dev = class_find_device_by_of_node(fpga_mgr_class, node);
497 if (!dev)
498 return ERR_PTR(-ENODEV);
499
500 return __fpga_mgr_get(dev);
501}
502EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
503
504/**
505 * fpga_mgr_put - release a reference to a fpga manager
506 * @mgr: fpga manager structure
507 */
508void fpga_mgr_put(struct fpga_manager *mgr)
509{
510 module_put(mgr->dev.parent->driver->owner);
511 put_device(&mgr->dev);
512}
513EXPORT_SYMBOL_GPL(fpga_mgr_put);
514
515/**
516 * fpga_mgr_lock - Lock FPGA manager for exclusive use
517 * @mgr: fpga manager
518 *
519 * Given a pointer to FPGA Manager (from fpga_mgr_get() or
520 * of_fpga_mgr_put()) attempt to get the mutex. The user should call
521 * fpga_mgr_lock() and verify that it returns 0 before attempting to
522 * program the FPGA. Likewise, the user should call fpga_mgr_unlock
523 * when done programming the FPGA.
524 *
525 * Return: 0 for success or -EBUSY
526 */
527int fpga_mgr_lock(struct fpga_manager *mgr)
528{
529 if (!mutex_trylock(&mgr->ref_mutex)) {
530 dev_err(&mgr->dev, "FPGA manager is in use.\n");
531 return -EBUSY;
532 }
533
534 return 0;
535}
536EXPORT_SYMBOL_GPL(fpga_mgr_lock);
537
538/**
539 * fpga_mgr_unlock - Unlock FPGA manager after done programming
540 * @mgr: fpga manager
541 */
542void fpga_mgr_unlock(struct fpga_manager *mgr)
543{
544 mutex_unlock(&mgr->ref_mutex);
545}
546EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
547
548/**
549 * fpga_mgr_create - create and initialize a FPGA manager struct
550 * @dev: fpga manager device from pdev
551 * @name: fpga manager name
552 * @mops: pointer to structure of fpga manager ops
553 * @priv: fpga manager private data
554 *
555 * The caller of this function is responsible for freeing the struct with
556 * fpga_mgr_free(). Using devm_fpga_mgr_create() instead is recommended.
557 *
558 * Return: pointer to struct fpga_manager or NULL
559 */
560struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name,
561 const struct fpga_manager_ops *mops,
562 void *priv)
563{
564 struct fpga_manager *mgr;
565 int id, ret;
566
567 if (!mops || !mops->write_complete || !mops->state ||
568 !mops->write_init || (!mops->write && !mops->write_sg) ||
569 (mops->write && mops->write_sg)) {
570 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
571 return NULL;
572 }
573
574 if (!name || !strlen(name)) {
575 dev_err(dev, "Attempt to register with no name!\n");
576 return NULL;
577 }
578
579 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
580 if (!mgr)
581 return NULL;
582
583 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
584 if (id < 0) {
585 ret = id;
586 goto error_kfree;
587 }
588
589 mutex_init(&mgr->ref_mutex);
590
591 mgr->name = name;
592 mgr->mops = mops;
593 mgr->priv = priv;
594
595 device_initialize(&mgr->dev);
596 mgr->dev.class = fpga_mgr_class;
597 mgr->dev.groups = mops->groups;
598 mgr->dev.parent = dev;
599 mgr->dev.of_node = dev->of_node;
600 mgr->dev.id = id;
601
602 ret = dev_set_name(&mgr->dev, "fpga%d", id);
603 if (ret)
604 goto error_device;
605
606 return mgr;
607
608error_device:
609 ida_simple_remove(&fpga_mgr_ida, id);
610error_kfree:
611 kfree(mgr);
612
613 return NULL;
614}
615EXPORT_SYMBOL_GPL(fpga_mgr_create);
616
617/**
618 * fpga_mgr_free - free a FPGA manager created with fpga_mgr_create()
619 * @mgr: fpga manager struct
620 */
621void fpga_mgr_free(struct fpga_manager *mgr)
622{
623 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
624 kfree(mgr);
625}
626EXPORT_SYMBOL_GPL(fpga_mgr_free);
627
628static void devm_fpga_mgr_release(struct device *dev, void *res)
629{
630 struct fpga_manager *mgr = *(struct fpga_manager **)res;
631
632 fpga_mgr_free(mgr);
633}
634
635/**
636 * devm_fpga_mgr_create - create and initialize a managed FPGA manager struct
637 * @dev: fpga manager device from pdev
638 * @name: fpga manager name
639 * @mops: pointer to structure of fpga manager ops
640 * @priv: fpga manager private data
641 *
642 * This function is intended for use in a FPGA manager driver's probe function.
643 * After the manager driver creates the manager struct with
644 * devm_fpga_mgr_create(), it should register it with fpga_mgr_register(). The
645 * manager driver's remove function should call fpga_mgr_unregister(). The
646 * manager struct allocated with this function will be freed automatically on
647 * driver detach. This includes the case of a probe function returning error
648 * before calling fpga_mgr_register(), the struct will still get cleaned up.
649 *
650 * Return: pointer to struct fpga_manager or NULL
651 */
652struct fpga_manager *devm_fpga_mgr_create(struct device *dev, const char *name,
653 const struct fpga_manager_ops *mops,
654 void *priv)
655{
656 struct fpga_manager **ptr, *mgr;
657
658 ptr = devres_alloc(devm_fpga_mgr_release, sizeof(*ptr), GFP_KERNEL);
659 if (!ptr)
660 return NULL;
661
662 mgr = fpga_mgr_create(dev, name, mops, priv);
663 if (!mgr) {
664 devres_free(ptr);
665 } else {
666 *ptr = mgr;
667 devres_add(dev, ptr);
668 }
669
670 return mgr;
671}
672EXPORT_SYMBOL_GPL(devm_fpga_mgr_create);
673
674/**
675 * fpga_mgr_register - register a FPGA manager
676 * @mgr: fpga manager struct
677 *
678 * Return: 0 on success, negative error code otherwise.
679 */
680int fpga_mgr_register(struct fpga_manager *mgr)
681{
682 int ret;
683
684 /*
685 * Initialize framework state by requesting low level driver read state
686 * from device. FPGA may be in reset mode or may have been programmed
687 * by bootloader or EEPROM.
688 */
689 mgr->state = mgr->mops->state(mgr);
690
691 ret = device_add(&mgr->dev);
692 if (ret)
693 goto error_device;
694
695 dev_info(&mgr->dev, "%s registered\n", mgr->name);
696
697 return 0;
698
699error_device:
700 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
701
702 return ret;
703}
704EXPORT_SYMBOL_GPL(fpga_mgr_register);
705
706/**
707 * fpga_mgr_unregister - unregister a FPGA manager
708 * @mgr: fpga manager struct
709 *
710 * This function is intended for use in a FPGA manager driver's remove function.
711 */
712void fpga_mgr_unregister(struct fpga_manager *mgr)
713{
714 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
715
716 /*
717 * If the low level driver provides a method for putting fpga into
718 * a desired state upon unregister, do it.
719 */
720 if (mgr->mops->fpga_remove)
721 mgr->mops->fpga_remove(mgr);
722
723 device_unregister(&mgr->dev);
724}
725EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
726
727static void fpga_mgr_dev_release(struct device *dev)
728{
729}
730
731static int __init fpga_mgr_class_init(void)
732{
733 pr_info("FPGA manager framework\n");
734
735 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
736 if (IS_ERR(fpga_mgr_class))
737 return PTR_ERR(fpga_mgr_class);
738
739 fpga_mgr_class->dev_groups = fpga_mgr_groups;
740 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
741
742 return 0;
743}
744
745static void __exit fpga_mgr_class_exit(void)
746{
747 class_destroy(fpga_mgr_class);
748 ida_destroy(&fpga_mgr_ida);
749}
750
751MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
752MODULE_DESCRIPTION("FPGA manager framework");
753MODULE_LICENSE("GPL v2");
754
755subsys_initcall(fpga_mgr_class_init);
756module_exit(fpga_mgr_class_exit);