1#ifndef __ASM_SH_IRQ_H
 2#define __ASM_SH_IRQ_H
 3
 4#include <linux/cpumask.h>
 5#include <asm/machvec.h>
 6
 7/*
 8 * A sane default based on a reasonable vector table size, platforms are
 9 * advised to cap this at the hard limit that they're interested in
10 * through the machvec.
11 */
12#define NR_IRQS			512
13#define NR_IRQS_LEGACY		8	/* Legacy external IRQ0-7 */
 
 
 
14
15/*
16 * This is a special IRQ number for indicating that no IRQ has been
17 * triggered and to simply ignore the IRQ dispatch. This is a special
18 * case that can happen with IRQ auto-distribution when multiple CPUs
19 * are woken up and signalled in parallel.
20 */
21#define NO_IRQ_IGNORE		((unsigned int)-1)
22
23/*
24 * Convert back and forth between INTEVT and IRQ values.
25 */
26#ifdef CONFIG_CPU_HAS_INTEVT
27#define evt2irq(evt)		(((evt) >> 5) - 16)
28#define irq2evt(irq)		(((irq) + 16) << 5)
29#else
30#define evt2irq(evt)		(evt)
31#define irq2evt(irq)		(irq)
32#endif
33
34/*
35 * Simple Mask Register Support
36 */
37extern void make_maskreg_irq(unsigned int irq);
38extern unsigned short *irq_mask_register;
39
40/*
41 * PINT IRQs
42 */
43void init_IRQ_pint(void);
44void make_imask_irq(unsigned int irq);
45
46static inline int generic_irq_demux(int irq)
47{
48	return irq;
49}
50
51#define irq_demux(irq)		sh_mv.mv_irq_demux(irq)
52
53void init_IRQ(void);
54void migrate_irqs(void);
55
56asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
57
58#ifdef CONFIG_IRQSTACKS
59extern void irq_ctx_init(int cpu);
60extern void irq_ctx_exit(int cpu);
61# define __ARCH_HAS_DO_SOFTIRQ
62#else
63# define irq_ctx_init(cpu) do { } while (0)
64# define irq_ctx_exit(cpu) do { } while (0)
65#endif
66
67#ifdef CONFIG_INTC_BALANCING
68extern unsigned int irq_lookup(unsigned int irq);
69extern void irq_finish(unsigned int irq);
70#else
71#define irq_lookup(irq)		(irq)
72#define irq_finish(irq)		do { } while (0)
73#endif
74
75#include <asm-generic/irq.h>
76#ifdef CONFIG_CPU_SH5
77#include <cpu/irq.h>
78#endif
79
80#endif /* __ASM_SH_IRQ_H */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef __ASM_SH_IRQ_H
 3#define __ASM_SH_IRQ_H
 4
 5#include <linux/cpumask.h>
 6#include <asm/machvec.h>
 7
 8/*
 9 * Only legacy non-sparseirq platforms have to set a reasonably sane
10 * value here. sparseirq platforms allocate their irq_descs on the fly,
11 * so will expand automatically based on the number of registered IRQs.
12 */
13#ifdef CONFIG_SPARSE_IRQ
14# define NR_IRQS		8
15#else
16# define NR_IRQS		512
17#endif
18
19/*
20 * This is a special IRQ number for indicating that no IRQ has been
21 * triggered and to simply ignore the IRQ dispatch. This is a special
22 * case that can happen with IRQ auto-distribution when multiple CPUs
23 * are woken up and signalled in parallel.
24 */
25#define NO_IRQ_IGNORE		((unsigned int)-1)
 
 
 
 
 
 
 
 
 
 
 
26
27/*
28 * Simple Mask Register Support
29 */
30extern void make_maskreg_irq(unsigned int irq);
31extern unsigned short *irq_mask_register;
32
33/*
34 * PINT IRQs
35 */
36void init_IRQ_pint(void);
37void make_imask_irq(unsigned int irq);
38
39static inline int generic_irq_demux(int irq)
40{
41	return irq;
42}
43
44#define irq_demux(irq)		sh_mv.mv_irq_demux(irq)
45
46void init_IRQ(void);
47void migrate_irqs(void);
48
49asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
50
51#ifdef CONFIG_IRQSTACKS
52extern void irq_ctx_init(int cpu);
53extern void irq_ctx_exit(int cpu);
54# define __ARCH_HAS_DO_SOFTIRQ
55#else
56# define irq_ctx_init(cpu) do { } while (0)
57# define irq_ctx_exit(cpu) do { } while (0)
58#endif
59
60#ifdef CONFIG_INTC_BALANCING
61extern unsigned int irq_lookup(unsigned int irq);
62extern void irq_finish(unsigned int irq);
63#else
64#define irq_lookup(irq)		(irq)
65#define irq_finish(irq)		do { } while (0)
66#endif
67
68#include <asm-generic/irq.h>
69#ifdef CONFIG_CPU_SH5
70#include <cpu/irq.h>
71#endif
72
73#endif /* __ASM_SH_IRQ_H */