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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * tcs3472.c - Support for TAOS TCS3472 color light-to-digital converter
4 *
5 * Copyright (c) 2013 Peter Meerwald <pmeerw@pmeerw.net>
6 *
7 * Color light sensor with 16-bit channels for red, green, blue, clear);
8 * 7-bit I2C slave address 0x39 (TCS34721, TCS34723) or 0x29 (TCS34725,
9 * TCS34727)
10 *
11 * Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf
12 *
13 * TODO: wait time
14 */
15
16#include <linux/module.h>
17#include <linux/i2c.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include <linux/iio/events.h>
24#include <linux/iio/trigger_consumer.h>
25#include <linux/iio/buffer.h>
26#include <linux/iio/triggered_buffer.h>
27
28#define TCS3472_DRV_NAME "tcs3472"
29
30#define TCS3472_COMMAND BIT(7)
31#define TCS3472_AUTO_INCR BIT(5)
32#define TCS3472_SPECIAL_FUNC (BIT(5) | BIT(6))
33
34#define TCS3472_INTR_CLEAR (TCS3472_COMMAND | TCS3472_SPECIAL_FUNC | 0x06)
35
36#define TCS3472_ENABLE (TCS3472_COMMAND | 0x00)
37#define TCS3472_ATIME (TCS3472_COMMAND | 0x01)
38#define TCS3472_WTIME (TCS3472_COMMAND | 0x03)
39#define TCS3472_AILT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x04)
40#define TCS3472_AIHT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x06)
41#define TCS3472_PERS (TCS3472_COMMAND | 0x0c)
42#define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d)
43#define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f)
44#define TCS3472_ID (TCS3472_COMMAND | 0x12)
45#define TCS3472_STATUS (TCS3472_COMMAND | 0x13)
46#define TCS3472_CDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x14)
47#define TCS3472_RDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x16)
48#define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18)
49#define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a)
50
51#define TCS3472_STATUS_AINT BIT(4)
52#define TCS3472_STATUS_AVALID BIT(0)
53#define TCS3472_ENABLE_AIEN BIT(4)
54#define TCS3472_ENABLE_AEN BIT(1)
55#define TCS3472_ENABLE_PON BIT(0)
56#define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1))
57
58struct tcs3472_data {
59 struct i2c_client *client;
60 struct mutex lock;
61 u16 low_thresh;
62 u16 high_thresh;
63 u8 enable;
64 u8 control;
65 u8 atime;
66 u8 apers;
67 u16 buffer[8]; /* 4 16-bit channels + 64-bit timestamp */
68};
69
70static const struct iio_event_spec tcs3472_events[] = {
71 {
72 .type = IIO_EV_TYPE_THRESH,
73 .dir = IIO_EV_DIR_RISING,
74 .mask_separate = BIT(IIO_EV_INFO_VALUE),
75 }, {
76 .type = IIO_EV_TYPE_THRESH,
77 .dir = IIO_EV_DIR_FALLING,
78 .mask_separate = BIT(IIO_EV_INFO_VALUE),
79 }, {
80 .type = IIO_EV_TYPE_THRESH,
81 .dir = IIO_EV_DIR_EITHER,
82 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
83 BIT(IIO_EV_INFO_PERIOD),
84 },
85};
86
87#define TCS3472_CHANNEL(_color, _si, _addr) { \
88 .type = IIO_INTENSITY, \
89 .modified = 1, \
90 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
91 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
92 BIT(IIO_CHAN_INFO_INT_TIME), \
93 .channel2 = IIO_MOD_LIGHT_##_color, \
94 .address = _addr, \
95 .scan_index = _si, \
96 .scan_type = { \
97 .sign = 'u', \
98 .realbits = 16, \
99 .storagebits = 16, \
100 .endianness = IIO_CPU, \
101 }, \
102 .event_spec = _si ? NULL : tcs3472_events, \
103 .num_event_specs = _si ? 0 : ARRAY_SIZE(tcs3472_events), \
104}
105
106static const int tcs3472_agains[] = { 1, 4, 16, 60 };
107
108static const struct iio_chan_spec tcs3472_channels[] = {
109 TCS3472_CHANNEL(CLEAR, 0, TCS3472_CDATA),
110 TCS3472_CHANNEL(RED, 1, TCS3472_RDATA),
111 TCS3472_CHANNEL(GREEN, 2, TCS3472_GDATA),
112 TCS3472_CHANNEL(BLUE, 3, TCS3472_BDATA),
113 IIO_CHAN_SOFT_TIMESTAMP(4),
114};
115
116static int tcs3472_req_data(struct tcs3472_data *data)
117{
118 int tries = 50;
119 int ret;
120
121 while (tries--) {
122 ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
123 if (ret < 0)
124 return ret;
125 if (ret & TCS3472_STATUS_AVALID)
126 break;
127 msleep(20);
128 }
129
130 if (tries < 0) {
131 dev_err(&data->client->dev, "data not ready\n");
132 return -EIO;
133 }
134
135 return 0;
136}
137
138static int tcs3472_read_raw(struct iio_dev *indio_dev,
139 struct iio_chan_spec const *chan,
140 int *val, int *val2, long mask)
141{
142 struct tcs3472_data *data = iio_priv(indio_dev);
143 int ret;
144
145 switch (mask) {
146 case IIO_CHAN_INFO_RAW:
147 ret = iio_device_claim_direct_mode(indio_dev);
148 if (ret)
149 return ret;
150 ret = tcs3472_req_data(data);
151 if (ret < 0) {
152 iio_device_release_direct_mode(indio_dev);
153 return ret;
154 }
155 ret = i2c_smbus_read_word_data(data->client, chan->address);
156 iio_device_release_direct_mode(indio_dev);
157 if (ret < 0)
158 return ret;
159 *val = ret;
160 return IIO_VAL_INT;
161 case IIO_CHAN_INFO_CALIBSCALE:
162 *val = tcs3472_agains[data->control &
163 TCS3472_CONTROL_AGAIN_MASK];
164 return IIO_VAL_INT;
165 case IIO_CHAN_INFO_INT_TIME:
166 *val = 0;
167 *val2 = (256 - data->atime) * 2400;
168 return IIO_VAL_INT_PLUS_MICRO;
169 }
170 return -EINVAL;
171}
172
173static int tcs3472_write_raw(struct iio_dev *indio_dev,
174 struct iio_chan_spec const *chan,
175 int val, int val2, long mask)
176{
177 struct tcs3472_data *data = iio_priv(indio_dev);
178 int i;
179
180 switch (mask) {
181 case IIO_CHAN_INFO_CALIBSCALE:
182 if (val2 != 0)
183 return -EINVAL;
184 for (i = 0; i < ARRAY_SIZE(tcs3472_agains); i++) {
185 if (val == tcs3472_agains[i]) {
186 data->control &= ~TCS3472_CONTROL_AGAIN_MASK;
187 data->control |= i;
188 return i2c_smbus_write_byte_data(
189 data->client, TCS3472_CONTROL,
190 data->control);
191 }
192 }
193 return -EINVAL;
194 case IIO_CHAN_INFO_INT_TIME:
195 if (val != 0)
196 return -EINVAL;
197 for (i = 0; i < 256; i++) {
198 if (val2 == (256 - i) * 2400) {
199 data->atime = i;
200 return i2c_smbus_write_byte_data(
201 data->client, TCS3472_ATIME,
202 data->atime);
203 }
204
205 }
206 return -EINVAL;
207 }
208 return -EINVAL;
209}
210
211/*
212 * Translation from APERS field value to the number of consecutive out-of-range
213 * clear channel values before an interrupt is generated
214 */
215static const int tcs3472_intr_pers[] = {
216 0, 1, 2, 3, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60
217};
218
219static int tcs3472_read_event(struct iio_dev *indio_dev,
220 const struct iio_chan_spec *chan, enum iio_event_type type,
221 enum iio_event_direction dir, enum iio_event_info info, int *val,
222 int *val2)
223{
224 struct tcs3472_data *data = iio_priv(indio_dev);
225 int ret;
226 unsigned int period;
227
228 mutex_lock(&data->lock);
229
230 switch (info) {
231 case IIO_EV_INFO_VALUE:
232 *val = (dir == IIO_EV_DIR_RISING) ?
233 data->high_thresh : data->low_thresh;
234 ret = IIO_VAL_INT;
235 break;
236 case IIO_EV_INFO_PERIOD:
237 period = (256 - data->atime) * 2400 *
238 tcs3472_intr_pers[data->apers];
239 *val = period / USEC_PER_SEC;
240 *val2 = period % USEC_PER_SEC;
241 ret = IIO_VAL_INT_PLUS_MICRO;
242 break;
243 default:
244 ret = -EINVAL;
245 break;
246 }
247
248 mutex_unlock(&data->lock);
249
250 return ret;
251}
252
253static int tcs3472_write_event(struct iio_dev *indio_dev,
254 const struct iio_chan_spec *chan, enum iio_event_type type,
255 enum iio_event_direction dir, enum iio_event_info info, int val,
256 int val2)
257{
258 struct tcs3472_data *data = iio_priv(indio_dev);
259 int ret;
260 u8 command;
261 int period;
262 int i;
263
264 mutex_lock(&data->lock);
265 switch (info) {
266 case IIO_EV_INFO_VALUE:
267 switch (dir) {
268 case IIO_EV_DIR_RISING:
269 command = TCS3472_AIHT;
270 break;
271 case IIO_EV_DIR_FALLING:
272 command = TCS3472_AILT;
273 break;
274 default:
275 ret = -EINVAL;
276 goto error;
277 }
278 ret = i2c_smbus_write_word_data(data->client, command, val);
279 if (ret)
280 goto error;
281
282 if (dir == IIO_EV_DIR_RISING)
283 data->high_thresh = val;
284 else
285 data->low_thresh = val;
286 break;
287 case IIO_EV_INFO_PERIOD:
288 period = val * USEC_PER_SEC + val2;
289 for (i = 1; i < ARRAY_SIZE(tcs3472_intr_pers) - 1; i++) {
290 if (period <= (256 - data->atime) * 2400 *
291 tcs3472_intr_pers[i])
292 break;
293 }
294 ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, i);
295 if (ret)
296 goto error;
297
298 data->apers = i;
299 break;
300 default:
301 ret = -EINVAL;
302 break;
303 }
304error:
305 mutex_unlock(&data->lock);
306
307 return ret;
308}
309
310static int tcs3472_read_event_config(struct iio_dev *indio_dev,
311 const struct iio_chan_spec *chan, enum iio_event_type type,
312 enum iio_event_direction dir)
313{
314 struct tcs3472_data *data = iio_priv(indio_dev);
315 int ret;
316
317 mutex_lock(&data->lock);
318 ret = !!(data->enable & TCS3472_ENABLE_AIEN);
319 mutex_unlock(&data->lock);
320
321 return ret;
322}
323
324static int tcs3472_write_event_config(struct iio_dev *indio_dev,
325 const struct iio_chan_spec *chan, enum iio_event_type type,
326 enum iio_event_direction dir, int state)
327{
328 struct tcs3472_data *data = iio_priv(indio_dev);
329 int ret = 0;
330 u8 enable_old;
331
332 mutex_lock(&data->lock);
333
334 enable_old = data->enable;
335
336 if (state)
337 data->enable |= TCS3472_ENABLE_AIEN;
338 else
339 data->enable &= ~TCS3472_ENABLE_AIEN;
340
341 if (enable_old != data->enable) {
342 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
343 data->enable);
344 if (ret)
345 data->enable = enable_old;
346 }
347 mutex_unlock(&data->lock);
348
349 return ret;
350}
351
352static irqreturn_t tcs3472_event_handler(int irq, void *priv)
353{
354 struct iio_dev *indio_dev = priv;
355 struct tcs3472_data *data = iio_priv(indio_dev);
356 int ret;
357
358 ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
359 if (ret >= 0 && (ret & TCS3472_STATUS_AINT)) {
360 iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
361 IIO_EV_TYPE_THRESH,
362 IIO_EV_DIR_EITHER),
363 iio_get_time_ns(indio_dev));
364
365 i2c_smbus_read_byte_data(data->client, TCS3472_INTR_CLEAR);
366 }
367
368 return IRQ_HANDLED;
369}
370
371static irqreturn_t tcs3472_trigger_handler(int irq, void *p)
372{
373 struct iio_poll_func *pf = p;
374 struct iio_dev *indio_dev = pf->indio_dev;
375 struct tcs3472_data *data = iio_priv(indio_dev);
376 int i, j = 0;
377
378 int ret = tcs3472_req_data(data);
379 if (ret < 0)
380 goto done;
381
382 for_each_set_bit(i, indio_dev->active_scan_mask,
383 indio_dev->masklength) {
384 ret = i2c_smbus_read_word_data(data->client,
385 TCS3472_CDATA + 2*i);
386 if (ret < 0)
387 goto done;
388
389 data->buffer[j++] = ret;
390 }
391
392 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
393 iio_get_time_ns(indio_dev));
394
395done:
396 iio_trigger_notify_done(indio_dev->trig);
397
398 return IRQ_HANDLED;
399}
400
401static ssize_t tcs3472_show_int_time_available(struct device *dev,
402 struct device_attribute *attr,
403 char *buf)
404{
405 size_t len = 0;
406 int i;
407
408 for (i = 1; i <= 256; i++)
409 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06d ",
410 2400 * i);
411
412 /* replace trailing space by newline */
413 buf[len - 1] = '\n';
414
415 return len;
416}
417
418static IIO_CONST_ATTR(calibscale_available, "1 4 16 60");
419static IIO_DEV_ATTR_INT_TIME_AVAIL(tcs3472_show_int_time_available);
420
421static struct attribute *tcs3472_attributes[] = {
422 &iio_const_attr_calibscale_available.dev_attr.attr,
423 &iio_dev_attr_integration_time_available.dev_attr.attr,
424 NULL
425};
426
427static const struct attribute_group tcs3472_attribute_group = {
428 .attrs = tcs3472_attributes,
429};
430
431static const struct iio_info tcs3472_info = {
432 .read_raw = tcs3472_read_raw,
433 .write_raw = tcs3472_write_raw,
434 .read_event_value = tcs3472_read_event,
435 .write_event_value = tcs3472_write_event,
436 .read_event_config = tcs3472_read_event_config,
437 .write_event_config = tcs3472_write_event_config,
438 .attrs = &tcs3472_attribute_group,
439};
440
441static int tcs3472_probe(struct i2c_client *client,
442 const struct i2c_device_id *id)
443{
444 struct tcs3472_data *data;
445 struct iio_dev *indio_dev;
446 int ret;
447
448 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
449 if (indio_dev == NULL)
450 return -ENOMEM;
451
452 data = iio_priv(indio_dev);
453 i2c_set_clientdata(client, indio_dev);
454 data->client = client;
455 mutex_init(&data->lock);
456
457 indio_dev->dev.parent = &client->dev;
458 indio_dev->info = &tcs3472_info;
459 indio_dev->name = TCS3472_DRV_NAME;
460 indio_dev->channels = tcs3472_channels;
461 indio_dev->num_channels = ARRAY_SIZE(tcs3472_channels);
462 indio_dev->modes = INDIO_DIRECT_MODE;
463
464 ret = i2c_smbus_read_byte_data(data->client, TCS3472_ID);
465 if (ret < 0)
466 return ret;
467
468 if (ret == 0x44)
469 dev_info(&client->dev, "TCS34721/34725 found\n");
470 else if (ret == 0x4d)
471 dev_info(&client->dev, "TCS34723/34727 found\n");
472 else
473 return -ENODEV;
474
475 ret = i2c_smbus_read_byte_data(data->client, TCS3472_CONTROL);
476 if (ret < 0)
477 return ret;
478 data->control = ret;
479
480 ret = i2c_smbus_read_byte_data(data->client, TCS3472_ATIME);
481 if (ret < 0)
482 return ret;
483 data->atime = ret;
484
485 ret = i2c_smbus_read_word_data(data->client, TCS3472_AILT);
486 if (ret < 0)
487 return ret;
488 data->low_thresh = ret;
489
490 ret = i2c_smbus_read_word_data(data->client, TCS3472_AIHT);
491 if (ret < 0)
492 return ret;
493 data->high_thresh = ret;
494
495 data->apers = 1;
496 ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS,
497 data->apers);
498 if (ret < 0)
499 return ret;
500
501 ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE);
502 if (ret < 0)
503 return ret;
504
505 /* enable device */
506 data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN;
507 data->enable &= ~TCS3472_ENABLE_AIEN;
508 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
509 data->enable);
510 if (ret < 0)
511 return ret;
512
513 ret = iio_triggered_buffer_setup(indio_dev, NULL,
514 tcs3472_trigger_handler, NULL);
515 if (ret < 0)
516 return ret;
517
518 if (client->irq) {
519 ret = request_threaded_irq(client->irq, NULL,
520 tcs3472_event_handler,
521 IRQF_TRIGGER_FALLING | IRQF_SHARED |
522 IRQF_ONESHOT,
523 client->name, indio_dev);
524 if (ret)
525 goto buffer_cleanup;
526 }
527
528 ret = iio_device_register(indio_dev);
529 if (ret < 0)
530 goto free_irq;
531
532 return 0;
533
534free_irq:
535 free_irq(client->irq, indio_dev);
536buffer_cleanup:
537 iio_triggered_buffer_cleanup(indio_dev);
538 return ret;
539}
540
541static int tcs3472_powerdown(struct tcs3472_data *data)
542{
543 int ret;
544 u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
545
546 mutex_lock(&data->lock);
547
548 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
549 data->enable & ~enable_mask);
550 if (!ret)
551 data->enable &= ~enable_mask;
552
553 mutex_unlock(&data->lock);
554
555 return ret;
556}
557
558static int tcs3472_remove(struct i2c_client *client)
559{
560 struct iio_dev *indio_dev = i2c_get_clientdata(client);
561
562 iio_device_unregister(indio_dev);
563 free_irq(client->irq, indio_dev);
564 iio_triggered_buffer_cleanup(indio_dev);
565 tcs3472_powerdown(iio_priv(indio_dev));
566
567 return 0;
568}
569
570#ifdef CONFIG_PM_SLEEP
571static int tcs3472_suspend(struct device *dev)
572{
573 struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
574 to_i2c_client(dev)));
575 return tcs3472_powerdown(data);
576}
577
578static int tcs3472_resume(struct device *dev)
579{
580 struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
581 to_i2c_client(dev)));
582 int ret;
583 u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
584
585 mutex_lock(&data->lock);
586
587 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
588 data->enable | enable_mask);
589 if (!ret)
590 data->enable |= enable_mask;
591
592 mutex_unlock(&data->lock);
593
594 return ret;
595}
596#endif
597
598static SIMPLE_DEV_PM_OPS(tcs3472_pm_ops, tcs3472_suspend, tcs3472_resume);
599
600static const struct i2c_device_id tcs3472_id[] = {
601 { "tcs3472", 0 },
602 { }
603};
604MODULE_DEVICE_TABLE(i2c, tcs3472_id);
605
606static struct i2c_driver tcs3472_driver = {
607 .driver = {
608 .name = TCS3472_DRV_NAME,
609 .pm = &tcs3472_pm_ops,
610 },
611 .probe = tcs3472_probe,
612 .remove = tcs3472_remove,
613 .id_table = tcs3472_id,
614};
615module_i2c_driver(tcs3472_driver);
616
617MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
618MODULE_DESCRIPTION("TCS3472 color light sensors driver");
619MODULE_LICENSE("GPL");