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1/*
2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
3 *
4 * Copyright (C) 2007 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/gpio.h>
24#include <linux/i2c.h>
25#include <linux/i2c/pcf857x.h>
26
27
28static const struct i2c_device_id pcf857x_id[] = {
29 { "pcf8574", 8 },
30 { "pcf8574a", 8 },
31 { "pca8574", 8 },
32 { "pca9670", 8 },
33 { "pca9672", 8 },
34 { "pca9674", 8 },
35 { "pcf8575", 16 },
36 { "pca8575", 16 },
37 { "pca9671", 16 },
38 { "pca9673", 16 },
39 { "pca9675", 16 },
40 { "max7328", 8 },
41 { "max7329", 8 },
42 { }
43};
44MODULE_DEVICE_TABLE(i2c, pcf857x_id);
45
46/*
47 * The pcf857x, pca857x, and pca967x chips only expose one read and one
48 * write register. Writing a "one" bit (to match the reset state) lets
49 * that pin be used as an input; it's not an open-drain model, but acts
50 * a bit like one. This is described as "quasi-bidirectional"; read the
51 * chip documentation for details.
52 *
53 * Many other I2C GPIO expander chips (like the pca953x models) have
54 * more complex register models and more conventional circuitry using
55 * push/pull drivers. They often use the same 0x20..0x27 addresses as
56 * pcf857x parts, making the "legacy" I2C driver model problematic.
57 */
58struct pcf857x {
59 struct gpio_chip chip;
60 struct i2c_client *client;
61 struct mutex lock; /* protect 'out' */
62 unsigned out; /* software latch */
63};
64
65/*-------------------------------------------------------------------------*/
66
67/* Talk to 8-bit I/O expander */
68
69static int pcf857x_input8(struct gpio_chip *chip, unsigned offset)
70{
71 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
72 int status;
73
74 mutex_lock(&gpio->lock);
75 gpio->out |= (1 << offset);
76 status = i2c_smbus_write_byte(gpio->client, gpio->out);
77 mutex_unlock(&gpio->lock);
78
79 return status;
80}
81
82static int pcf857x_get8(struct gpio_chip *chip, unsigned offset)
83{
84 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
85 s32 value;
86
87 value = i2c_smbus_read_byte(gpio->client);
88 return (value < 0) ? 0 : (value & (1 << offset));
89}
90
91static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value)
92{
93 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
94 unsigned bit = 1 << offset;
95 int status;
96
97 mutex_lock(&gpio->lock);
98 if (value)
99 gpio->out |= bit;
100 else
101 gpio->out &= ~bit;
102 status = i2c_smbus_write_byte(gpio->client, gpio->out);
103 mutex_unlock(&gpio->lock);
104
105 return status;
106}
107
108static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value)
109{
110 pcf857x_output8(chip, offset, value);
111}
112
113/*-------------------------------------------------------------------------*/
114
115/* Talk to 16-bit I/O expander */
116
117static int i2c_write_le16(struct i2c_client *client, u16 word)
118{
119 u8 buf[2] = { word & 0xff, word >> 8, };
120 int status;
121
122 status = i2c_master_send(client, buf, 2);
123 return (status < 0) ? status : 0;
124}
125
126static int i2c_read_le16(struct i2c_client *client)
127{
128 u8 buf[2];
129 int status;
130
131 status = i2c_master_recv(client, buf, 2);
132 if (status < 0)
133 return status;
134 return (buf[1] << 8) | buf[0];
135}
136
137static int pcf857x_input16(struct gpio_chip *chip, unsigned offset)
138{
139 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
140 int status;
141
142 mutex_lock(&gpio->lock);
143 gpio->out |= (1 << offset);
144 status = i2c_write_le16(gpio->client, gpio->out);
145 mutex_unlock(&gpio->lock);
146
147 return status;
148}
149
150static int pcf857x_get16(struct gpio_chip *chip, unsigned offset)
151{
152 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
153 int value;
154
155 value = i2c_read_le16(gpio->client);
156 return (value < 0) ? 0 : (value & (1 << offset));
157}
158
159static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value)
160{
161 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
162 unsigned bit = 1 << offset;
163 int status;
164
165 mutex_lock(&gpio->lock);
166 if (value)
167 gpio->out |= bit;
168 else
169 gpio->out &= ~bit;
170 status = i2c_write_le16(gpio->client, gpio->out);
171 mutex_unlock(&gpio->lock);
172
173 return status;
174}
175
176static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value)
177{
178 pcf857x_output16(chip, offset, value);
179}
180
181/*-------------------------------------------------------------------------*/
182
183static int pcf857x_probe(struct i2c_client *client,
184 const struct i2c_device_id *id)
185{
186 struct pcf857x_platform_data *pdata;
187 struct pcf857x *gpio;
188 int status;
189
190 pdata = client->dev.platform_data;
191 if (!pdata) {
192 dev_dbg(&client->dev, "no platform data\n");
193 }
194
195 /* Allocate, initialize, and register this gpio_chip. */
196 gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
197 if (!gpio)
198 return -ENOMEM;
199
200 mutex_init(&gpio->lock);
201
202 gpio->chip.base = pdata ? pdata->gpio_base : -1;
203 gpio->chip.can_sleep = 1;
204 gpio->chip.dev = &client->dev;
205 gpio->chip.owner = THIS_MODULE;
206
207 /* NOTE: the OnSemi jlc1562b is also largely compatible with
208 * these parts, notably for output. It has a low-resolution
209 * DAC instead of pin change IRQs; and its inputs can be the
210 * result of comparators.
211 */
212
213 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
214 * 9670, 9672, 9764, and 9764a use quite a variety.
215 *
216 * NOTE: we don't distinguish here between *4 and *4a parts.
217 */
218 gpio->chip.ngpio = id->driver_data;
219 if (gpio->chip.ngpio == 8) {
220 gpio->chip.direction_input = pcf857x_input8;
221 gpio->chip.get = pcf857x_get8;
222 gpio->chip.direction_output = pcf857x_output8;
223 gpio->chip.set = pcf857x_set8;
224
225 if (!i2c_check_functionality(client->adapter,
226 I2C_FUNC_SMBUS_BYTE))
227 status = -EIO;
228
229 /* fail if there's no chip present */
230 else
231 status = i2c_smbus_read_byte(client);
232
233 /* '75/'75c addresses are 0x20..0x27, just like the '74;
234 * the '75c doesn't have a current source pulling high.
235 * 9671, 9673, and 9765 use quite a variety of addresses.
236 *
237 * NOTE: we don't distinguish here between '75 and '75c parts.
238 */
239 } else if (gpio->chip.ngpio == 16) {
240 gpio->chip.direction_input = pcf857x_input16;
241 gpio->chip.get = pcf857x_get16;
242 gpio->chip.direction_output = pcf857x_output16;
243 gpio->chip.set = pcf857x_set16;
244
245 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
246 status = -EIO;
247
248 /* fail if there's no chip present */
249 else
250 status = i2c_read_le16(client);
251
252 } else {
253 dev_dbg(&client->dev, "unsupported number of gpios\n");
254 status = -EINVAL;
255 }
256
257 if (status < 0)
258 goto fail;
259
260 gpio->chip.label = client->name;
261
262 gpio->client = client;
263 i2c_set_clientdata(client, gpio);
264
265 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
266 * We can't actually know whether a pin is configured (a) as output
267 * and driving the signal low, or (b) as input and reporting a low
268 * value ... without knowing the last value written since the chip
269 * came out of reset (if any). We can't read the latched output.
270 *
271 * In short, the only reliable solution for setting up pin direction
272 * is to do it explicitly. The setup() method can do that, but it
273 * may cause transient glitching since it can't know the last value
274 * written (some pins may need to be driven low).
275 *
276 * Using pdata->n_latch avoids that trouble. When left initialized
277 * to zero, our software copy of the "latch" then matches the chip's
278 * all-ones reset state. Otherwise it flags pins to be driven low.
279 */
280 gpio->out = pdata ? ~pdata->n_latch : ~0;
281
282 status = gpiochip_add(&gpio->chip);
283 if (status < 0)
284 goto fail;
285
286 /* NOTE: these chips can issue "some pin-changed" IRQs, which we
287 * don't yet even try to use. Among other issues, the relevant
288 * genirq state isn't available to modular drivers; and most irq
289 * methods can't be called from sleeping contexts.
290 */
291
292 dev_info(&client->dev, "gpios %d..%d on a %s%s\n",
293 gpio->chip.base,
294 gpio->chip.base + gpio->chip.ngpio - 1,
295 client->name,
296 client->irq ? " (irq ignored)" : "");
297
298 /* Let platform code set up the GPIOs and their users.
299 * Now is the first time anyone could use them.
300 */
301 if (pdata && pdata->setup) {
302 status = pdata->setup(client,
303 gpio->chip.base, gpio->chip.ngpio,
304 pdata->context);
305 if (status < 0)
306 dev_warn(&client->dev, "setup --> %d\n", status);
307 }
308
309 return 0;
310
311fail:
312 dev_dbg(&client->dev, "probe error %d for '%s'\n",
313 status, client->name);
314 kfree(gpio);
315 return status;
316}
317
318static int pcf857x_remove(struct i2c_client *client)
319{
320 struct pcf857x_platform_data *pdata = client->dev.platform_data;
321 struct pcf857x *gpio = i2c_get_clientdata(client);
322 int status = 0;
323
324 if (pdata && pdata->teardown) {
325 status = pdata->teardown(client,
326 gpio->chip.base, gpio->chip.ngpio,
327 pdata->context);
328 if (status < 0) {
329 dev_err(&client->dev, "%s --> %d\n",
330 "teardown", status);
331 return status;
332 }
333 }
334
335 status = gpiochip_remove(&gpio->chip);
336 if (status == 0)
337 kfree(gpio);
338 else
339 dev_err(&client->dev, "%s --> %d\n", "remove", status);
340 return status;
341}
342
343static struct i2c_driver pcf857x_driver = {
344 .driver = {
345 .name = "pcf857x",
346 .owner = THIS_MODULE,
347 },
348 .probe = pcf857x_probe,
349 .remove = pcf857x_remove,
350 .id_table = pcf857x_id,
351};
352
353static int __init pcf857x_init(void)
354{
355 return i2c_add_driver(&pcf857x_driver);
356}
357/* register after i2c postcore initcall and before
358 * subsys initcalls that may rely on these GPIOs
359 */
360subsys_initcall(pcf857x_init);
361
362static void __exit pcf857x_exit(void)
363{
364 i2c_del_driver(&pcf857x_driver);
365}
366module_exit(pcf857x_exit);
367
368MODULE_LICENSE("GPL");
369MODULE_AUTHOR("David Brownell");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
4 *
5 * Copyright (C) 2007 David Brownell
6 */
7
8#include <linux/gpio/driver.h>
9#include <linux/i2c.h>
10#include <linux/platform_data/pcf857x.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/irqdomain.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
18#include <linux/slab.h>
19#include <linux/spinlock.h>
20
21
22static const struct i2c_device_id pcf857x_id[] = {
23 { "pcf8574", 8 },
24 { "pcf8574a", 8 },
25 { "pca8574", 8 },
26 { "pca9670", 8 },
27 { "pca9672", 8 },
28 { "pca9674", 8 },
29 { "pcf8575", 16 },
30 { "pca8575", 16 },
31 { "pca9671", 16 },
32 { "pca9673", 16 },
33 { "pca9675", 16 },
34 { "max7328", 8 },
35 { "max7329", 8 },
36 { }
37};
38MODULE_DEVICE_TABLE(i2c, pcf857x_id);
39
40#ifdef CONFIG_OF
41static const struct of_device_id pcf857x_of_table[] = {
42 { .compatible = "nxp,pcf8574" },
43 { .compatible = "nxp,pcf8574a" },
44 { .compatible = "nxp,pca8574" },
45 { .compatible = "nxp,pca9670" },
46 { .compatible = "nxp,pca9672" },
47 { .compatible = "nxp,pca9674" },
48 { .compatible = "nxp,pcf8575" },
49 { .compatible = "nxp,pca8575" },
50 { .compatible = "nxp,pca9671" },
51 { .compatible = "nxp,pca9673" },
52 { .compatible = "nxp,pca9675" },
53 { .compatible = "maxim,max7328" },
54 { .compatible = "maxim,max7329" },
55 { }
56};
57MODULE_DEVICE_TABLE(of, pcf857x_of_table);
58#endif
59
60/*
61 * The pcf857x, pca857x, and pca967x chips only expose one read and one
62 * write register. Writing a "one" bit (to match the reset state) lets
63 * that pin be used as an input; it's not an open-drain model, but acts
64 * a bit like one. This is described as "quasi-bidirectional"; read the
65 * chip documentation for details.
66 *
67 * Many other I2C GPIO expander chips (like the pca953x models) have
68 * more complex register models and more conventional circuitry using
69 * push/pull drivers. They often use the same 0x20..0x27 addresses as
70 * pcf857x parts, making the "legacy" I2C driver model problematic.
71 */
72struct pcf857x {
73 struct gpio_chip chip;
74 struct irq_chip irqchip;
75 struct i2c_client *client;
76 struct mutex lock; /* protect 'out' */
77 unsigned out; /* software latch */
78 unsigned status; /* current status */
79 unsigned irq_enabled; /* enabled irqs */
80
81 int (*write)(struct i2c_client *client, unsigned data);
82 int (*read)(struct i2c_client *client);
83};
84
85/*-------------------------------------------------------------------------*/
86
87/* Talk to 8-bit I/O expander */
88
89static int i2c_write_le8(struct i2c_client *client, unsigned data)
90{
91 return i2c_smbus_write_byte(client, data);
92}
93
94static int i2c_read_le8(struct i2c_client *client)
95{
96 return (int)i2c_smbus_read_byte(client);
97}
98
99/* Talk to 16-bit I/O expander */
100
101static int i2c_write_le16(struct i2c_client *client, unsigned word)
102{
103 u8 buf[2] = { word & 0xff, word >> 8, };
104 int status;
105
106 status = i2c_master_send(client, buf, 2);
107 return (status < 0) ? status : 0;
108}
109
110static int i2c_read_le16(struct i2c_client *client)
111{
112 u8 buf[2];
113 int status;
114
115 status = i2c_master_recv(client, buf, 2);
116 if (status < 0)
117 return status;
118 return (buf[1] << 8) | buf[0];
119}
120
121/*-------------------------------------------------------------------------*/
122
123static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
124{
125 struct pcf857x *gpio = gpiochip_get_data(chip);
126 int status;
127
128 mutex_lock(&gpio->lock);
129 gpio->out |= (1 << offset);
130 status = gpio->write(gpio->client, gpio->out);
131 mutex_unlock(&gpio->lock);
132
133 return status;
134}
135
136static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
137{
138 struct pcf857x *gpio = gpiochip_get_data(chip);
139 int value;
140
141 value = gpio->read(gpio->client);
142 return (value < 0) ? value : !!(value & (1 << offset));
143}
144
145static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
146{
147 struct pcf857x *gpio = gpiochip_get_data(chip);
148 unsigned bit = 1 << offset;
149 int status;
150
151 mutex_lock(&gpio->lock);
152 if (value)
153 gpio->out |= bit;
154 else
155 gpio->out &= ~bit;
156 status = gpio->write(gpio->client, gpio->out);
157 mutex_unlock(&gpio->lock);
158
159 return status;
160}
161
162static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
163{
164 pcf857x_output(chip, offset, value);
165}
166
167/*-------------------------------------------------------------------------*/
168
169static irqreturn_t pcf857x_irq(int irq, void *data)
170{
171 struct pcf857x *gpio = data;
172 unsigned long change, i, status;
173
174 status = gpio->read(gpio->client);
175
176 /*
177 * call the interrupt handler iff gpio is used as
178 * interrupt source, just to avoid bad irqs
179 */
180 mutex_lock(&gpio->lock);
181 change = (gpio->status ^ status) & gpio->irq_enabled;
182 gpio->status = status;
183 mutex_unlock(&gpio->lock);
184
185 for_each_set_bit(i, &change, gpio->chip.ngpio)
186 handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
187
188 return IRQ_HANDLED;
189}
190
191/*
192 * NOP functions
193 */
194static void noop(struct irq_data *data) { }
195
196static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
197{
198 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
199
200 return irq_set_irq_wake(gpio->client->irq, on);
201}
202
203static void pcf857x_irq_enable(struct irq_data *data)
204{
205 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
206
207 gpio->irq_enabled |= (1 << data->hwirq);
208}
209
210static void pcf857x_irq_disable(struct irq_data *data)
211{
212 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
213
214 gpio->irq_enabled &= ~(1 << data->hwirq);
215}
216
217static void pcf857x_irq_bus_lock(struct irq_data *data)
218{
219 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
220
221 mutex_lock(&gpio->lock);
222}
223
224static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
225{
226 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
227
228 mutex_unlock(&gpio->lock);
229}
230
231/*-------------------------------------------------------------------------*/
232
233static int pcf857x_probe(struct i2c_client *client,
234 const struct i2c_device_id *id)
235{
236 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
237 struct device_node *np = client->dev.of_node;
238 struct pcf857x *gpio;
239 unsigned int n_latch = 0;
240 int status;
241
242 if (IS_ENABLED(CONFIG_OF) && np)
243 of_property_read_u32(np, "lines-initial-states", &n_latch);
244 else if (pdata)
245 n_latch = pdata->n_latch;
246 else
247 dev_dbg(&client->dev, "no platform data\n");
248
249 /* Allocate, initialize, and register this gpio_chip. */
250 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
251 if (!gpio)
252 return -ENOMEM;
253
254 mutex_init(&gpio->lock);
255
256 gpio->chip.base = pdata ? pdata->gpio_base : -1;
257 gpio->chip.can_sleep = true;
258 gpio->chip.parent = &client->dev;
259 gpio->chip.owner = THIS_MODULE;
260 gpio->chip.get = pcf857x_get;
261 gpio->chip.set = pcf857x_set;
262 gpio->chip.direction_input = pcf857x_input;
263 gpio->chip.direction_output = pcf857x_output;
264 gpio->chip.ngpio = id->driver_data;
265
266 /* NOTE: the OnSemi jlc1562b is also largely compatible with
267 * these parts, notably for output. It has a low-resolution
268 * DAC instead of pin change IRQs; and its inputs can be the
269 * result of comparators.
270 */
271
272 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
273 * 9670, 9672, 9764, and 9764a use quite a variety.
274 *
275 * NOTE: we don't distinguish here between *4 and *4a parts.
276 */
277 if (gpio->chip.ngpio == 8) {
278 gpio->write = i2c_write_le8;
279 gpio->read = i2c_read_le8;
280
281 if (!i2c_check_functionality(client->adapter,
282 I2C_FUNC_SMBUS_BYTE))
283 status = -EIO;
284
285 /* fail if there's no chip present */
286 else
287 status = i2c_smbus_read_byte(client);
288
289 /* '75/'75c addresses are 0x20..0x27, just like the '74;
290 * the '75c doesn't have a current source pulling high.
291 * 9671, 9673, and 9765 use quite a variety of addresses.
292 *
293 * NOTE: we don't distinguish here between '75 and '75c parts.
294 */
295 } else if (gpio->chip.ngpio == 16) {
296 gpio->write = i2c_write_le16;
297 gpio->read = i2c_read_le16;
298
299 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
300 status = -EIO;
301
302 /* fail if there's no chip present */
303 else
304 status = i2c_read_le16(client);
305
306 } else {
307 dev_dbg(&client->dev, "unsupported number of gpios\n");
308 status = -EINVAL;
309 }
310
311 if (status < 0)
312 goto fail;
313
314 gpio->chip.label = client->name;
315
316 gpio->client = client;
317 i2c_set_clientdata(client, gpio);
318
319 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
320 * We can't actually know whether a pin is configured (a) as output
321 * and driving the signal low, or (b) as input and reporting a low
322 * value ... without knowing the last value written since the chip
323 * came out of reset (if any). We can't read the latched output.
324 *
325 * In short, the only reliable solution for setting up pin direction
326 * is to do it explicitly. The setup() method can do that, but it
327 * may cause transient glitching since it can't know the last value
328 * written (some pins may need to be driven low).
329 *
330 * Using n_latch avoids that trouble. When left initialized to zero,
331 * our software copy of the "latch" then matches the chip's all-ones
332 * reset state. Otherwise it flags pins to be driven low.
333 */
334 gpio->out = ~n_latch;
335 gpio->status = gpio->out;
336
337 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
338 if (status < 0)
339 goto fail;
340
341 /* Enable irqchip if we have an interrupt */
342 if (client->irq) {
343 gpio->irqchip.name = "pcf857x",
344 gpio->irqchip.irq_enable = pcf857x_irq_enable,
345 gpio->irqchip.irq_disable = pcf857x_irq_disable,
346 gpio->irqchip.irq_ack = noop,
347 gpio->irqchip.irq_mask = noop,
348 gpio->irqchip.irq_unmask = noop,
349 gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake,
350 gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock,
351 gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
352 status = gpiochip_irqchip_add_nested(&gpio->chip,
353 &gpio->irqchip,
354 0, handle_level_irq,
355 IRQ_TYPE_NONE);
356 if (status) {
357 dev_err(&client->dev, "cannot add irqchip\n");
358 goto fail;
359 }
360
361 status = devm_request_threaded_irq(&client->dev, client->irq,
362 NULL, pcf857x_irq, IRQF_ONESHOT |
363 IRQF_TRIGGER_FALLING | IRQF_SHARED,
364 dev_name(&client->dev), gpio);
365 if (status)
366 goto fail;
367
368 gpiochip_set_nested_irqchip(&gpio->chip, &gpio->irqchip,
369 client->irq);
370 }
371
372 /* Let platform code set up the GPIOs and their users.
373 * Now is the first time anyone could use them.
374 */
375 if (pdata && pdata->setup) {
376 status = pdata->setup(client,
377 gpio->chip.base, gpio->chip.ngpio,
378 pdata->context);
379 if (status < 0)
380 dev_warn(&client->dev, "setup --> %d\n", status);
381 }
382
383 dev_info(&client->dev, "probed\n");
384
385 return 0;
386
387fail:
388 dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
389 client->name);
390
391 return status;
392}
393
394static int pcf857x_remove(struct i2c_client *client)
395{
396 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
397 struct pcf857x *gpio = i2c_get_clientdata(client);
398 int status = 0;
399
400 if (pdata && pdata->teardown) {
401 status = pdata->teardown(client,
402 gpio->chip.base, gpio->chip.ngpio,
403 pdata->context);
404 if (status < 0) {
405 dev_err(&client->dev, "%s --> %d\n",
406 "teardown", status);
407 return status;
408 }
409 }
410
411 return status;
412}
413
414static void pcf857x_shutdown(struct i2c_client *client)
415{
416 struct pcf857x *gpio = i2c_get_clientdata(client);
417
418 /* Drive all the I/O lines high */
419 gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
420}
421
422static struct i2c_driver pcf857x_driver = {
423 .driver = {
424 .name = "pcf857x",
425 .of_match_table = of_match_ptr(pcf857x_of_table),
426 },
427 .probe = pcf857x_probe,
428 .remove = pcf857x_remove,
429 .shutdown = pcf857x_shutdown,
430 .id_table = pcf857x_id,
431};
432
433static int __init pcf857x_init(void)
434{
435 return i2c_add_driver(&pcf857x_driver);
436}
437/* register after i2c postcore initcall and before
438 * subsys initcalls that may rely on these GPIOs
439 */
440subsys_initcall(pcf857x_init);
441
442static void __exit pcf857x_exit(void)
443{
444 i2c_del_driver(&pcf857x_driver);
445}
446module_exit(pcf857x_exit);
447
448MODULE_LICENSE("GPL");
449MODULE_AUTHOR("David Brownell");