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1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6 * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/types.h>
30#include <linux/ssb/ssb.h>
31#include <linux/ssb/ssb_embedded.h>
32#include <asm/bootinfo.h>
33#include <asm/reboot.h>
34#include <asm/time.h>
35#include <bcm47xx.h>
36#include <asm/mach-bcm47xx/nvram.h>
37
38struct ssb_bus ssb_bcm47xx;
39EXPORT_SYMBOL(ssb_bcm47xx);
40
41static void bcm47xx_machine_restart(char *command)
42{
43 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
44 local_irq_disable();
45 /* Set the watchdog timer to reset immediately */
46 ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
47 while (1)
48 cpu_relax();
49}
50
51static void bcm47xx_machine_halt(void)
52{
53 /* Disable interrupts and watchdog and spin forever */
54 local_irq_disable();
55 ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
56 while (1)
57 cpu_relax();
58}
59
60#define READ_FROM_NVRAM(_outvar, name, buf) \
61 if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
62 sprom->_outvar = simple_strtoul(buf, NULL, 0);
63
64#define READ_FROM_NVRAM2(_outvar, name1, name2, buf) \
65 if (nvram_getprefix(prefix, name1, buf, sizeof(buf)) >= 0 || \
66 nvram_getprefix(prefix, name2, buf, sizeof(buf)) >= 0)\
67 sprom->_outvar = simple_strtoul(buf, NULL, 0);
68
69static inline int nvram_getprefix(const char *prefix, char *name,
70 char *buf, int len)
71{
72 if (prefix) {
73 char key[100];
74
75 snprintf(key, sizeof(key), "%s%s", prefix, name);
76 return nvram_getenv(key, buf, len);
77 }
78
79 return nvram_getenv(name, buf, len);
80}
81
82static u32 nvram_getu32(const char *name, char *buf, int len)
83{
84 int rv;
85 char key[100];
86 u16 var0, var1;
87
88 snprintf(key, sizeof(key), "%s0", name);
89 rv = nvram_getenv(key, buf, len);
90 /* return 0 here so this looks like unset */
91 if (rv < 0)
92 return 0;
93 var0 = simple_strtoul(buf, NULL, 0);
94
95 snprintf(key, sizeof(key), "%s1", name);
96 rv = nvram_getenv(key, buf, len);
97 if (rv < 0)
98 return 0;
99 var1 = simple_strtoul(buf, NULL, 0);
100 return var1 << 16 | var0;
101}
102
103static void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
104{
105 char buf[100];
106 u32 boardflags;
107
108 memset(sprom, 0, sizeof(struct ssb_sprom));
109
110 sprom->revision = 1; /* Fallback: Old hardware does not define this. */
111 READ_FROM_NVRAM(revision, "sromrev", buf);
112 if (nvram_getprefix(prefix, "il0macaddr", buf, sizeof(buf)) >= 0 ||
113 nvram_getprefix(prefix, "macaddr", buf, sizeof(buf)) >= 0)
114 nvram_parse_macaddr(buf, sprom->il0mac);
115 if (nvram_getprefix(prefix, "et0macaddr", buf, sizeof(buf)) >= 0)
116 nvram_parse_macaddr(buf, sprom->et0mac);
117 if (nvram_getprefix(prefix, "et1macaddr", buf, sizeof(buf)) >= 0)
118 nvram_parse_macaddr(buf, sprom->et1mac);
119 READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
120 READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
121 READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
122 READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
123 READ_FROM_NVRAM(board_rev, "boardrev", buf);
124 READ_FROM_NVRAM(country_code, "ccode", buf);
125 READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
126 READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
127 READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
128 READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
129 READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
130 READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
131 READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
132 READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
133 READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
134 READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
135 READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
136 READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
137 READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
138 READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
139 READ_FROM_NVRAM2(gpio0, "ledbh0", "wl0gpio0", buf);
140 READ_FROM_NVRAM2(gpio1, "ledbh1", "wl0gpio1", buf);
141 READ_FROM_NVRAM2(gpio2, "ledbh2", "wl0gpio2", buf);
142 READ_FROM_NVRAM2(gpio3, "ledbh3", "wl0gpio3", buf);
143 READ_FROM_NVRAM2(maxpwr_bg, "maxp2ga0", "pa0maxpwr", buf);
144 READ_FROM_NVRAM2(maxpwr_al, "maxp5gla0", "pa1lomaxpwr", buf);
145 READ_FROM_NVRAM2(maxpwr_a, "maxp5ga0", "pa1maxpwr", buf);
146 READ_FROM_NVRAM2(maxpwr_ah, "maxp5gha0", "pa1himaxpwr", buf);
147 READ_FROM_NVRAM2(itssi_bg, "itt5ga0", "pa0itssit", buf);
148 READ_FROM_NVRAM2(itssi_a, "itt2ga0", "pa1itssit", buf);
149 READ_FROM_NVRAM(tri2g, "tri2g", buf);
150 READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
151 READ_FROM_NVRAM(tri5g, "tri5g", buf);
152 READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
153 READ_FROM_NVRAM(txpid2g[0], "txpid2ga0", buf);
154 READ_FROM_NVRAM(txpid2g[1], "txpid2ga1", buf);
155 READ_FROM_NVRAM(txpid2g[2], "txpid2ga2", buf);
156 READ_FROM_NVRAM(txpid2g[3], "txpid2ga3", buf);
157 READ_FROM_NVRAM(txpid5g[0], "txpid5ga0", buf);
158 READ_FROM_NVRAM(txpid5g[1], "txpid5ga1", buf);
159 READ_FROM_NVRAM(txpid5g[2], "txpid5ga2", buf);
160 READ_FROM_NVRAM(txpid5g[3], "txpid5ga3", buf);
161 READ_FROM_NVRAM(txpid5gl[0], "txpid5gla0", buf);
162 READ_FROM_NVRAM(txpid5gl[1], "txpid5gla1", buf);
163 READ_FROM_NVRAM(txpid5gl[2], "txpid5gla2", buf);
164 READ_FROM_NVRAM(txpid5gl[3], "txpid5gla3", buf);
165 READ_FROM_NVRAM(txpid5gh[0], "txpid5gha0", buf);
166 READ_FROM_NVRAM(txpid5gh[1], "txpid5gha1", buf);
167 READ_FROM_NVRAM(txpid5gh[2], "txpid5gha2", buf);
168 READ_FROM_NVRAM(txpid5gh[3], "txpid5gha3", buf);
169 READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
170 READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
171 READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
172 READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
173 READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
174 READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
175 READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
176 READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
177 READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
178 READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
179 READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
180
181 sprom->ofdm2gpo = nvram_getu32("ofdm2gpo", buf, sizeof(buf));
182 sprom->ofdm5glpo = nvram_getu32("ofdm5glpo", buf, sizeof(buf));
183 sprom->ofdm5gpo = nvram_getu32("ofdm5gpo", buf, sizeof(buf));
184 sprom->ofdm5ghpo = nvram_getu32("ofdm5ghpo", buf, sizeof(buf));
185
186 READ_FROM_NVRAM(antenna_gain.ghz24.a0, "ag0", buf);
187 READ_FROM_NVRAM(antenna_gain.ghz24.a1, "ag1", buf);
188 READ_FROM_NVRAM(antenna_gain.ghz24.a2, "ag2", buf);
189 READ_FROM_NVRAM(antenna_gain.ghz24.a3, "ag3", buf);
190 memcpy(&sprom->antenna_gain.ghz5, &sprom->antenna_gain.ghz24,
191 sizeof(sprom->antenna_gain.ghz5));
192
193 if (nvram_getprefix(prefix, "boardflags", buf, sizeof(buf)) >= 0) {
194 boardflags = simple_strtoul(buf, NULL, 0);
195 if (boardflags) {
196 sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
197 sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
198 }
199 }
200 if (nvram_getprefix(prefix, "boardflags2", buf, sizeof(buf)) >= 0) {
201 boardflags = simple_strtoul(buf, NULL, 0);
202 if (boardflags) {
203 sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
204 sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
205 }
206 }
207}
208
209int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
210{
211 char prefix[10];
212
213 if (bus->bustype == SSB_BUSTYPE_PCI) {
214 snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
215 bus->host_pci->bus->number + 1,
216 PCI_SLOT(bus->host_pci->devfn));
217 bcm47xx_fill_sprom(out, prefix);
218 return 0;
219 } else {
220 printk(KERN_WARNING "bcm47xx: unable to fill SPROM for given bustype.\n");
221 return -EINVAL;
222 }
223}
224
225static int bcm47xx_get_invariants(struct ssb_bus *bus,
226 struct ssb_init_invariants *iv)
227{
228 char buf[20];
229
230 /* Fill boardinfo structure */
231 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
232
233 if (nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0)
234 iv->boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0);
235 else
236 iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
237 if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
238 iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
239 if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
240 iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
241
242 bcm47xx_fill_sprom(&iv->sprom, NULL);
243
244 if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
245 iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
246
247 return 0;
248}
249
250void __init plat_mem_setup(void)
251{
252 int err;
253 char buf[100];
254 struct ssb_mipscore *mcore;
255
256 err = ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom);
257 if (err)
258 printk(KERN_WARNING "bcm47xx: someone else already registered"
259 " a ssb SPROM callback handler (err %d)\n", err);
260
261 err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
262 bcm47xx_get_invariants);
263 if (err)
264 panic("Failed to initialize SSB bus (err %d)\n", err);
265
266 mcore = &ssb_bcm47xx.mipscore;
267 if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
268 if (strstr(buf, "console=ttyS1")) {
269 struct ssb_serial_port port;
270
271 printk(KERN_DEBUG "Swapping serial ports!\n");
272 /* swap serial ports */
273 memcpy(&port, &mcore->serial_ports[0], sizeof(port));
274 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
275 sizeof(port));
276 memcpy(&mcore->serial_ports[1], &port, sizeof(port));
277 }
278 }
279
280 _machine_restart = bcm47xx_machine_restart;
281 _machine_halt = bcm47xx_machine_halt;
282 pm_power_off = bcm47xx_machine_halt;
283}
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6 * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include "bcm47xx_private.h"
30
31#include <linux/bcm47xx_sprom.h>
32#include <linux/export.h>
33#include <linux/types.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
36#include <linux/phy_fixed.h>
37#include <linux/ssb/ssb.h>
38#include <linux/ssb/ssb_embedded.h>
39#include <linux/bcma/bcma_soc.h>
40#include <asm/bootinfo.h>
41#include <asm/idle.h>
42#include <asm/prom.h>
43#include <asm/reboot.h>
44#include <asm/time.h>
45#include <bcm47xx.h>
46#include <bcm47xx_board.h>
47
48union bcm47xx_bus bcm47xx_bus;
49EXPORT_SYMBOL(bcm47xx_bus);
50
51enum bcm47xx_bus_type bcm47xx_bus_type;
52EXPORT_SYMBOL(bcm47xx_bus_type);
53
54static void bcm47xx_machine_restart(char *command)
55{
56 pr_alert("Please stand by while rebooting the system...\n");
57 local_irq_disable();
58 /* Set the watchdog timer to reset immediately */
59 switch (bcm47xx_bus_type) {
60#ifdef CONFIG_BCM47XX_SSB
61 case BCM47XX_BUS_TYPE_SSB:
62 if (bcm47xx_bus.ssb.chip_id == 0x4785)
63 write_c0_diag4(1 << 22);
64 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
65 if (bcm47xx_bus.ssb.chip_id == 0x4785) {
66 __asm__ __volatile__(
67 ".set\tmips3\n\t"
68 "sync\n\t"
69 "wait\n\t"
70 ".set\tmips0");
71 }
72 break;
73#endif
74#ifdef CONFIG_BCM47XX_BCMA
75 case BCM47XX_BUS_TYPE_BCMA:
76 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
77 break;
78#endif
79 }
80 while (1)
81 cpu_relax();
82}
83
84static void bcm47xx_machine_halt(void)
85{
86 /* Disable interrupts and watchdog and spin forever */
87 local_irq_disable();
88 switch (bcm47xx_bus_type) {
89#ifdef CONFIG_BCM47XX_SSB
90 case BCM47XX_BUS_TYPE_SSB:
91 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
92 break;
93#endif
94#ifdef CONFIG_BCM47XX_BCMA
95 case BCM47XX_BUS_TYPE_BCMA:
96 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
97 break;
98#endif
99 }
100 while (1)
101 cpu_relax();
102}
103
104#ifdef CONFIG_BCM47XX_SSB
105static void __init bcm47xx_register_ssb(void)
106{
107 int err;
108 char buf[100];
109 struct ssb_mipscore *mcore;
110
111 err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE);
112 if (err)
113 panic("Failed to initialize SSB bus (err %d)", err);
114
115 mcore = &bcm47xx_bus.ssb.mipscore;
116 if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
117 if (strstr(buf, "console=ttyS1")) {
118 struct ssb_serial_port port;
119
120 pr_debug("Swapping serial ports!\n");
121 /* swap serial ports */
122 memcpy(&port, &mcore->serial_ports[0], sizeof(port));
123 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
124 sizeof(port));
125 memcpy(&mcore->serial_ports[1], &port, sizeof(port));
126 }
127 }
128}
129#endif
130
131#ifdef CONFIG_BCM47XX_BCMA
132static void __init bcm47xx_register_bcma(void)
133{
134 int err;
135
136 err = bcma_host_soc_register(&bcm47xx_bus.bcma);
137 if (err)
138 panic("Failed to register BCMA bus (err %d)", err);
139}
140#endif
141
142/*
143 * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed
144 * to detect memory and record it with add_memory_region.
145 * Any extra initializaion performed here must not use kmalloc or bootmem.
146 */
147void __init plat_mem_setup(void)
148{
149 struct cpuinfo_mips *c = ¤t_cpu_data;
150
151 if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) {
152 pr_info("Using bcma bus\n");
153#ifdef CONFIG_BCM47XX_BCMA
154 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
155 bcm47xx_register_bcma();
156 bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id);
157#ifdef CONFIG_HIGHMEM
158 bcm47xx_prom_highmem_init();
159#endif
160#endif
161 } else {
162 pr_info("Using ssb bus\n");
163#ifdef CONFIG_BCM47XX_SSB
164 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
165 bcm47xx_sprom_register_fallbacks();
166 bcm47xx_register_ssb();
167 bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id);
168#endif
169 }
170
171 _machine_restart = bcm47xx_machine_restart;
172 _machine_halt = bcm47xx_machine_halt;
173 pm_power_off = bcm47xx_machine_halt;
174}
175
176#ifdef CONFIG_BCM47XX_BCMA
177static struct device * __init bcm47xx_setup_device(void)
178{
179 struct device *dev;
180 int err;
181
182 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
183 if (!dev)
184 return NULL;
185
186 err = dev_set_name(dev, "bcm47xx_soc");
187 if (err) {
188 pr_err("Failed to set SoC device name: %d\n", err);
189 kfree(dev);
190 return NULL;
191 }
192
193 err = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
194 if (err)
195 pr_err("Failed to set SoC DMA mask: %d\n", err);
196
197 return dev;
198}
199#endif
200
201/*
202 * This finishes bus initialization doing things that were not possible without
203 * kmalloc. Make sure to call it late enough (after mm_init).
204 */
205void __init bcm47xx_bus_setup(void)
206{
207#ifdef CONFIG_BCM47XX_BCMA
208 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
209 int err;
210
211 bcm47xx_bus.bcma.dev = bcm47xx_setup_device();
212 if (!bcm47xx_bus.bcma.dev)
213 panic("Failed to setup SoC device\n");
214
215 err = bcma_host_soc_init(&bcm47xx_bus.bcma);
216 if (err)
217 panic("Failed to initialize BCMA bus (err %d)", err);
218 }
219#endif
220
221 /* With bus initialized we can access NVRAM and detect the board */
222 bcm47xx_board_detect();
223 mips_set_machine_name(bcm47xx_board_get_name());
224}
225
226static int __init bcm47xx_cpu_fixes(void)
227{
228 switch (bcm47xx_bus_type) {
229#ifdef CONFIG_BCM47XX_SSB
230 case BCM47XX_BUS_TYPE_SSB:
231 /* Nothing to do */
232 break;
233#endif
234#ifdef CONFIG_BCM47XX_BCMA
235 case BCM47XX_BUS_TYPE_BCMA:
236 /* The BCM4706 has a problem with the CPU wait instruction.
237 * When r4k_wait or r4k_wait_irqoff is used will just hang and
238 * not return from a msleep(). Removing the cpu_wait
239 * functionality is a workaround for this problem. The BCM4716
240 * does not have this problem.
241 */
242 if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
243 cpu_wait = NULL;
244 break;
245#endif
246 }
247 return 0;
248}
249arch_initcall(bcm47xx_cpu_fixes);
250
251static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = {
252 .link = 1,
253 .speed = SPEED_100,
254 .duplex = DUPLEX_FULL,
255};
256
257static int __init bcm47xx_register_bus_complete(void)
258{
259 switch (bcm47xx_bus_type) {
260#ifdef CONFIG_BCM47XX_SSB
261 case BCM47XX_BUS_TYPE_SSB:
262 /* Nothing to do */
263 break;
264#endif
265#ifdef CONFIG_BCM47XX_BCMA
266 case BCM47XX_BUS_TYPE_BCMA:
267 if (device_register(bcm47xx_bus.bcma.dev))
268 pr_err("Failed to register SoC device\n");
269 bcma_bus_register(&bcm47xx_bus.bcma.bus);
270 break;
271#endif
272 }
273 bcm47xx_buttons_register();
274 bcm47xx_leds_register();
275 bcm47xx_workarounds();
276
277 fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
278 return 0;
279}
280device_initcall(bcm47xx_register_bus_complete);