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1/*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef _VIA_DRM_H_
25#define _VIA_DRM_H_
26
27#include "drm.h"
28
29#if defined(__cplusplus)
30extern "C" {
31#endif
32
33/* WARNING: These defines must be the same as what the Xserver uses.
34 * if you change them, you must change the defines in the Xserver.
35 */
36
37#ifndef _VIA_DEFINES_
38#define _VIA_DEFINES_
39
40
41#define VIA_NR_SAREA_CLIPRECTS 8
42#define VIA_NR_XVMC_PORTS 10
43#define VIA_NR_XVMC_LOCKS 5
44#define VIA_MAX_CACHELINE_SIZE 64
45#define XVMCLOCKPTR(saPriv,lockNo) \
46 ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
47 (VIA_MAX_CACHELINE_SIZE - 1)) & \
48 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
49 VIA_MAX_CACHELINE_SIZE*(lockNo)))
50
51/* Each region is a minimum of 64k, and there are at most 64 of them.
52 */
53#define VIA_NR_TEX_REGIONS 64
54#define VIA_LOG_MIN_TEX_REGION_SIZE 16
55#endif
56
57#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
58#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
59#define VIA_UPLOAD_CTX 0x4
60#define VIA_UPLOAD_BUFFERS 0x8
61#define VIA_UPLOAD_TEX0 0x10
62#define VIA_UPLOAD_TEX1 0x20
63#define VIA_UPLOAD_CLIPRECTS 0x40
64#define VIA_UPLOAD_ALL 0xff
65
66/* VIA specific ioctls */
67#define DRM_VIA_ALLOCMEM 0x00
68#define DRM_VIA_FREEMEM 0x01
69#define DRM_VIA_AGP_INIT 0x02
70#define DRM_VIA_FB_INIT 0x03
71#define DRM_VIA_MAP_INIT 0x04
72#define DRM_VIA_DEC_FUTEX 0x05
73#define NOT_USED
74#define DRM_VIA_DMA_INIT 0x07
75#define DRM_VIA_CMDBUFFER 0x08
76#define DRM_VIA_FLUSH 0x09
77#define DRM_VIA_PCICMD 0x0a
78#define DRM_VIA_CMDBUF_SIZE 0x0b
79#define NOT_USED
80#define DRM_VIA_WAIT_IRQ 0x0d
81#define DRM_VIA_DMA_BLIT 0x0e
82#define DRM_VIA_BLIT_SYNC 0x0f
83
84#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
85#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
86#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
87#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
88#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
89#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
90#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
91#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
92#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
93#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
94#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
95 drm_via_cmdbuf_size_t)
96#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
97#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
98#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
99
100/* Indices into buf.Setup where various bits of state are mirrored per
101 * context and per buffer. These can be fired at the card as a unit,
102 * or in a piecewise fashion as required.
103 */
104
105#define VIA_TEX_SETUP_SIZE 8
106
107/* Flags for clear ioctl
108 */
109#define VIA_FRONT 0x1
110#define VIA_BACK 0x2
111#define VIA_DEPTH 0x4
112#define VIA_STENCIL 0x8
113#define VIA_MEM_VIDEO 0 /* matches drm constant */
114#define VIA_MEM_AGP 1 /* matches drm constant */
115#define VIA_MEM_SYSTEM 2
116#define VIA_MEM_MIXED 3
117#define VIA_MEM_UNKNOWN 4
118
119typedef struct {
120 __u32 offset;
121 __u32 size;
122} drm_via_agp_t;
123
124typedef struct {
125 __u32 offset;
126 __u32 size;
127} drm_via_fb_t;
128
129typedef struct {
130 __u32 context;
131 __u32 type;
132 __u32 size;
133 unsigned long index;
134 unsigned long offset;
135} drm_via_mem_t;
136
137typedef struct _drm_via_init {
138 enum {
139 VIA_INIT_MAP = 0x01,
140 VIA_CLEANUP_MAP = 0x02
141 } func;
142
143 unsigned long sarea_priv_offset;
144 unsigned long fb_offset;
145 unsigned long mmio_offset;
146 unsigned long agpAddr;
147} drm_via_init_t;
148
149typedef struct _drm_via_futex {
150 enum {
151 VIA_FUTEX_WAIT = 0x00,
152 VIA_FUTEX_WAKE = 0X01
153 } func;
154 __u32 ms;
155 __u32 lock;
156 __u32 val;
157} drm_via_futex_t;
158
159typedef struct _drm_via_dma_init {
160 enum {
161 VIA_INIT_DMA = 0x01,
162 VIA_CLEANUP_DMA = 0x02,
163 VIA_DMA_INITIALIZED = 0x03
164 } func;
165
166 unsigned long offset;
167 unsigned long size;
168 unsigned long reg_pause_addr;
169} drm_via_dma_init_t;
170
171typedef struct _drm_via_cmdbuffer {
172 char __user *buf;
173 unsigned long size;
174} drm_via_cmdbuffer_t;
175
176/* Warning: If you change the SAREA structure you must change the Xserver
177 * structure as well */
178
179typedef struct _drm_via_tex_region {
180 unsigned char next, prev; /* indices to form a circular LRU */
181 unsigned char inUse; /* owned by a client, or free? */
182 int age; /* tracked by clients to update local LRU's */
183} drm_via_tex_region_t;
184
185typedef struct _drm_via_sarea {
186 unsigned int dirty;
187 unsigned int nbox;
188 struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
189 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
190 int texAge; /* last time texture was uploaded */
191 int ctxOwner; /* last context to upload state */
192 int vertexPrim;
193
194 /*
195 * Below is for XvMC.
196 * We want the lock integers alone on, and aligned to, a cache line.
197 * Therefore this somewhat strange construct.
198 */
199
200 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
201
202 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
203 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
204 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
205
206 /* Used by the 3d driver only at this point, for pageflipping:
207 */
208 unsigned int pfCurrentOffset;
209} drm_via_sarea_t;
210
211typedef struct _drm_via_cmdbuf_size {
212 enum {
213 VIA_CMDBUF_SPACE = 0x01,
214 VIA_CMDBUF_LAG = 0x02
215 } func;
216 int wait;
217 __u32 size;
218} drm_via_cmdbuf_size_t;
219
220typedef enum {
221 VIA_IRQ_ABSOLUTE = 0x0,
222 VIA_IRQ_RELATIVE = 0x1,
223 VIA_IRQ_SIGNAL = 0x10000000,
224 VIA_IRQ_FORCE_SEQUENCE = 0x20000000
225} via_irq_seq_type_t;
226
227#define VIA_IRQ_FLAGS_MASK 0xF0000000
228
229enum drm_via_irqs {
230 drm_via_irq_hqv0 = 0,
231 drm_via_irq_hqv1,
232 drm_via_irq_dma0_dd,
233 drm_via_irq_dma0_td,
234 drm_via_irq_dma1_dd,
235 drm_via_irq_dma1_td,
236 drm_via_irq_num
237};
238
239struct drm_via_wait_irq_request {
240 unsigned irq;
241 via_irq_seq_type_t type;
242 __u32 sequence;
243 __u32 signal;
244};
245
246typedef union drm_via_irqwait {
247 struct drm_via_wait_irq_request request;
248 struct drm_wait_vblank_reply reply;
249} drm_via_irqwait_t;
250
251typedef struct drm_via_blitsync {
252 __u32 sync_handle;
253 unsigned engine;
254} drm_via_blitsync_t;
255
256/* - * Below,"flags" is currently unused but will be used for possible future
257 * extensions like kernel space bounce buffers for bad alignments and
258 * blit engine busy-wait polling for better latency in the absence of
259 * interrupts.
260 */
261
262typedef struct drm_via_dmablit {
263 __u32 num_lines;
264 __u32 line_length;
265
266 __u32 fb_addr;
267 __u32 fb_stride;
268
269 unsigned char *mem_addr;
270 __u32 mem_stride;
271
272 __u32 flags;
273 int to_fb;
274
275 drm_via_blitsync_t sync;
276} drm_via_dmablit_t;
277
278#if defined(__cplusplus)
279}
280#endif
281
282#endif /* _VIA_DRM_H_ */