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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * F81532/F81534 USB to Serial Ports Bridge
4 *
5 * F81532 => 2 Serial Ports
6 * F81534 => 4 Serial Ports
7 *
8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
11 *
12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
14 * (Read Data/MSR/LSR).
15 *
16 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
17 * It can be described by f81534_prepare_write_buffer()
18 *
19 * Read URB is 512Bytes max, per serial port used 128Bytes.
20 * It can be described by f81534_process_read_urb() and maybe received with
21 * 128x1,2,3,4 bytes.
22 *
23 */
24#include <linux/slab.h>
25#include <linux/tty.h>
26#include <linux/tty_flip.h>
27#include <linux/usb.h>
28#include <linux/usb/serial.h>
29#include <linux/serial_reg.h>
30#include <linux/module.h>
31#include <linux/uaccess.h>
32
33/* Serial Port register Address */
34#define F81534_UART_BASE_ADDRESS 0x1200
35#define F81534_UART_OFFSET 0x10
36#define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
37#define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
38#define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
39#define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
40#define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
41#define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
42#define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
43#define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
44#define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
45#define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
46
47#define F81534_DEF_CONF_ADDRESS_START 0x3000
48#define F81534_DEF_CONF_SIZE 12
49
50#define F81534_CUSTOM_ADDRESS_START 0x2f00
51#define F81534_CUSTOM_DATA_SIZE 0x10
52#define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
53#define F81534_CUSTOM_VALID_TOKEN 0xf0
54#define F81534_CONF_OFFSET 1
55#define F81534_CONF_INIT_GPIO_OFFSET 4
56#define F81534_CONF_WORK_GPIO_OFFSET 8
57#define F81534_CONF_GPIO_SHUTDOWN 7
58#define F81534_CONF_GPIO_RS232 1
59
60#define F81534_MAX_DATA_BLOCK 64
61#define F81534_MAX_BUS_RETRY 20
62
63/* Default URB timeout for USB operations */
64#define F81534_USB_MAX_RETRY 10
65#define F81534_USB_TIMEOUT 2000
66#define F81534_SET_GET_REGISTER 0xA0
67
68#define F81534_NUM_PORT 4
69#define F81534_UNUSED_PORT 0xff
70#define F81534_WRITE_BUFFER_SIZE 512
71
72#define DRIVER_DESC "Fintek F81532/F81534"
73#define FINTEK_VENDOR_ID_1 0x1934
74#define FINTEK_VENDOR_ID_2 0x2C42
75#define FINTEK_DEVICE_ID 0x1202
76#define F81534_MAX_TX_SIZE 124
77#define F81534_MAX_RX_SIZE 124
78#define F81534_RECEIVE_BLOCK_SIZE 128
79#define F81534_MAX_RECEIVE_BLOCK_SIZE 512
80
81#define F81534_TOKEN_RECEIVE 0x01
82#define F81534_TOKEN_WRITE 0x02
83#define F81534_TOKEN_TX_EMPTY 0x03
84#define F81534_TOKEN_MSR_CHANGE 0x04
85
86/*
87 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
88 * idle if we performed any command.
89 *
90 * SPI Bus status register: F81534_BUS_REG_STATUS
91 * Bit 0/1 : BUSY
92 * Bit 2 : IDLE
93 */
94#define F81534_BUS_BUSY (BIT(0) | BIT(1))
95#define F81534_BUS_IDLE BIT(2)
96#define F81534_BUS_READ_DATA 0x1004
97#define F81534_BUS_REG_STATUS 0x1003
98#define F81534_BUS_REG_START 0x1002
99#define F81534_BUS_REG_END 0x1001
100
101#define F81534_CMD_READ 0x03
102
103#define F81534_DEFAULT_BAUD_RATE 9600
104
105#define F81534_PORT_CONF_RS232 0
106#define F81534_PORT_CONF_RS485 BIT(0)
107#define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
108#define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
109#define F81534_PORT_CONF_DISABLE_PORT BIT(3)
110#define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
111#define F81534_PORT_UNAVAILABLE \
112 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
113
114
115#define F81534_1X_RXTRIGGER 0xc3
116#define F81534_8X_RXTRIGGER 0xcf
117
118/*
119 * F81532/534 Clock registers (offset +08h)
120 *
121 * Bit0: UART Enable (always on)
122 * Bit2-1: Clock source selector
123 * 00: 1.846MHz.
124 * 01: 18.46MHz.
125 * 10: 24MHz.
126 * 11: 14.77MHz.
127 * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
128 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
129 */
130
131#define F81534_UART_EN BIT(0)
132#define F81534_CLK_1_846_MHZ 0
133#define F81534_CLK_18_46_MHZ BIT(1)
134#define F81534_CLK_24_MHZ BIT(2)
135#define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
136#define F81534_CLK_MASK GENMASK(2, 1)
137#define F81534_CLK_TX_DELAY_1BIT BIT(3)
138#define F81534_CLK_RS485_MODE BIT(4)
139#define F81534_CLK_RS485_INVERT BIT(5)
140
141static const struct usb_device_id f81534_id_table[] = {
142 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
143 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
144 {} /* Terminating entry */
145};
146
147#define F81534_TX_EMPTY_BIT 0
148
149struct f81534_serial_private {
150 u8 conf_data[F81534_DEF_CONF_SIZE];
151 int tty_idx[F81534_NUM_PORT];
152 u8 setting_idx;
153 int opened_port;
154 struct mutex urb_mutex;
155};
156
157struct f81534_port_private {
158 struct mutex mcr_mutex;
159 struct mutex lcr_mutex;
160 struct work_struct lsr_work;
161 struct usb_serial_port *port;
162 unsigned long tx_empty;
163 spinlock_t msr_lock;
164 u32 baud_base;
165 u8 shadow_mcr;
166 u8 shadow_lcr;
167 u8 shadow_msr;
168 u8 shadow_clk;
169 u8 phy_num;
170};
171
172struct f81534_pin_data {
173 const u16 reg_addr;
174 const u8 reg_mask;
175};
176
177struct f81534_port_out_pin {
178 struct f81534_pin_data pin[3];
179};
180
181/* Pin output value for M2/M1/M0(SD) */
182static const struct f81534_port_out_pin f81534_port_out_pins[] = {
183 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
184 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
185 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
186 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
187};
188
189static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
190static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
191 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
192
193static int f81534_logic_to_phy_port(struct usb_serial *serial,
194 struct usb_serial_port *port)
195{
196 struct f81534_serial_private *serial_priv =
197 usb_get_serial_data(port->serial);
198 int count = 0;
199 int i;
200
201 for (i = 0; i < F81534_NUM_PORT; ++i) {
202 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
203 continue;
204
205 if (port->port_number == count)
206 return i;
207
208 ++count;
209 }
210
211 return -ENODEV;
212}
213
214static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
215{
216 struct usb_interface *interface = serial->interface;
217 struct usb_device *dev = serial->dev;
218 size_t count = F81534_USB_MAX_RETRY;
219 int status;
220 u8 *tmp;
221
222 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
223 if (!tmp)
224 return -ENOMEM;
225
226 *tmp = data;
227
228 /*
229 * Our device maybe not reply when heavily loading, We'll retry for
230 * F81534_USB_MAX_RETRY times.
231 */
232 while (count--) {
233 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
234 F81534_SET_GET_REGISTER,
235 USB_TYPE_VENDOR | USB_DIR_OUT,
236 reg, 0, tmp, sizeof(u8),
237 F81534_USB_TIMEOUT);
238 if (status == sizeof(u8)) {
239 status = 0;
240 break;
241 }
242 }
243
244 if (status < 0) {
245 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
246 __func__, reg, data, status);
247 }
248
249 kfree(tmp);
250 return status;
251}
252
253static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
254{
255 struct usb_interface *interface = serial->interface;
256 struct usb_device *dev = serial->dev;
257 size_t count = F81534_USB_MAX_RETRY;
258 int status;
259 u8 *tmp;
260
261 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
262 if (!tmp)
263 return -ENOMEM;
264
265 /*
266 * Our device maybe not reply when heavily loading, We'll retry for
267 * F81534_USB_MAX_RETRY times.
268 */
269 while (count--) {
270 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
271 F81534_SET_GET_REGISTER,
272 USB_TYPE_VENDOR | USB_DIR_IN,
273 reg, 0, tmp, sizeof(u8),
274 F81534_USB_TIMEOUT);
275 if (status > 0) {
276 status = 0;
277 break;
278 } else if (status == 0) {
279 status = -EIO;
280 }
281 }
282
283 if (status < 0) {
284 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
285 reg, status);
286 goto end;
287 }
288
289 *data = *tmp;
290
291end:
292 kfree(tmp);
293 return status;
294}
295
296static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
297 u8 mask, u8 data)
298{
299 int status;
300 u8 tmp;
301
302 status = f81534_get_register(serial, reg, &tmp);
303 if (status)
304 return status;
305
306 tmp &= ~mask;
307 tmp |= (mask & data);
308
309 return f81534_set_register(serial, reg, tmp);
310}
311
312static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
313 u16 reg, u8 data)
314{
315 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
316 data);
317}
318
319static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
320 u16 reg, u8 *data)
321{
322 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
323 data);
324}
325
326static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
327 u8 data)
328{
329 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
330
331 return f81534_set_register(port->serial,
332 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
333}
334
335static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
336 u8 *data)
337{
338 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
339
340 return f81534_get_register(port->serial,
341 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
342}
343
344/*
345 * If we try to access the internal flash via SPI bus, we should check the bus
346 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
347 */
348static int f81534_wait_for_spi_idle(struct usb_serial *serial)
349{
350 size_t count = F81534_MAX_BUS_RETRY;
351 u8 tmp;
352 int status;
353
354 do {
355 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
356 &tmp);
357 if (status)
358 return status;
359
360 if (tmp & F81534_BUS_BUSY)
361 continue;
362
363 if (tmp & F81534_BUS_IDLE)
364 break;
365
366 } while (--count);
367
368 if (!count) {
369 dev_err(&serial->interface->dev,
370 "%s: timed out waiting for idle SPI bus\n",
371 __func__);
372 return -EIO;
373 }
374
375 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
376 tmp & ~F81534_BUS_IDLE);
377}
378
379static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
380 u8 *data)
381{
382 int status;
383
384 status = f81534_get_register(serial, reg, data);
385 if (status)
386 return status;
387
388 return f81534_wait_for_spi_idle(serial);
389}
390
391static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
392{
393 int status;
394
395 status = f81534_set_register(serial, reg, data);
396 if (status)
397 return status;
398
399 return f81534_wait_for_spi_idle(serial);
400}
401
402static int f81534_read_flash(struct usb_serial *serial, u32 address,
403 size_t size, u8 *buf)
404{
405 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
406 size_t block = 0;
407 size_t read_size;
408 size_t count;
409 int status;
410 int offset;
411 u16 reg_tmp;
412
413 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
414 F81534_CMD_READ);
415 if (status)
416 return status;
417
418 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
419 (address >> 16) & 0xff);
420 if (status)
421 return status;
422
423 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
424 (address >> 8) & 0xff);
425 if (status)
426 return status;
427
428 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
429 (address >> 0) & 0xff);
430 if (status)
431 return status;
432
433 /* Continuous read mode */
434 do {
435 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
436
437 for (count = 0; count < read_size; ++count) {
438 /* To write F81534_BUS_REG_END when final byte */
439 if (size <= F81534_MAX_DATA_BLOCK &&
440 read_size == count + 1)
441 reg_tmp = F81534_BUS_REG_END;
442 else
443 reg_tmp = F81534_BUS_REG_START;
444
445 /*
446 * Dummy code, force IC to generate a read pulse, the
447 * set of value 0xf1 is dont care (any value is ok)
448 */
449 status = f81534_set_spi_register(serial, reg_tmp,
450 0xf1);
451 if (status)
452 return status;
453
454 status = f81534_get_spi_register(serial,
455 F81534_BUS_READ_DATA,
456 &tmp_buf[count]);
457 if (status)
458 return status;
459
460 offset = count + block * F81534_MAX_DATA_BLOCK;
461 buf[offset] = tmp_buf[count];
462 }
463
464 size -= read_size;
465 ++block;
466 } while (size);
467
468 return 0;
469}
470
471static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
472{
473 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
474 int phy_num = port_priv->phy_num;
475 u8 tx_len;
476 int i;
477
478 /*
479 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
480 * index 0: port phy idx (e.g., 0,1,2,3)
481 * index 1: only F81534_TOKEN_WRITE
482 * index 2: serial TX out length
483 * index 3: fix to 0
484 * index 4~127: serial out data block
485 */
486 for (i = 0; i < F81534_NUM_PORT; ++i) {
487 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
488 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
489 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
490 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
491 }
492
493 tx_len = kfifo_out_locked(&port->write_fifo,
494 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
495 F81534_MAX_TX_SIZE, &port->lock);
496
497 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
498}
499
500static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
501{
502 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
503 struct urb *urb;
504 unsigned long flags;
505 int result;
506
507 /* Check is any data in write_fifo */
508 spin_lock_irqsave(&port->lock, flags);
509
510 if (kfifo_is_empty(&port->write_fifo)) {
511 spin_unlock_irqrestore(&port->lock, flags);
512 return 0;
513 }
514
515 spin_unlock_irqrestore(&port->lock, flags);
516
517 /* Check H/W is TXEMPTY */
518 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
519 return 0;
520
521 urb = port->write_urbs[0];
522 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
523 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
524
525 result = usb_submit_urb(urb, mem_flags);
526 if (result) {
527 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
528 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
529 result);
530 return result;
531 }
532
533 usb_serial_port_softint(port);
534 return 0;
535}
536
537static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
538{
539 if (!baudrate)
540 return 0;
541
542 /* Round to nearest divisor */
543 return DIV_ROUND_CLOSEST(clockrate, baudrate);
544}
545
546static int f81534_find_clk(u32 baudrate)
547{
548 int idx;
549
550 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
551 if (baudrate <= baudrate_table[idx] &&
552 baudrate_table[idx] % baudrate == 0)
553 return idx;
554 }
555
556 return -EINVAL;
557}
558
559static int f81534_set_port_config(struct usb_serial_port *port,
560 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
561{
562 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
563 u32 divisor;
564 int status;
565 int i;
566 int idx;
567 u8 value;
568 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
569
570 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
571 idx = f81534_find_clk(baud_list[i]);
572 if (idx >= 0) {
573 baudrate = baud_list[i];
574 tty_encode_baud_rate(tty, baudrate, baudrate);
575 break;
576 }
577 }
578
579 if (idx < 0)
580 return -EINVAL;
581
582 port_priv->baud_base = baudrate_table[idx];
583 port_priv->shadow_clk &= ~F81534_CLK_MASK;
584 port_priv->shadow_clk |= clock_table[idx];
585
586 status = f81534_set_port_register(port, F81534_CLOCK_REG,
587 port_priv->shadow_clk);
588 if (status) {
589 dev_err(&port->dev, "CLOCK_REG setting failed\n");
590 return status;
591 }
592
593 if (baudrate <= 1200)
594 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
595 else
596 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
597
598 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
599 if (status) {
600 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
601 return status;
602 }
603
604 if (baudrate <= 1200)
605 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
606 else
607 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
608
609 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
610 value);
611 if (status) {
612 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
613 return status;
614 }
615
616 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
617
618 mutex_lock(&port_priv->lcr_mutex);
619
620 value = UART_LCR_DLAB;
621 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
622 value);
623 if (status) {
624 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
625 goto out_unlock;
626 }
627
628 value = divisor & 0xff;
629 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
630 if (status) {
631 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
632 goto out_unlock;
633 }
634
635 value = (divisor >> 8) & 0xff;
636 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
637 if (status) {
638 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
639 goto out_unlock;
640 }
641
642 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
643 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
644 value);
645 if (status) {
646 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
647 goto out_unlock;
648 }
649
650 port_priv->shadow_lcr = value;
651out_unlock:
652 mutex_unlock(&port_priv->lcr_mutex);
653
654 return status;
655}
656
657static void f81534_break_ctl(struct tty_struct *tty, int break_state)
658{
659 struct usb_serial_port *port = tty->driver_data;
660 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
661 int status;
662
663 mutex_lock(&port_priv->lcr_mutex);
664
665 if (break_state)
666 port_priv->shadow_lcr |= UART_LCR_SBC;
667 else
668 port_priv->shadow_lcr &= ~UART_LCR_SBC;
669
670 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
671 port_priv->shadow_lcr);
672 if (status)
673 dev_err(&port->dev, "set break failed: %d\n", status);
674
675 mutex_unlock(&port_priv->lcr_mutex);
676}
677
678static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
679 unsigned int clear)
680{
681 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
682 int status;
683 u8 tmp;
684
685 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
686 return 0; /* no change */
687
688 mutex_lock(&port_priv->mcr_mutex);
689
690 /* 'Set' takes precedence over 'Clear' */
691 clear &= ~set;
692
693 /* Always enable UART_MCR_OUT2 */
694 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
695
696 if (clear & TIOCM_DTR)
697 tmp &= ~UART_MCR_DTR;
698
699 if (clear & TIOCM_RTS)
700 tmp &= ~UART_MCR_RTS;
701
702 if (set & TIOCM_DTR)
703 tmp |= UART_MCR_DTR;
704
705 if (set & TIOCM_RTS)
706 tmp |= UART_MCR_RTS;
707
708 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
709 if (status < 0) {
710 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
711 mutex_unlock(&port_priv->mcr_mutex);
712 return status;
713 }
714
715 port_priv->shadow_mcr = tmp;
716 mutex_unlock(&port_priv->mcr_mutex);
717 return 0;
718}
719
720/*
721 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
722 * for latest configuration index. If nothing found
723 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
724 * F81534_DEF_CONF_ADDRESS_START section.
725 *
726 * Due to we only use block0 to save data, so *index should be 0 or
727 * F81534_CUSTOM_NO_CUSTOM_DATA.
728 */
729static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
730{
731 u8 tmp;
732 int status;
733
734 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
735 &tmp);
736 if (status) {
737 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
738 __func__, status);
739 return status;
740 }
741
742 /* We'll use the custom data when the data is valid. */
743 if (tmp == F81534_CUSTOM_VALID_TOKEN)
744 *index = 0;
745 else
746 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
747
748 return 0;
749}
750
751/*
752 * The F81532/534 will not report serial port to USB serial subsystem when
753 * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
754 *
755 * To detect RX pin status, we'll enable MCR interal loopback, disable it and
756 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
757 */
758static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
759{
760 int status;
761 u8 old_mcr;
762 u8 msr;
763 u8 lsr;
764 u8 msr_mask;
765
766 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
767
768 status = f81534_get_phy_port_register(serial, phy,
769 F81534_MODEM_STATUS_REG, &msr);
770 if (status)
771 return false;
772
773 if ((msr & msr_mask) != msr_mask)
774 return false;
775
776 status = f81534_set_phy_port_register(serial, phy,
777 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
778 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
779 if (status)
780 return false;
781
782 status = f81534_get_phy_port_register(serial, phy,
783 F81534_MODEM_CONTROL_REG, &old_mcr);
784 if (status)
785 return false;
786
787 status = f81534_set_phy_port_register(serial, phy,
788 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
789 if (status)
790 return false;
791
792 status = f81534_set_phy_port_register(serial, phy,
793 F81534_MODEM_CONTROL_REG, 0x0);
794 if (status)
795 return false;
796
797 msleep(60);
798
799 status = f81534_get_phy_port_register(serial, phy,
800 F81534_LINE_STATUS_REG, &lsr);
801 if (status)
802 return false;
803
804 status = f81534_set_phy_port_register(serial, phy,
805 F81534_MODEM_CONTROL_REG, old_mcr);
806 if (status)
807 return false;
808
809 if ((lsr & UART_LSR_BI) == UART_LSR_BI)
810 return true;
811
812 return false;
813}
814
815/*
816 * We had 2 generation of F81532/534 IC. All has an internal storage.
817 *
818 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
819 * internal data will used. All mode and gpio control should manually set
820 * by AP or Driver and all storage space value are 0xff. The
821 * f81534_calc_num_ports() will run to final we marked as "oldest version"
822 * for this IC.
823 *
824 * 2rd is designed to more generic to use any transceiver and this is our
825 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
826 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
827 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
828 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
829 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
830 * The f81534_calc_num_ports() will run to "new style" with checking
831 * F81534_PORT_UNAVAILABLE section.
832 */
833static int f81534_calc_num_ports(struct usb_serial *serial,
834 struct usb_serial_endpoints *epds)
835{
836 struct f81534_serial_private *serial_priv;
837 struct device *dev = &serial->interface->dev;
838 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
839 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
840 u8 num_port = 0;
841 int index = 0;
842 int status;
843 int i;
844
845 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
846 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
847 dev_err(dev, "unsupported endpoint max packet size\n");
848 return -ENODEV;
849 }
850
851 serial_priv = devm_kzalloc(&serial->interface->dev,
852 sizeof(*serial_priv), GFP_KERNEL);
853 if (!serial_priv)
854 return -ENOMEM;
855
856 usb_set_serial_data(serial, serial_priv);
857 mutex_init(&serial_priv->urb_mutex);
858
859 /* Check had custom setting */
860 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
861 if (status) {
862 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
863 __func__, status);
864 return status;
865 }
866
867 /*
868 * We'll read custom data only when data available, otherwise we'll
869 * read default value instead.
870 */
871 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
872 status = f81534_read_flash(serial,
873 F81534_CUSTOM_ADDRESS_START +
874 F81534_CONF_OFFSET,
875 sizeof(serial_priv->conf_data),
876 serial_priv->conf_data);
877 if (status) {
878 dev_err(&serial->interface->dev,
879 "%s: get custom data failed: %d\n",
880 __func__, status);
881 return status;
882 }
883
884 dev_dbg(&serial->interface->dev,
885 "%s: read config from block: %d\n", __func__,
886 serial_priv->setting_idx);
887 } else {
888 /* Read default board setting */
889 status = f81534_read_flash(serial,
890 F81534_DEF_CONF_ADDRESS_START,
891 sizeof(serial_priv->conf_data),
892 serial_priv->conf_data);
893 if (status) {
894 dev_err(&serial->interface->dev,
895 "%s: read failed: %d\n", __func__,
896 status);
897 return status;
898 }
899
900 dev_dbg(&serial->interface->dev, "%s: read default config\n",
901 __func__);
902 }
903
904 /* New style, find all possible ports */
905 for (i = 0; i < F81534_NUM_PORT; ++i) {
906 if (f81534_check_port_hw_disabled(serial, i))
907 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
908
909 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
910 continue;
911
912 ++num_port;
913 }
914
915 if (!num_port) {
916 dev_warn(&serial->interface->dev,
917 "no config found, assuming 4 ports\n");
918 num_port = 4; /* Nothing found, oldest version IC */
919 }
920
921 /* Assign phy-to-logic mapping */
922 for (i = 0; i < F81534_NUM_PORT; ++i) {
923 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
924 continue;
925
926 serial_priv->tty_idx[i] = index++;
927 dev_dbg(&serial->interface->dev,
928 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
929 serial_priv->tty_idx[i]);
930 }
931
932 /*
933 * Setup bulk-out endpoint multiplexing. All ports share the same
934 * bulk-out endpoint.
935 */
936 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
937
938 for (i = 1; i < num_port; ++i)
939 epds->bulk_out[i] = epds->bulk_out[0];
940
941 epds->num_bulk_out = num_port;
942
943 return num_port;
944}
945
946static void f81534_set_termios(struct tty_struct *tty,
947 struct usb_serial_port *port,
948 struct ktermios *old_termios)
949{
950 u8 new_lcr = 0;
951 int status;
952 u32 baud;
953 u32 old_baud;
954
955 if (C_BAUD(tty) == B0)
956 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
957 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
958 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
959
960 if (C_PARENB(tty)) {
961 new_lcr |= UART_LCR_PARITY;
962
963 if (!C_PARODD(tty))
964 new_lcr |= UART_LCR_EPAR;
965
966 if (C_CMSPAR(tty))
967 new_lcr |= UART_LCR_SPAR;
968 }
969
970 if (C_CSTOPB(tty))
971 new_lcr |= UART_LCR_STOP;
972
973 switch (C_CSIZE(tty)) {
974 case CS5:
975 new_lcr |= UART_LCR_WLEN5;
976 break;
977 case CS6:
978 new_lcr |= UART_LCR_WLEN6;
979 break;
980 case CS7:
981 new_lcr |= UART_LCR_WLEN7;
982 break;
983 default:
984 case CS8:
985 new_lcr |= UART_LCR_WLEN8;
986 break;
987 }
988
989 baud = tty_get_baud_rate(tty);
990 if (!baud)
991 return;
992
993 if (old_termios)
994 old_baud = tty_termios_baud_rate(old_termios);
995 else
996 old_baud = F81534_DEFAULT_BAUD_RATE;
997
998 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
999
1000 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
1001 if (status < 0) {
1002 dev_err(&port->dev, "%s: set port config failed: %d\n",
1003 __func__, status);
1004 }
1005}
1006
1007static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
1008{
1009 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
1010}
1011
1012static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
1013{
1014 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1015 struct tty_struct *tty;
1016 unsigned long flags;
1017 u8 old_msr;
1018
1019 if (!(msr & UART_MSR_ANY_DELTA))
1020 return;
1021
1022 spin_lock_irqsave(&port_priv->msr_lock, flags);
1023 old_msr = port_priv->shadow_msr;
1024 port_priv->shadow_msr = msr;
1025 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1026
1027 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
1028 msr);
1029
1030 /* Update input line counters */
1031 if (msr & UART_MSR_DCTS)
1032 port->icount.cts++;
1033 if (msr & UART_MSR_DDSR)
1034 port->icount.dsr++;
1035 if (msr & UART_MSR_DDCD)
1036 port->icount.dcd++;
1037 if (msr & UART_MSR_TERI)
1038 port->icount.rng++;
1039
1040 wake_up_interruptible(&port->port.delta_msr_wait);
1041
1042 if (!(msr & UART_MSR_DDCD))
1043 return;
1044
1045 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
1046 __func__, port_priv->phy_num, old_msr, msr);
1047
1048 tty = tty_port_tty_get(&port->port);
1049 if (!tty)
1050 return;
1051
1052 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
1053 tty_kref_put(tty);
1054}
1055
1056static int f81534_read_msr(struct usb_serial_port *port)
1057{
1058 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1059 unsigned long flags;
1060 int status;
1061 u8 msr;
1062
1063 /* Get MSR initial value */
1064 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1065 if (status)
1066 return status;
1067
1068 /* Force update current state */
1069 spin_lock_irqsave(&port_priv->msr_lock, flags);
1070 port_priv->shadow_msr = msr;
1071 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1072
1073 return 0;
1074}
1075
1076static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
1077{
1078 struct f81534_serial_private *serial_priv =
1079 usb_get_serial_data(port->serial);
1080 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1081 int status;
1082
1083 status = f81534_set_port_register(port,
1084 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
1085 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1086 if (status) {
1087 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
1088 status);
1089 return status;
1090 }
1091
1092 if (tty)
1093 f81534_set_termios(tty, port, NULL);
1094
1095 status = f81534_read_msr(port);
1096 if (status)
1097 return status;
1098
1099 mutex_lock(&serial_priv->urb_mutex);
1100
1101 /* Submit Read URBs for first port opened */
1102 if (!serial_priv->opened_port) {
1103 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
1104 if (status)
1105 goto exit;
1106 }
1107
1108 serial_priv->opened_port++;
1109
1110exit:
1111 mutex_unlock(&serial_priv->urb_mutex);
1112
1113 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1114 return status;
1115}
1116
1117static void f81534_close(struct usb_serial_port *port)
1118{
1119 struct f81534_serial_private *serial_priv =
1120 usb_get_serial_data(port->serial);
1121 struct usb_serial_port *port0 = port->serial->port[0];
1122 unsigned long flags;
1123 size_t i;
1124
1125 usb_kill_urb(port->write_urbs[0]);
1126
1127 spin_lock_irqsave(&port->lock, flags);
1128 kfifo_reset_out(&port->write_fifo);
1129 spin_unlock_irqrestore(&port->lock, flags);
1130
1131 /* Kill Read URBs when final port closed */
1132 mutex_lock(&serial_priv->urb_mutex);
1133 serial_priv->opened_port--;
1134
1135 if (!serial_priv->opened_port) {
1136 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
1137 usb_kill_urb(port0->read_urbs[i]);
1138 }
1139
1140 mutex_unlock(&serial_priv->urb_mutex);
1141}
1142
1143static void f81534_get_serial_info(struct tty_struct *tty, struct serial_struct *ss)
1144{
1145 struct usb_serial_port *port = tty->driver_data;
1146 struct f81534_port_private *port_priv;
1147
1148 port_priv = usb_get_serial_port_data(port);
1149
1150 ss->baud_base = port_priv->baud_base;
1151}
1152
1153static void f81534_process_per_serial_block(struct usb_serial_port *port,
1154 u8 *data)
1155{
1156 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1157 int phy_num = data[0];
1158 size_t read_size = 0;
1159 size_t i;
1160 char tty_flag;
1161 int status;
1162 u8 lsr;
1163
1164 /*
1165 * The block layout is 128 Bytes
1166 * index 0: port phy idx (e.g., 0,1,2,3),
1167 * index 1: It's could be
1168 * F81534_TOKEN_RECEIVE
1169 * F81534_TOKEN_TX_EMPTY
1170 * F81534_TOKEN_MSR_CHANGE
1171 * index 2: serial in size (data+lsr, must be even)
1172 * meaningful for F81534_TOKEN_RECEIVE only
1173 * index 3: current MSR with this device
1174 * index 4~127: serial in data block (data+lsr, must be even)
1175 */
1176 switch (data[1]) {
1177 case F81534_TOKEN_TX_EMPTY:
1178 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1179
1180 /* Try to submit writer */
1181 status = f81534_submit_writer(port, GFP_ATOMIC);
1182 if (status)
1183 dev_err(&port->dev, "%s: submit failed\n", __func__);
1184 return;
1185
1186 case F81534_TOKEN_MSR_CHANGE:
1187 f81534_msr_changed(port, data[3]);
1188 return;
1189
1190 case F81534_TOKEN_RECEIVE:
1191 read_size = data[2];
1192 if (read_size > F81534_MAX_RX_SIZE) {
1193 dev_err(&port->dev,
1194 "%s: phy: %d read_size: %zu larger than: %d\n",
1195 __func__, phy_num, read_size,
1196 F81534_MAX_RX_SIZE);
1197 return;
1198 }
1199
1200 break;
1201
1202 default:
1203 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
1204 data[1]);
1205 return;
1206 }
1207
1208 for (i = 4; i < 4 + read_size; i += 2) {
1209 tty_flag = TTY_NORMAL;
1210 lsr = data[i + 1];
1211
1212 if (lsr & UART_LSR_BRK_ERROR_BITS) {
1213 if (lsr & UART_LSR_BI) {
1214 tty_flag = TTY_BREAK;
1215 port->icount.brk++;
1216 usb_serial_handle_break(port);
1217 } else if (lsr & UART_LSR_PE) {
1218 tty_flag = TTY_PARITY;
1219 port->icount.parity++;
1220 } else if (lsr & UART_LSR_FE) {
1221 tty_flag = TTY_FRAME;
1222 port->icount.frame++;
1223 }
1224
1225 if (lsr & UART_LSR_OE) {
1226 port->icount.overrun++;
1227 tty_insert_flip_char(&port->port, 0,
1228 TTY_OVERRUN);
1229 }
1230
1231 schedule_work(&port_priv->lsr_work);
1232 }
1233
1234 if (port->sysrq) {
1235 if (usb_serial_handle_sysrq_char(port, data[i]))
1236 continue;
1237 }
1238
1239 tty_insert_flip_char(&port->port, data[i], tty_flag);
1240 }
1241
1242 tty_flip_buffer_push(&port->port);
1243}
1244
1245static void f81534_process_read_urb(struct urb *urb)
1246{
1247 struct f81534_serial_private *serial_priv;
1248 struct usb_serial_port *port;
1249 struct usb_serial *serial;
1250 u8 *buf;
1251 int phy_port_num;
1252 int tty_port_num;
1253 size_t i;
1254
1255 if (!urb->actual_length ||
1256 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1257 return;
1258 }
1259
1260 port = urb->context;
1261 serial = port->serial;
1262 buf = urb->transfer_buffer;
1263 serial_priv = usb_get_serial_data(serial);
1264
1265 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1266 phy_port_num = buf[i];
1267 if (phy_port_num >= F81534_NUM_PORT) {
1268 dev_err(&port->dev,
1269 "%s: phy_port_num: %d larger than: %d\n",
1270 __func__, phy_port_num, F81534_NUM_PORT);
1271 continue;
1272 }
1273
1274 tty_port_num = serial_priv->tty_idx[phy_port_num];
1275 port = serial->port[tty_port_num];
1276
1277 if (tty_port_initialized(&port->port))
1278 f81534_process_per_serial_block(port, &buf[i]);
1279 }
1280}
1281
1282static void f81534_write_usb_callback(struct urb *urb)
1283{
1284 struct usb_serial_port *port = urb->context;
1285
1286 switch (urb->status) {
1287 case 0:
1288 break;
1289 case -ENOENT:
1290 case -ECONNRESET:
1291 case -ESHUTDOWN:
1292 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1293 __func__, urb->status);
1294 return;
1295 case -EPIPE:
1296 dev_err(&port->dev, "%s - urb stopped: %d\n",
1297 __func__, urb->status);
1298 return;
1299 default:
1300 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1301 __func__, urb->status);
1302 break;
1303 }
1304}
1305
1306static void f81534_lsr_worker(struct work_struct *work)
1307{
1308 struct f81534_port_private *port_priv;
1309 struct usb_serial_port *port;
1310 int status;
1311 u8 tmp;
1312
1313 port_priv = container_of(work, struct f81534_port_private, lsr_work);
1314 port = port_priv->port;
1315
1316 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
1317 if (status)
1318 dev_warn(&port->dev, "read LSR failed: %d\n", status);
1319}
1320
1321static int f81534_set_port_output_pin(struct usb_serial_port *port)
1322{
1323 struct f81534_serial_private *serial_priv;
1324 struct f81534_port_private *port_priv;
1325 struct usb_serial *serial;
1326 const struct f81534_port_out_pin *pins;
1327 int status;
1328 int i;
1329 u8 value;
1330 u8 idx;
1331
1332 serial = port->serial;
1333 serial_priv = usb_get_serial_data(serial);
1334 port_priv = usb_get_serial_port_data(port);
1335
1336 idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num;
1337 value = serial_priv->conf_data[idx];
1338 if (value >= F81534_CONF_GPIO_SHUTDOWN) {
1339 /*
1340 * Newer IC configure will make transceiver in shutdown mode on
1341 * initial power on. We need enable it before using UARTs.
1342 */
1343 idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num;
1344 value = serial_priv->conf_data[idx];
1345 if (value >= F81534_CONF_GPIO_SHUTDOWN)
1346 value = F81534_CONF_GPIO_RS232;
1347 }
1348
1349 pins = &f81534_port_out_pins[port_priv->phy_num];
1350
1351 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
1352 status = f81534_set_mask_register(serial,
1353 pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1354 value & BIT(i) ? pins->pin[i].reg_mask : 0);
1355 if (status)
1356 return status;
1357 }
1358
1359 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
1360 return 0;
1361}
1362
1363static int f81534_port_probe(struct usb_serial_port *port)
1364{
1365 struct f81534_serial_private *serial_priv;
1366 struct f81534_port_private *port_priv;
1367 int ret;
1368 u8 value;
1369
1370 serial_priv = usb_get_serial_data(port->serial);
1371 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1372 if (!port_priv)
1373 return -ENOMEM;
1374
1375 /*
1376 * We'll make tx frame error when baud rate from 384~500kps. So we'll
1377 * delay all tx data frame with 1bit.
1378 */
1379 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
1380 spin_lock_init(&port_priv->msr_lock);
1381 mutex_init(&port_priv->mcr_mutex);
1382 mutex_init(&port_priv->lcr_mutex);
1383 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
1384
1385 /* Assign logic-to-phy mapping */
1386 ret = f81534_logic_to_phy_port(port->serial, port);
1387 if (ret < 0)
1388 return ret;
1389
1390 port_priv->phy_num = ret;
1391 port_priv->port = port;
1392 usb_set_serial_port_data(port, port_priv);
1393 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1394 port->port_number, port_priv->phy_num);
1395
1396 /*
1397 * The F81532/534 will hang-up when enable LSR interrupt in IER and
1398 * occur data overrun. So we'll disable the LSR interrupt in probe()
1399 * and submit the LSR worker to clear LSR state when reported LSR error
1400 * bit with bulk-in data in f81534_process_per_serial_block().
1401 */
1402 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
1403 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
1404 if (ret)
1405 return ret;
1406
1407 value = serial_priv->conf_data[port_priv->phy_num];
1408 switch (value & F81534_PORT_CONF_MODE_MASK) {
1409 case F81534_PORT_CONF_RS485_INVERT:
1410 port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
1411 F81534_CLK_RS485_INVERT;
1412 dev_dbg(&port->dev, "RS485 invert mode\n");
1413 break;
1414 case F81534_PORT_CONF_RS485:
1415 port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
1416 dev_dbg(&port->dev, "RS485 mode\n");
1417 break;
1418
1419 default:
1420 case F81534_PORT_CONF_RS232:
1421 dev_dbg(&port->dev, "RS232 mode\n");
1422 break;
1423 }
1424
1425 return f81534_set_port_output_pin(port);
1426}
1427
1428static void f81534_port_remove(struct usb_serial_port *port)
1429{
1430 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1431
1432 flush_work(&port_priv->lsr_work);
1433}
1434
1435static int f81534_tiocmget(struct tty_struct *tty)
1436{
1437 struct usb_serial_port *port = tty->driver_data;
1438 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1439 int status;
1440 int r;
1441 u8 msr;
1442 u8 mcr;
1443
1444 /* Read current MSR from device */
1445 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1446 if (status)
1447 return status;
1448
1449 mutex_lock(&port_priv->mcr_mutex);
1450 mcr = port_priv->shadow_mcr;
1451 mutex_unlock(&port_priv->mcr_mutex);
1452
1453 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1454 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1455 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1456 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1457 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1458 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1459
1460 return r;
1461}
1462
1463static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1464 unsigned int clear)
1465{
1466 struct usb_serial_port *port = tty->driver_data;
1467
1468 return f81534_update_mctrl(port, set, clear);
1469}
1470
1471static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1472{
1473 if (on)
1474 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1475 else
1476 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1477}
1478
1479static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1480 const u8 *buf, int count)
1481{
1482 int bytes_out, status;
1483
1484 if (!count)
1485 return 0;
1486
1487 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1488 &port->lock);
1489
1490 status = f81534_submit_writer(port, GFP_ATOMIC);
1491 if (status) {
1492 dev_err(&port->dev, "%s: submit failed\n", __func__);
1493 return status;
1494 }
1495
1496 return bytes_out;
1497}
1498
1499static bool f81534_tx_empty(struct usb_serial_port *port)
1500{
1501 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1502
1503 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1504}
1505
1506static int f81534_resume(struct usb_serial *serial)
1507{
1508 struct f81534_serial_private *serial_priv =
1509 usb_get_serial_data(serial);
1510 struct usb_serial_port *port;
1511 int error = 0;
1512 int status;
1513 size_t i;
1514
1515 /*
1516 * We'll register port 0 bulkin when port had opened, It'll take all
1517 * port received data, MSR register change and TX_EMPTY information.
1518 */
1519 mutex_lock(&serial_priv->urb_mutex);
1520
1521 if (serial_priv->opened_port) {
1522 status = f81534_submit_read_urb(serial, GFP_NOIO);
1523 if (status) {
1524 mutex_unlock(&serial_priv->urb_mutex);
1525 return status;
1526 }
1527 }
1528
1529 mutex_unlock(&serial_priv->urb_mutex);
1530
1531 for (i = 0; i < serial->num_ports; i++) {
1532 port = serial->port[i];
1533 if (!tty_port_initialized(&port->port))
1534 continue;
1535
1536 status = f81534_submit_writer(port, GFP_NOIO);
1537 if (status) {
1538 dev_err(&port->dev, "%s: submit failed\n", __func__);
1539 ++error;
1540 }
1541 }
1542
1543 if (error)
1544 return -EIO;
1545
1546 return 0;
1547}
1548
1549static struct usb_serial_driver f81534_device = {
1550 .driver = {
1551 .owner = THIS_MODULE,
1552 .name = "f81534",
1553 },
1554 .description = DRIVER_DESC,
1555 .id_table = f81534_id_table,
1556 .num_bulk_in = 1,
1557 .num_bulk_out = 1,
1558 .open = f81534_open,
1559 .close = f81534_close,
1560 .write = f81534_write,
1561 .tx_empty = f81534_tx_empty,
1562 .calc_num_ports = f81534_calc_num_ports,
1563 .port_probe = f81534_port_probe,
1564 .port_remove = f81534_port_remove,
1565 .break_ctl = f81534_break_ctl,
1566 .dtr_rts = f81534_dtr_rts,
1567 .process_read_urb = f81534_process_read_urb,
1568 .get_serial = f81534_get_serial_info,
1569 .tiocmget = f81534_tiocmget,
1570 .tiocmset = f81534_tiocmset,
1571 .write_bulk_callback = f81534_write_usb_callback,
1572 .set_termios = f81534_set_termios,
1573 .resume = f81534_resume,
1574};
1575
1576static struct usb_serial_driver *const serial_drivers[] = {
1577 &f81534_device, NULL
1578};
1579
1580module_usb_serial_driver(serial_drivers, f81534_id_table);
1581
1582MODULE_DEVICE_TABLE(usb, f81534_id_table);
1583MODULE_DESCRIPTION(DRIVER_DESC);
1584MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1585MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1586MODULE_LICENSE("GPL");