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v3.1
 
  1/*
  2 * OHCI HCD (Host Controller Driver) for USB.
  3 *
  4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5 * (C) Copyright 2000-2005 David Brownell
  6 * (C) Copyright 2002 Hewlett-Packard Company
  7 *
  8 * OMAP Bus Glue
  9 *
 10 * Modified for OMAP by Tony Lindgren <tony@atomide.com>
 11 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
 12 * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
 13 *
 14 * This file is licenced under the GPL.
 15 */
 16
 17#include <linux/signal.h>	/* IRQF_DISABLED */
 
 
 
 
 18#include <linux/jiffies.h>
 
 
 
 19#include <linux/platform_device.h>
 20#include <linux/clk.h>
 21#include <linux/gpio.h>
 
 
 
 22
 23#include <mach/hardware.h>
 24#include <asm/io.h>
 25#include <asm/mach-types.h>
 26
 27#include <plat/mux.h>
 28#include <mach/irqs.h>
 29#include <plat/fpga.h>
 30#include <plat/usb.h>
 31
 32
 33/* OMAP-1510 OHCI has its own MMU for DMA */
 34#define OMAP1510_LB_MEMSIZE	32	/* Should be same as SDRAM size */
 35#define OMAP1510_LB_CLOCK_DIV	0xfffec10c
 36#define OMAP1510_LB_MMU_CTL	0xfffec208
 37#define OMAP1510_LB_MMU_LCK	0xfffec224
 38#define OMAP1510_LB_MMU_LD_TLB	0xfffec228
 39#define OMAP1510_LB_MMU_CAM_H	0xfffec22c
 40#define OMAP1510_LB_MMU_CAM_L	0xfffec230
 41#define OMAP1510_LB_MMU_RAM_H	0xfffec234
 42#define OMAP1510_LB_MMU_RAM_L	0xfffec238
 43
 
 44
 45#ifndef CONFIG_ARCH_OMAP
 46#error "This file is OMAP bus glue.  CONFIG_OMAP must be defined."
 47#endif
 48
 49#ifdef CONFIG_TPS65010
 50#include <linux/i2c/tps65010.h>
 51#else
 52
 53#define LOW	0
 54#define HIGH	1
 55
 56#define GPIO1	1
 57
 58static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
 59{
 60	return 0;
 61}
 62
 63#endif
 64
 65extern int usb_disabled(void);
 66extern int ocpi_enable(void);
 67
 68static struct clk *usb_host_ck;
 69static struct clk *usb_dc_ck;
 70static int host_enabled;
 71static int host_initialized;
 72
 73static void omap_ohci_clock_power(int on)
 74{
 75	if (on) {
 76		clk_enable(usb_dc_ck);
 77		clk_enable(usb_host_ck);
 78		/* guesstimate for T5 == 1x 32K clock + APLL lock time */
 79		udelay(100);
 80	} else {
 81		clk_disable(usb_host_ck);
 82		clk_disable(usb_dc_ck);
 83	}
 84}
 85
 86/*
 87 * Board specific gang-switched transceiver power on/off.
 88 * NOTE:  OSK supplies power from DC, not battery.
 89 */
 90static int omap_ohci_transceiver_power(int on)
 91{
 92	if (on) {
 93		if (machine_is_omap_innovator() && cpu_is_omap1510())
 94			fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
 95				| ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
 96			       INNOVATOR_FPGA_CAM_USB_CONTROL);
 97		else if (machine_is_omap_osk())
 98			tps65010_set_gpio_out_value(GPIO1, LOW);
 99	} else {
100		if (machine_is_omap_innovator() && cpu_is_omap1510())
101			fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
102				& ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
103			       INNOVATOR_FPGA_CAM_USB_CONTROL);
104		else if (machine_is_omap_osk())
105			tps65010_set_gpio_out_value(GPIO1, HIGH);
106	}
107
108	return 0;
109}
110
111#ifdef CONFIG_ARCH_OMAP15XX
112/*
113 * OMAP-1510 specific Local Bus clock on/off
114 */
115static int omap_1510_local_bus_power(int on)
116{
117	if (on) {
118		omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
119		udelay(200);
120	} else {
121		omap_writel(0, OMAP1510_LB_MMU_CTL);
122	}
123
124	return 0;
125}
126
127/*
128 * OMAP-1510 specific Local Bus initialization
129 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
130 *       See also arch/mach-omap/memory.h for __virt_to_dma() and
131 *       __dma_to_virt() which need to match with the physical
132 *       Local Bus address below.
133 */
134static int omap_1510_local_bus_init(void)
135{
136	unsigned int tlb;
137	unsigned long lbaddr, physaddr;
138
139	omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
140	       OMAP1510_LB_CLOCK_DIV);
141
142	/* Configure the Local Bus MMU table */
143	for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
144		lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
145		physaddr = tlb * 0x00100000 + PHYS_OFFSET;
146		omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
147		omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
148		       OMAP1510_LB_MMU_CAM_L);
149		omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
150		omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
151		omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
152		omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
153	}
154
155	/* Enable the walking table */
156	omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
157	udelay(200);
158
159	return 0;
160}
161#else
162#define omap_1510_local_bus_power(x)	{}
163#define omap_1510_local_bus_init()	{}
164#endif
165
166#ifdef	CONFIG_USB_OTG
167
168static void start_hnp(struct ohci_hcd *ohci)
169{
170	const unsigned	port = ohci_to_hcd(ohci)->self.otg_port - 1;
 
171	unsigned long	flags;
172	u32 l;
173
174	otg_start_hnp(ohci->transceiver);
175
176	local_irq_save(flags);
177	ohci->transceiver->state = OTG_STATE_A_SUSPEND;
178	writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
179	l = omap_readl(OTG_CTRL);
180	l &= ~OTG_A_BUSREQ;
181	omap_writel(l, OTG_CTRL);
182	local_irq_restore(flags);
183}
184
185#endif
186
187/*-------------------------------------------------------------------------*/
188
189static int ohci_omap_init(struct usb_hcd *hcd)
190{
191	struct ohci_hcd		*ohci = hcd_to_ohci(hcd);
192	struct omap_usb_config	*config = hcd->self.controller->platform_data;
 
193	int			need_transceiver = (config->otg != 0);
194	int			ret;
195
196	dev_dbg(hcd->self.controller, "starting USB Controller\n");
197
198	if (config->otg) {
199		ohci_to_hcd(ohci)->self.otg_port = config->otg;
200		/* default/minimum OTG power budget:  8 mA */
201		ohci_to_hcd(ohci)->power_budget = 8;
202	}
203
204	/* boards can use OTG transceivers in non-OTG modes */
205	need_transceiver = need_transceiver
206			|| machine_is_omap_h2() || machine_is_omap_h3();
207
208	if (cpu_is_omap16xx())
209		ocpi_enable();
 
210
211#ifdef	CONFIG_USB_OTG
212	if (need_transceiver) {
213		ohci->transceiver = otg_get_transceiver();
214		if (ohci->transceiver) {
215			int	status = otg_set_host(ohci->transceiver,
216						&ohci_to_hcd(ohci)->self);
217			dev_dbg(hcd->self.controller, "init %s transceiver, status %d\n",
218					ohci->transceiver->label, status);
219			if (status) {
220				if (ohci->transceiver)
221					put_device(ohci->transceiver->dev);
222				return status;
223			}
224		} else {
225			dev_err(hcd->self.controller, "can't find transceiver\n");
226			return -ENODEV;
227		}
 
228		ohci->start_hnp = start_hnp;
229	}
230#endif
231
232	omap_ohci_clock_power(1);
233
234	if (cpu_is_omap15xx()) {
235		omap_1510_local_bus_power(1);
236		omap_1510_local_bus_init();
237	}
238
239	if ((ret = ohci_init(ohci)) < 0)
 
240		return ret;
241
 
 
 
 
 
242	/* board-specific power switching and overcurrent support */
243	if (machine_is_omap_osk() || machine_is_omap_innovator()) {
244		u32	rh = roothub_a (ohci);
245
246		/* power switching (ganged by default) */
247		rh &= ~RH_A_NPS;
248
249		/* TPS2045 switch for internal transceiver (port 1) */
250		if (machine_is_omap_osk()) {
251			ohci_to_hcd(ohci)->power_budget = 250;
252
253			rh &= ~RH_A_NOCP;
254
255			/* gpio9 for overcurrent detction */
256			omap_cfg_reg(W8_1610_GPIO9);
257			gpio_request(9, "OHCI overcurrent");
258			gpio_direction_input(9);
259
260			/* for paranoia's sake:  disable USB.PUEN */
261			omap_cfg_reg(W4_USB_HIGHZ);
262		}
263		ohci_writel(ohci, rh, &ohci->regs->roothub.a);
264		ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
265	} else if (machine_is_nokia770()) {
266		/* We require a self-powered hub, which should have
267		 * plenty of power. */
268		ohci_to_hcd(ohci)->power_budget = 0;
269	}
270
271	/* FIXME khubd hub requests should manage power switching */
272	omap_ohci_transceiver_power(1);
273
274	/* board init will have already handled HMC and mux setup.
275	 * any external transceiver should already be initialized
276	 * too, so all configured ports use the right signaling now.
277	 */
278
279	return 0;
280}
281
282static void ohci_omap_stop(struct usb_hcd *hcd)
283{
284	dev_dbg(hcd->self.controller, "stopping USB Controller\n");
285	ohci_stop(hcd);
286	omap_ohci_clock_power(0);
287}
288
289
290/*-------------------------------------------------------------------------*/
291
292/**
293 * usb_hcd_omap_probe - initialize OMAP-based HCDs
294 * Context: !in_interrupt()
 
 
295 *
296 * Allocates basic resources for this USB host controller, and
297 * then invokes the start() method for the HCD associated with it
298 * through the hotplug entry's driver_data.
299 */
300static int usb_hcd_omap_probe (const struct hc_driver *driver,
301			  struct platform_device *pdev)
302{
303	int retval, irq;
304	struct usb_hcd *hcd = 0;
305	struct ohci_hcd *ohci;
306
307	if (pdev->num_resources != 2) {
308		printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
309		       pdev->num_resources);
310		return -ENODEV;
311	}
312
313	if (pdev->resource[0].flags != IORESOURCE_MEM
314			|| pdev->resource[1].flags != IORESOURCE_IRQ) {
315		printk(KERN_ERR "hcd probe: invalid resource type\n");
316		return -ENODEV;
317	}
318
319	usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
320	if (IS_ERR(usb_host_ck))
321		return PTR_ERR(usb_host_ck);
 
322
323	if (!cpu_is_omap15xx())
324		usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
325	else
326		usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
327
328	if (IS_ERR(usb_dc_ck)) {
329		clk_put(usb_host_ck);
330		return PTR_ERR(usb_dc_ck);
 
 
331	}
 
 
332
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
333
334	hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
335	if (!hcd) {
336		retval = -ENOMEM;
337		goto err0;
 
 
 
 
338	}
339	hcd->rsrc_start = pdev->resource[0].start;
340	hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
341
342	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
343		dev_dbg(&pdev->dev, "request_mem_region failed\n");
344		retval = -EBUSY;
345		goto err1;
346	}
347
348	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
349	if (!hcd->regs) {
350		dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
351		retval = -ENOMEM;
352		goto err2;
353	}
354
355	ohci = hcd_to_ohci(hcd);
356	ohci_hcd_init(ohci);
357
358	host_initialized = 0;
359	host_enabled = 1;
360
361	irq = platform_get_irq(pdev, 0);
362	if (irq < 0) {
363		retval = -ENXIO;
364		goto err3;
365	}
366	retval = usb_add_hcd(hcd, irq, IRQF_DISABLED);
367	if (retval)
368		goto err3;
369
370	host_initialized = 1;
371
372	if (!host_enabled)
373		omap_ohci_clock_power(0);
374
375	return 0;
376err3:
377	iounmap(hcd->regs);
378err2:
379	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
380err1:
 
 
 
 
381	usb_put_hcd(hcd);
382err0:
383	clk_put(usb_dc_ck);
384	clk_put(usb_host_ck);
385	return retval;
386}
387
388
389/* may be called with controller, bus, and devices active */
390
391/**
392 * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
393 * @dev: USB Host Controller being removed
394 * Context: !in_interrupt()
 
395 *
396 * Reverses the effect of usb_hcd_omap_probe(), first invoking
397 * the HCD's stop() method.  It is always called from a thread
398 * context, normally "rmmod", "apmd", or something similar.
399 */
400static inline void
401usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
402{
403	struct ohci_hcd		*ohci = hcd_to_ohci (hcd);
 
404
 
405	usb_remove_hcd(hcd);
406	if (ohci->transceiver) {
407		(void) otg_set_host(ohci->transceiver, 0);
408		put_device(ohci->transceiver->dev);
 
409	}
410	if (machine_is_omap_osk())
411		gpio_free(9);
412	iounmap(hcd->regs);
413	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
 
 
414	usb_put_hcd(hcd);
415	clk_put(usb_dc_ck);
416	clk_put(usb_host_ck);
417}
418
419/*-------------------------------------------------------------------------*/
420
421static int
422ohci_omap_start (struct usb_hcd *hcd)
423{
424	struct omap_usb_config *config;
425	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
426	int		ret;
427
428	if (!host_enabled)
429		return 0;
430	config = hcd->self.controller->platform_data;
431	if (config->otg || config->rwc) {
432		ohci->hc_control = OHCI_CTRL_RWC;
433		writel(OHCI_CTRL_RWC, &ohci->regs->control);
434	}
435
436	if ((ret = ohci_run (ohci)) < 0) {
437		dev_err(hcd->self.controller, "can't start\n");
438		ohci_stop (hcd);
439		return ret;
440	}
441	return 0;
442}
443
444/*-------------------------------------------------------------------------*/
445
446static const struct hc_driver ohci_omap_hc_driver = {
447	.description =		hcd_name,
448	.product_desc =		"OMAP OHCI",
449	.hcd_priv_size =	sizeof(struct ohci_hcd),
450
451	/*
452	 * generic hardware linkage
453	 */
454	.irq =			ohci_irq,
455	.flags =		HCD_USB11 | HCD_MEMORY,
456
457	/*
458	 * basic lifecycle operations
459	 */
460	.reset =		ohci_omap_init,
461	.start =		ohci_omap_start,
462	.stop =			ohci_omap_stop,
463	.shutdown =		ohci_shutdown,
464
465	/*
466	 * managing i/o requests and associated device resources
467	 */
468	.urb_enqueue =		ohci_urb_enqueue,
469	.urb_dequeue =		ohci_urb_dequeue,
470	.endpoint_disable =	ohci_endpoint_disable,
471
472	/*
473	 * scheduling support
474	 */
475	.get_frame_number =	ohci_get_frame,
476
477	/*
478	 * root hub support
479	 */
480	.hub_status_data =	ohci_hub_status_data,
481	.hub_control =		ohci_hub_control,
482#ifdef	CONFIG_PM
483	.bus_suspend =		ohci_bus_suspend,
484	.bus_resume =		ohci_bus_resume,
485#endif
486	.start_port_reset =	ohci_start_port_reset,
487};
488
489/*-------------------------------------------------------------------------*/
490
491static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
492{
493	return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
494}
495
496static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
497{
498	struct usb_hcd		*hcd = platform_get_drvdata(dev);
499
500	usb_hcd_omap_remove(hcd, dev);
501	platform_set_drvdata(dev, NULL);
502
503	return 0;
504}
505
506/*-------------------------------------------------------------------------*/
507
508#ifdef	CONFIG_PM
509
510static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
511{
512	struct ohci_hcd	*ohci = hcd_to_ohci(platform_get_drvdata(dev));
513
514	if (time_before(jiffies, ohci->next_statechange))
515		msleep(5);
516	ohci->next_statechange = jiffies;
517
518	omap_ohci_clock_power(0);
519	ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
520	return 0;
 
 
 
521}
522
523static int ohci_omap_resume(struct platform_device *dev)
524{
525	struct usb_hcd	*hcd = platform_get_drvdata(dev);
526	struct ohci_hcd	*ohci = hcd_to_ohci(hcd);
 
527
528	if (time_before(jiffies, ohci->next_statechange))
529		msleep(5);
530	ohci->next_statechange = jiffies;
531
532	omap_ohci_clock_power(1);
533	ohci_finish_controller_resume(hcd);
534	return 0;
535}
536
537#endif
538
539/*-------------------------------------------------------------------------*/
540
541/*
542 * Driver definition to register with the OMAP bus
543 */
544static struct platform_driver ohci_hcd_omap_driver = {
545	.probe		= ohci_hcd_omap_drv_probe,
546	.remove		= ohci_hcd_omap_drv_remove,
547	.shutdown	= usb_hcd_platform_shutdown,
548#ifdef	CONFIG_PM
549	.suspend	= ohci_omap_suspend,
550	.resume		= ohci_omap_resume,
551#endif
552	.driver		= {
553		.owner	= THIS_MODULE,
554		.name	= "ohci",
555	},
556};
557
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
558MODULE_ALIAS("platform:ohci");
v5.14.15
  1// SPDX-License-Identifier: GPL-1.0+
  2/*
  3 * OHCI HCD (Host Controller Driver) for USB.
  4 *
  5 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  6 * (C) Copyright 2000-2005 David Brownell
  7 * (C) Copyright 2002 Hewlett-Packard Company
  8 *
  9 * OMAP Bus Glue
 10 *
 11 * Modified for OMAP by Tony Lindgren <tony@atomide.com>
 12 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
 13 * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
 14 *
 15 * This file is licenced under the GPL.
 16 */
 17
 18#include <linux/clk.h>
 19#include <linux/dma-mapping.h>
 20#include <linux/err.h>
 21#include <linux/gpio/consumer.h>
 22#include <linux/io.h>
 23#include <linux/jiffies.h>
 24#include <linux/kernel.h>
 25#include <linux/module.h>
 26#include <linux/usb/otg.h>
 27#include <linux/platform_device.h>
 28#include <linux/signal.h>
 29#include <linux/usb.h>
 30#include <linux/usb/hcd.h>
 31
 32#include "ohci.h"
 33
 
 34#include <asm/io.h>
 35#include <asm/mach-types.h>
 36
 37#include <mach/mux.h>
 38
 39#include <mach/hardware.h>
 40#include <mach/usb.h>
 41
 42
 43/* OMAP-1510 OHCI has its own MMU for DMA */
 44#define OMAP1510_LB_MEMSIZE	32	/* Should be same as SDRAM size */
 45#define OMAP1510_LB_CLOCK_DIV	0xfffec10c
 46#define OMAP1510_LB_MMU_CTL	0xfffec208
 47#define OMAP1510_LB_MMU_LCK	0xfffec224
 48#define OMAP1510_LB_MMU_LD_TLB	0xfffec228
 49#define OMAP1510_LB_MMU_CAM_H	0xfffec22c
 50#define OMAP1510_LB_MMU_CAM_L	0xfffec230
 51#define OMAP1510_LB_MMU_RAM_H	0xfffec234
 52#define OMAP1510_LB_MMU_RAM_L	0xfffec238
 53
 54#define DRIVER_DESC "OHCI OMAP driver"
 55
 56struct ohci_omap_priv {
 57	struct clk *usb_host_ck;
 58	struct clk *usb_dc_ck;
 59	struct gpio_desc *power;
 60	struct gpio_desc *overcurrent;
 61};
 
 
 
 
 
 
 
 
 
 
 
 
 
 62
 63static const char hcd_name[] = "ohci-omap";
 64static struct hc_driver __read_mostly ohci_omap_hc_driver;
 65
 66#define hcd_to_ohci_omap_priv(h) \
 67	((struct ohci_omap_priv *)hcd_to_ohci(h)->priv)
 
 
 68
 69static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on)
 70{
 71	if (on) {
 72		clk_enable(priv->usb_dc_ck);
 73		clk_enable(priv->usb_host_ck);
 74		/* guesstimate for T5 == 1x 32K clock + APLL lock time */
 75		udelay(100);
 76	} else {
 77		clk_disable(priv->usb_host_ck);
 78		clk_disable(priv->usb_dc_ck);
 79	}
 80}
 81
 82/*
 83 * Board specific gang-switched transceiver power on/off.
 84 * NOTE:  OSK supplies power from DC, not battery.
 85 */
 86static int omap_ohci_transceiver_power(struct ohci_omap_priv *priv, int on)
 87{
 88	if (on) {
 89		if (machine_is_omap_innovator() && cpu_is_omap1510())
 90			__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
 91				| ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
 92			       INNOVATOR_FPGA_CAM_USB_CONTROL);
 93		else if (priv->power)
 94			gpiod_set_value_cansleep(priv->power, 0);
 95	} else {
 96		if (machine_is_omap_innovator() && cpu_is_omap1510())
 97			__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
 98				& ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
 99			       INNOVATOR_FPGA_CAM_USB_CONTROL);
100		else if (priv->power)
101			gpiod_set_value_cansleep(priv->power, 1);
102	}
103
104	return 0;
105}
106
107#ifdef CONFIG_ARCH_OMAP15XX
108/*
109 * OMAP-1510 specific Local Bus clock on/off
110 */
111static int omap_1510_local_bus_power(int on)
112{
113	if (on) {
114		omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
115		udelay(200);
116	} else {
117		omap_writel(0, OMAP1510_LB_MMU_CTL);
118	}
119
120	return 0;
121}
122
123/*
124 * OMAP-1510 specific Local Bus initialization
125 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
126 *       See also arch/mach-omap/memory.h for __virt_to_dma() and
127 *       __dma_to_virt() which need to match with the physical
128 *       Local Bus address below.
129 */
130static int omap_1510_local_bus_init(void)
131{
132	unsigned int tlb;
133	unsigned long lbaddr, physaddr;
134
135	omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
136	       OMAP1510_LB_CLOCK_DIV);
137
138	/* Configure the Local Bus MMU table */
139	for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
140		lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
141		physaddr = tlb * 0x00100000 + PHYS_OFFSET;
142		omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
143		omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
144		       OMAP1510_LB_MMU_CAM_L);
145		omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
146		omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
147		omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
148		omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
149	}
150
151	/* Enable the walking table */
152	omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
153	udelay(200);
154
155	return 0;
156}
157#else
158#define omap_1510_local_bus_power(x)	{}
159#define omap_1510_local_bus_init()	{}
160#endif
161
162#ifdef	CONFIG_USB_OTG
163
164static void start_hnp(struct ohci_hcd *ohci)
165{
166	struct usb_hcd *hcd = ohci_to_hcd(ohci);
167	const unsigned	port = hcd->self.otg_port - 1;
168	unsigned long	flags;
169	u32 l;
170
171	otg_start_hnp(hcd->usb_phy->otg);
172
173	local_irq_save(flags);
174	hcd->usb_phy->otg->state = OTG_STATE_A_SUSPEND;
175	writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
176	l = omap_readl(OTG_CTRL);
177	l &= ~OTG_A_BUSREQ;
178	omap_writel(l, OTG_CTRL);
179	local_irq_restore(flags);
180}
181
182#endif
183
184/*-------------------------------------------------------------------------*/
185
186static int ohci_omap_reset(struct usb_hcd *hcd)
187{
188	struct ohci_hcd		*ohci = hcd_to_ohci(hcd);
189	struct omap_usb_config	*config = dev_get_platdata(hcd->self.controller);
190	struct ohci_omap_priv	*priv = hcd_to_ohci_omap_priv(hcd);
191	int			need_transceiver = (config->otg != 0);
192	int			ret;
193
194	dev_dbg(hcd->self.controller, "starting USB Controller\n");
195
196	if (config->otg) {
197		hcd->self.otg_port = config->otg;
198		/* default/minimum OTG power budget:  8 mA */
199		hcd->power_budget = 8;
200	}
201
202	/* boards can use OTG transceivers in non-OTG modes */
203	need_transceiver = need_transceiver
204			|| machine_is_omap_h2() || machine_is_omap_h3();
205
206	/* XXX OMAP16xx only */
207	if (config->ocpi_enable)
208		config->ocpi_enable();
209
210#ifdef	CONFIG_USB_OTG
211	if (need_transceiver) {
212		hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
213		if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
214			int	status = otg_set_host(hcd->usb_phy->otg,
215						&ohci_to_hcd(ohci)->self);
216			dev_dbg(hcd->self.controller, "init %s phy, status %d\n",
217					hcd->usb_phy->label, status);
218			if (status) {
219				usb_put_phy(hcd->usb_phy);
 
220				return status;
221			}
222		} else {
223			return -EPROBE_DEFER;
 
224		}
225		hcd->skip_phy_initialization = 1;
226		ohci->start_hnp = start_hnp;
227	}
228#endif
229
230	omap_ohci_clock_power(priv, 1);
231
232	if (cpu_is_omap15xx()) {
233		omap_1510_local_bus_power(1);
234		omap_1510_local_bus_init();
235	}
236
237	ret = ohci_setup(hcd);
238	if (ret < 0)
239		return ret;
240
241	if (config->otg || config->rwc) {
242		ohci->hc_control = OHCI_CTRL_RWC;
243		writel(OHCI_CTRL_RWC, &ohci->regs->control);
244	}
245
246	/* board-specific power switching and overcurrent support */
247	if (machine_is_omap_osk() || machine_is_omap_innovator()) {
248		u32	rh = roothub_a (ohci);
249
250		/* power switching (ganged by default) */
251		rh &= ~RH_A_NPS;
252
253		/* TPS2045 switch for internal transceiver (port 1) */
254		if (machine_is_omap_osk()) {
255			ohci_to_hcd(ohci)->power_budget = 250;
256
257			rh &= ~RH_A_NOCP;
258
259			/* gpio9 for overcurrent detction */
260			omap_cfg_reg(W8_1610_GPIO9);
 
 
261
262			/* for paranoia's sake:  disable USB.PUEN */
263			omap_cfg_reg(W4_USB_HIGHZ);
264		}
265		ohci_writel(ohci, rh, &ohci->regs->roothub.a);
266		ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
267	} else if (machine_is_nokia770()) {
268		/* We require a self-powered hub, which should have
269		 * plenty of power. */
270		ohci_to_hcd(ohci)->power_budget = 0;
271	}
272
273	/* FIXME hub_wq hub requests should manage power switching */
274	omap_ohci_transceiver_power(priv, 1);
275
276	/* board init will have already handled HMC and mux setup.
277	 * any external transceiver should already be initialized
278	 * too, so all configured ports use the right signaling now.
279	 */
280
281	return 0;
282}
283
 
 
 
 
 
 
 
 
284/*-------------------------------------------------------------------------*/
285
286/**
287 * ohci_hcd_omap_probe - initialize OMAP-based HCDs
288 * @pdev:	USB controller to probe
289 *
290 * Context: task context, might sleep
291 *
292 * Allocates basic resources for this USB host controller, and
293 * then invokes the start() method for the HCD associated with it
294 * through the hotplug entry's driver_data.
295 */
296static int ohci_hcd_omap_probe(struct platform_device *pdev)
 
297{
298	int retval, irq;
299	struct usb_hcd *hcd = 0;
300	struct ohci_omap_priv *priv;
301
302	if (pdev->num_resources != 2) {
303		dev_err(&pdev->dev, "invalid num_resources: %i\n",
304		       pdev->num_resources);
305		return -ENODEV;
306	}
307
308	if (pdev->resource[0].flags != IORESOURCE_MEM
309			|| pdev->resource[1].flags != IORESOURCE_IRQ) {
310		dev_err(&pdev->dev, "invalid resource type\n");
311		return -ENODEV;
312	}
313
314	hcd = usb_create_hcd(&ohci_omap_hc_driver, &pdev->dev,
315			dev_name(&pdev->dev));
316	if (!hcd)
317		return -ENOMEM;
318
319	hcd->rsrc_start = pdev->resource[0].start;
320	hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
321	priv = hcd_to_ohci_omap_priv(hcd);
 
322
323	/* Obtain two optional GPIO lines */
324	priv->power = devm_gpiod_get_optional(&pdev->dev, "power", GPIOD_ASIS);
325	if (IS_ERR(priv->power)) {
326		retval = PTR_ERR(priv->power);
327		goto err_put_hcd;
328	}
329	if (priv->power)
330		gpiod_set_consumer_name(priv->power, "OHCI power");
331
332	/*
333	 * This "overcurrent" GPIO line isn't really used in the code,
334	 * but has a designated hardware function.
335	 * TODO: implement proper overcurrent handling.
336	 */
337	priv->overcurrent = devm_gpiod_get_optional(&pdev->dev, "overcurrent",
338						    GPIOD_IN);
339	if (IS_ERR(priv->overcurrent)) {
340		retval = PTR_ERR(priv->overcurrent);
341		goto err_put_hcd;
342	}
343	if (priv->overcurrent)
344		gpiod_set_consumer_name(priv->overcurrent, "OHCI overcurrent");
345
346	priv->usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
347	if (IS_ERR(priv->usb_host_ck)) {
348		retval = PTR_ERR(priv->usb_host_ck);
349		goto err_put_hcd;
350	}
351
352	if (!cpu_is_omap15xx())
353		priv->usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
354	else
355		priv->usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
356
357	if (IS_ERR(priv->usb_dc_ck)) {
358		retval = PTR_ERR(priv->usb_dc_ck);
359		goto err_put_host_ck;
360	}
 
 
361
362	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
363		dev_dbg(&pdev->dev, "request_mem_region failed\n");
364		retval = -EBUSY;
365		goto err_put_dc_ck;
366	}
367
368	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
369	if (!hcd->regs) {
370		dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
371		retval = -ENOMEM;
372		goto err2;
373	}
374
 
 
 
 
 
 
375	irq = platform_get_irq(pdev, 0);
376	if (irq < 0) {
377		retval = -ENXIO;
378		goto err3;
379	}
380	retval = usb_add_hcd(hcd, irq, 0);
381	if (retval)
382		goto err3;
383
384	device_wakeup_enable(hcd->self.controller);
 
 
 
 
385	return 0;
386err3:
387	iounmap(hcd->regs);
388err2:
389	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
390err_put_dc_ck:
391	clk_put(priv->usb_dc_ck);
392err_put_host_ck:
393	clk_put(priv->usb_host_ck);
394err_put_hcd:
395	usb_put_hcd(hcd);
 
 
 
396	return retval;
397}
398
399
400/* may be called with controller, bus, and devices active */
401
402/**
403 * ohci_hcd_omap_remove - shutdown processing for OMAP-based HCDs
404 * @pdev: USB Host Controller being removed
405 *
406 * Context: task context, might sleep
407 *
408 * Reverses the effect of ohci_hcd_omap_probe(), first invoking
409 * the HCD's stop() method.  It is always called from a thread
410 * context, normally "rmmod", "apmd", or something similar.
411 */
412static int ohci_hcd_omap_remove(struct platform_device *pdev)
 
413{
414	struct usb_hcd	*hcd = platform_get_drvdata(pdev);
415	struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
416
417	dev_dbg(hcd->self.controller, "stopping USB Controller\n");
418	usb_remove_hcd(hcd);
419	omap_ohci_clock_power(priv, 0);
420	if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
421		(void) otg_set_host(hcd->usb_phy->otg, 0);
422		usb_put_phy(hcd->usb_phy);
423	}
 
 
424	iounmap(hcd->regs);
425	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
426	clk_put(priv->usb_dc_ck);
427	clk_put(priv->usb_host_ck);
428	usb_put_hcd(hcd);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
429	return 0;
430}
431
432/*-------------------------------------------------------------------------*/
433
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
434#ifdef	CONFIG_PM
 
 
 
 
 
435
436static int ohci_omap_suspend(struct platform_device *pdev, pm_message_t message)
 
 
437{
438	struct usb_hcd *hcd = platform_get_drvdata(pdev);
439	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
440	struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
441	bool do_wakeup = device_may_wakeup(&pdev->dev);
442	int ret;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
443
444	if (time_before(jiffies, ohci->next_statechange))
445		msleep(5);
446	ohci->next_statechange = jiffies;
447
448	ret = ohci_suspend(hcd, do_wakeup);
449	if (ret)
450		return ret;
451
452	omap_ohci_clock_power(priv, 0);
453	return ret;
454}
455
456static int ohci_omap_resume(struct platform_device *dev)
457{
458	struct usb_hcd	*hcd = platform_get_drvdata(dev);
459	struct ohci_hcd	*ohci = hcd_to_ohci(hcd);
460	struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
461
462	if (time_before(jiffies, ohci->next_statechange))
463		msleep(5);
464	ohci->next_statechange = jiffies;
465
466	omap_ohci_clock_power(priv, 1);
467	ohci_resume(hcd, false);
468	return 0;
469}
470
471#endif
472
473/*-------------------------------------------------------------------------*/
474
475/*
476 * Driver definition to register with the OMAP bus
477 */
478static struct platform_driver ohci_hcd_omap_driver = {
479	.probe		= ohci_hcd_omap_probe,
480	.remove		= ohci_hcd_omap_remove,
481	.shutdown	= usb_hcd_platform_shutdown,
482#ifdef	CONFIG_PM
483	.suspend	= ohci_omap_suspend,
484	.resume		= ohci_omap_resume,
485#endif
486	.driver		= {
 
487		.name	= "ohci",
488	},
489};
490
491static const struct ohci_driver_overrides omap_overrides __initconst = {
492	.product_desc	= "OMAP OHCI",
493	.reset		= ohci_omap_reset,
494	.extra_priv_size = sizeof(struct ohci_omap_priv),
495};
496
497static int __init ohci_omap_init(void)
498{
499	if (usb_disabled())
500		return -ENODEV;
501
502	pr_info("%s: " DRIVER_DESC "\n", hcd_name);
503
504	ohci_init_driver(&ohci_omap_hc_driver, &omap_overrides);
505	return platform_driver_register(&ohci_hcd_omap_driver);
506}
507module_init(ohci_omap_init);
508
509static void __exit ohci_omap_cleanup(void)
510{
511	platform_driver_unregister(&ohci_hcd_omap_driver);
512}
513module_exit(ohci_omap_cleanup);
514
515MODULE_DESCRIPTION(DRIVER_DESC);
516MODULE_ALIAS("platform:ohci");
517MODULE_LICENSE("GPL");