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1// SPDX-License-Identifier: ISC
2/*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 */
6
7#include <linux/slab.h>
8#include <linux/if_ether.h>
9
10#include "htt.h"
11#include "core.h"
12#include "debug.h"
13#include "hif.h"
14
15static const enum htt_t2h_msg_type htt_main_t2h_msg_types[] = {
16 [HTT_MAIN_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
17 [HTT_MAIN_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
18 [HTT_MAIN_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
19 [HTT_MAIN_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
20 [HTT_MAIN_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
21 [HTT_MAIN_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
22 [HTT_MAIN_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
23 [HTT_MAIN_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
24 [HTT_MAIN_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
25 [HTT_MAIN_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
26 [HTT_MAIN_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
27 [HTT_MAIN_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
28 [HTT_MAIN_T2H_MSG_TYPE_TX_INSPECT_IND] =
29 HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
30 [HTT_MAIN_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
31 HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
32 [HTT_MAIN_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND] =
33 HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND,
34 [HTT_MAIN_T2H_MSG_TYPE_RX_PN_IND] = HTT_T2H_MSG_TYPE_RX_PN_IND,
35 [HTT_MAIN_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND] =
36 HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND,
37 [HTT_MAIN_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
38};
39
40static const enum htt_t2h_msg_type htt_10x_t2h_msg_types[] = {
41 [HTT_10X_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
42 [HTT_10X_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
43 [HTT_10X_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
44 [HTT_10X_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
45 [HTT_10X_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
46 [HTT_10X_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
47 [HTT_10X_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
48 [HTT_10X_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
49 [HTT_10X_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
50 [HTT_10X_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
51 [HTT_10X_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
52 [HTT_10X_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
53 [HTT_10X_T2H_MSG_TYPE_RC_UPDATE_IND] = HTT_T2H_MSG_TYPE_RC_UPDATE_IND,
54 [HTT_10X_T2H_MSG_TYPE_TX_INSPECT_IND] = HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
55 [HTT_10X_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
56 [HTT_10X_T2H_MSG_TYPE_CHAN_CHANGE] = HTT_T2H_MSG_TYPE_CHAN_CHANGE,
57 [HTT_10X_T2H_MSG_TYPE_AGGR_CONF] = HTT_T2H_MSG_TYPE_AGGR_CONF,
58 [HTT_10X_T2H_MSG_TYPE_STATS_NOUPLOAD] = HTT_T2H_MSG_TYPE_STATS_NOUPLOAD,
59 [HTT_10X_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
60 HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
61};
62
63static const enum htt_t2h_msg_type htt_tlv_t2h_msg_types[] = {
64 [HTT_TLV_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
65 [HTT_TLV_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
66 [HTT_TLV_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
67 [HTT_TLV_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
68 [HTT_TLV_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
69 [HTT_TLV_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
70 [HTT_TLV_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
71 [HTT_TLV_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
72 [HTT_TLV_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
73 [HTT_TLV_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
74 [HTT_TLV_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
75 [HTT_TLV_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
76 [HTT_TLV_T2H_MSG_TYPE_RC_UPDATE_IND] = HTT_T2H_MSG_TYPE_RC_UPDATE_IND,
77 [HTT_TLV_T2H_MSG_TYPE_TX_INSPECT_IND] = HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
78 [HTT_TLV_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
79 HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
80 [HTT_TLV_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND] =
81 HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND,
82 [HTT_TLV_T2H_MSG_TYPE_RX_PN_IND] = HTT_T2H_MSG_TYPE_RX_PN_IND,
83 [HTT_TLV_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND] =
84 HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND,
85 [HTT_TLV_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND] =
86 HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND,
87 [HTT_TLV_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE] =
88 HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE,
89 [HTT_TLV_T2H_MSG_TYPE_CHAN_CHANGE] = HTT_T2H_MSG_TYPE_CHAN_CHANGE,
90 [HTT_TLV_T2H_MSG_TYPE_RX_OFLD_PKT_ERR] =
91 HTT_T2H_MSG_TYPE_RX_OFLD_PKT_ERR,
92 [HTT_TLV_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
93};
94
95static const enum htt_t2h_msg_type htt_10_4_t2h_msg_types[] = {
96 [HTT_10_4_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
97 [HTT_10_4_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
98 [HTT_10_4_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
99 [HTT_10_4_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
100 [HTT_10_4_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
101 [HTT_10_4_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
102 [HTT_10_4_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
103 [HTT_10_4_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
104 [HTT_10_4_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
105 [HTT_10_4_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
106 [HTT_10_4_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
107 [HTT_10_4_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
108 [HTT_10_4_T2H_MSG_TYPE_RC_UPDATE_IND] = HTT_T2H_MSG_TYPE_RC_UPDATE_IND,
109 [HTT_10_4_T2H_MSG_TYPE_TX_INSPECT_IND] =
110 HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
111 [HTT_10_4_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
112 HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
113 [HTT_10_4_T2H_MSG_TYPE_CHAN_CHANGE] = HTT_T2H_MSG_TYPE_CHAN_CHANGE,
114 [HTT_10_4_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND] =
115 HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND,
116 [HTT_10_4_T2H_MSG_TYPE_RX_PN_IND] = HTT_T2H_MSG_TYPE_RX_PN_IND,
117 [HTT_10_4_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND] =
118 HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND,
119 [HTT_10_4_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
120 [HTT_10_4_T2H_MSG_TYPE_EN_STATS] = HTT_T2H_MSG_TYPE_EN_STATS,
121 [HTT_10_4_T2H_MSG_TYPE_AGGR_CONF] = HTT_T2H_MSG_TYPE_AGGR_CONF,
122 [HTT_10_4_T2H_MSG_TYPE_TX_FETCH_IND] =
123 HTT_T2H_MSG_TYPE_TX_FETCH_IND,
124 [HTT_10_4_T2H_MSG_TYPE_TX_FETCH_CONFIRM] =
125 HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM,
126 [HTT_10_4_T2H_MSG_TYPE_STATS_NOUPLOAD] =
127 HTT_T2H_MSG_TYPE_STATS_NOUPLOAD,
128 [HTT_10_4_T2H_MSG_TYPE_TX_MODE_SWITCH_IND] =
129 HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND,
130 [HTT_10_4_T2H_MSG_TYPE_PEER_STATS] =
131 HTT_T2H_MSG_TYPE_PEER_STATS,
132};
133
134int ath10k_htt_connect(struct ath10k_htt *htt)
135{
136 struct ath10k_htc_svc_conn_req conn_req;
137 struct ath10k_htc_svc_conn_resp conn_resp;
138 struct ath10k *ar = htt->ar;
139 struct ath10k_htc_ep *ep;
140 int status;
141
142 memset(&conn_req, 0, sizeof(conn_req));
143 memset(&conn_resp, 0, sizeof(conn_resp));
144
145 conn_req.ep_ops.ep_tx_complete = ath10k_htt_htc_tx_complete;
146 conn_req.ep_ops.ep_rx_complete = ath10k_htt_htc_t2h_msg_handler;
147 conn_req.ep_ops.ep_tx_credits = ath10k_htt_op_ep_tx_credits;
148
149 /* connect to control service */
150 conn_req.service_id = ATH10K_HTC_SVC_ID_HTT_DATA_MSG;
151
152 status = ath10k_htc_connect_service(&htt->ar->htc, &conn_req,
153 &conn_resp);
154
155 if (status)
156 return status;
157
158 htt->eid = conn_resp.eid;
159
160 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
161 ep = &ar->htc.endpoint[htt->eid];
162 ath10k_htc_setup_tx_req(ep);
163 }
164
165 htt->disable_tx_comp = ath10k_hif_get_htt_tx_complete(htt->ar);
166 if (htt->disable_tx_comp)
167 ath10k_htc_change_tx_credit_flow(&htt->ar->htc, htt->eid, true);
168
169 return 0;
170}
171
172int ath10k_htt_init(struct ath10k *ar)
173{
174 struct ath10k_htt *htt = &ar->htt;
175
176 htt->ar = ar;
177
178 /*
179 * Prefetch enough data to satisfy target
180 * classification engine.
181 * This is for LL chips. HL chips will probably
182 * transfer all frame in the tx fragment.
183 */
184 htt->prefetch_len =
185 36 + /* 802.11 + qos + ht */
186 4 + /* 802.1q */
187 8 + /* llc snap */
188 2; /* ip4 dscp or ip6 priority */
189
190 switch (ar->running_fw->fw_file.htt_op_version) {
191 case ATH10K_FW_HTT_OP_VERSION_10_4:
192 ar->htt.t2h_msg_types = htt_10_4_t2h_msg_types;
193 ar->htt.t2h_msg_types_max = HTT_10_4_T2H_NUM_MSGS;
194 break;
195 case ATH10K_FW_HTT_OP_VERSION_10_1:
196 ar->htt.t2h_msg_types = htt_10x_t2h_msg_types;
197 ar->htt.t2h_msg_types_max = HTT_10X_T2H_NUM_MSGS;
198 break;
199 case ATH10K_FW_HTT_OP_VERSION_TLV:
200 ar->htt.t2h_msg_types = htt_tlv_t2h_msg_types;
201 ar->htt.t2h_msg_types_max = HTT_TLV_T2H_NUM_MSGS;
202 break;
203 case ATH10K_FW_HTT_OP_VERSION_MAIN:
204 ar->htt.t2h_msg_types = htt_main_t2h_msg_types;
205 ar->htt.t2h_msg_types_max = HTT_MAIN_T2H_NUM_MSGS;
206 break;
207 case ATH10K_FW_HTT_OP_VERSION_MAX:
208 case ATH10K_FW_HTT_OP_VERSION_UNSET:
209 WARN_ON(1);
210 return -EINVAL;
211 }
212 ath10k_htt_set_tx_ops(htt);
213 ath10k_htt_set_rx_ops(htt);
214
215 return 0;
216}
217
218#define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
219
220static int ath10k_htt_verify_version(struct ath10k_htt *htt)
221{
222 struct ath10k *ar = htt->ar;
223
224 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt target version %d.%d\n",
225 htt->target_version_major, htt->target_version_minor);
226
227 if (htt->target_version_major != 2 &&
228 htt->target_version_major != 3) {
229 ath10k_err(ar, "unsupported htt major version %d. supported versions are 2 and 3\n",
230 htt->target_version_major);
231 return -ENOTSUPP;
232 }
233
234 return 0;
235}
236
237int ath10k_htt_setup(struct ath10k_htt *htt)
238{
239 struct ath10k *ar = htt->ar;
240 int status;
241
242 init_completion(&htt->target_version_received);
243
244 status = ath10k_htt_h2t_ver_req_msg(htt);
245 if (status)
246 return status;
247
248 status = wait_for_completion_timeout(&htt->target_version_received,
249 HTT_TARGET_VERSION_TIMEOUT_HZ);
250 if (status == 0) {
251 ath10k_warn(ar, "htt version request timed out\n");
252 return -ETIMEDOUT;
253 }
254
255 status = ath10k_htt_verify_version(htt);
256 if (status) {
257 ath10k_warn(ar, "failed to verify htt version: %d\n",
258 status);
259 return status;
260 }
261
262 status = ath10k_htt_send_frag_desc_bank_cfg(htt);
263 if (status)
264 return status;
265
266 status = ath10k_htt_send_rx_ring_cfg(htt);
267 if (status) {
268 ath10k_warn(ar, "failed to setup rx ring: %d\n",
269 status);
270 return status;
271 }
272
273 status = ath10k_htt_h2t_aggr_cfg_msg(htt,
274 htt->max_num_ampdu,
275 htt->max_num_amsdu);
276 if (status) {
277 ath10k_warn(ar, "failed to setup amsdu/ampdu limit: %d\n",
278 status);
279 return status;
280 }
281
282 return 0;
283}