Loading...
1/*
2 * Core driver for WM8400.
3 *
4 * Copyright 2008 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 */
14
15#include <linux/bug.h>
16#include <linux/i2c.h>
17#include <linux/kernel.h>
18#include <linux/mfd/core.h>
19#include <linux/mfd/wm8400-private.h>
20#include <linux/mfd/wm8400-audio.h>
21#include <linux/slab.h>
22
23static struct {
24 u16 readable; /* Mask of readable bits */
25 u16 writable; /* Mask of writable bits */
26 u16 vol; /* Mask of volatile bits */
27 int is_codec; /* Register controlled by codec reset */
28 u16 default_val; /* Value on reset */
29} reg_data[] = {
30 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
31 { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
32 { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
33 { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
34 { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
35 { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
36 { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
37 { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
38 { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
39 { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
40 { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
41 { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
42 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
43 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
44 { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
45 { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
46 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
47 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
48 { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
49 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
50 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
51 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
52 { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
53 { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
54 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
55 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
56 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
57 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
58 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
59 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
60 { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
61 { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
62 { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
63 { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
64 { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
65 { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
66 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
67 { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
68 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
69 { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
70 { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
71 { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
72 { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
73 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
74 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
75 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
76 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
77 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
78 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
79 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
80 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
81 { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
82 { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
83 { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
84 { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
85 { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
86 { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
87 { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
88 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
89 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
90 { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
91 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
92 { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
93 { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
94 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
95 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
96 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
97 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
98 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
99 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
100 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
101 { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
102 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
103 { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
104 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
105 { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
106 { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
107 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
108 { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
109 { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
110 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
111 { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
112 { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
113 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
114 { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
115};
116
117static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
118{
119 int i, ret = 0;
120
121 BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
122
123 /* If there are any volatile reads then read back the entire block */
124 for (i = reg; i < reg + num_regs; i++)
125 if (reg_data[i].vol) {
126 ret = wm8400->read_dev(wm8400->io_data, reg,
127 num_regs, dest);
128 if (ret != 0)
129 return ret;
130 for (i = 0; i < num_regs; i++)
131 dest[i] = be16_to_cpu(dest[i]);
132
133 return 0;
134 }
135
136 /* Otherwise use the cache */
137 memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
138
139 return 0;
140}
141
142static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
143 u16 *src)
144{
145 int ret, i;
146
147 BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
148
149 for (i = 0; i < num_regs; i++) {
150 BUG_ON(!reg_data[reg + i].writable);
151 wm8400->reg_cache[reg + i] = src[i];
152 src[i] = cpu_to_be16(src[i]);
153 }
154
155 /* Do the actual I/O */
156 ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
157 if (ret != 0)
158 return -EIO;
159
160 return 0;
161}
162
163/**
164 * wm8400_reg_read - Single register read
165 *
166 * @wm8400: Pointer to wm8400 control structure
167 * @reg: Register to read
168 *
169 * @return Read value
170 */
171u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
172{
173 u16 val;
174
175 mutex_lock(&wm8400->io_lock);
176
177 wm8400_read(wm8400, reg, 1, &val);
178
179 mutex_unlock(&wm8400->io_lock);
180
181 return val;
182}
183EXPORT_SYMBOL_GPL(wm8400_reg_read);
184
185int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
186{
187 int ret;
188
189 mutex_lock(&wm8400->io_lock);
190
191 ret = wm8400_read(wm8400, reg, count, data);
192
193 mutex_unlock(&wm8400->io_lock);
194
195 return ret;
196}
197EXPORT_SYMBOL_GPL(wm8400_block_read);
198
199/**
200 * wm8400_set_bits - Bitmask write
201 *
202 * @wm8400: Pointer to wm8400 control structure
203 * @reg: Register to access
204 * @mask: Mask of bits to change
205 * @val: Value to set for masked bits
206 */
207int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
208{
209 u16 tmp;
210 int ret;
211
212 mutex_lock(&wm8400->io_lock);
213
214 ret = wm8400_read(wm8400, reg, 1, &tmp);
215 tmp = (tmp & ~mask) | val;
216 if (ret == 0)
217 ret = wm8400_write(wm8400, reg, 1, &tmp);
218
219 mutex_unlock(&wm8400->io_lock);
220
221 return ret;
222}
223EXPORT_SYMBOL_GPL(wm8400_set_bits);
224
225/**
226 * wm8400_reset_codec_reg_cache - Reset cached codec registers to
227 * their default values.
228 */
229void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
230{
231 int i;
232
233 mutex_lock(&wm8400->io_lock);
234
235 /* Reset all codec registers to their initial value */
236 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
237 if (reg_data[i].is_codec)
238 wm8400->reg_cache[i] = reg_data[i].default_val;
239
240 mutex_unlock(&wm8400->io_lock);
241}
242EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
243
244static int wm8400_register_codec(struct wm8400 *wm8400)
245{
246 struct mfd_cell cell = {
247 .name = "wm8400-codec",
248 .platform_data = wm8400,
249 .pdata_size = sizeof(*wm8400),
250 };
251
252 return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
253}
254
255/*
256 * wm8400_init - Generic initialisation
257 *
258 * The WM8400 can be configured as either an I2C or SPI device. Probe
259 * functions for each bus set up the accessors then call into this to
260 * set up the device itself.
261 */
262static int wm8400_init(struct wm8400 *wm8400,
263 struct wm8400_platform_data *pdata)
264{
265 u16 reg;
266 int ret, i;
267
268 mutex_init(&wm8400->io_lock);
269
270 dev_set_drvdata(wm8400->dev, wm8400);
271
272 /* Check that this is actually a WM8400 */
273 ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, ®);
274 if (ret != 0) {
275 dev_err(wm8400->dev, "Chip ID register read failed\n");
276 return -EIO;
277 }
278 if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
279 dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
280 be16_to_cpu(reg));
281 return -ENODEV;
282 }
283
284 /* We don't know what state the hardware is in and since this
285 * is a PMIC we can't reset it safely so initialise the register
286 * cache from the hardware.
287 */
288 ret = wm8400->read_dev(wm8400->io_data, 0,
289 ARRAY_SIZE(wm8400->reg_cache),
290 wm8400->reg_cache);
291 if (ret != 0) {
292 dev_err(wm8400->dev, "Register cache read failed\n");
293 return -EIO;
294 }
295 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
296 wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
297
298 /* If the codec is in reset use hard coded values */
299 if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
300 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
301 if (reg_data[i].is_codec)
302 wm8400->reg_cache[i] = reg_data[i].default_val;
303
304 ret = wm8400_read(wm8400, WM8400_ID, 1, ®);
305 if (ret != 0) {
306 dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
307 return ret;
308 }
309 reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
310 dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
311
312 ret = wm8400_register_codec(wm8400);
313 if (ret != 0) {
314 dev_err(wm8400->dev, "Failed to register codec\n");
315 goto err_children;
316 }
317
318 if (pdata && pdata->platform_init) {
319 ret = pdata->platform_init(wm8400->dev);
320 if (ret != 0) {
321 dev_err(wm8400->dev, "Platform init failed: %d\n",
322 ret);
323 goto err_children;
324 }
325 } else
326 dev_warn(wm8400->dev, "No platform initialisation supplied\n");
327
328 return 0;
329
330err_children:
331 mfd_remove_devices(wm8400->dev);
332 return ret;
333}
334
335static void wm8400_release(struct wm8400 *wm8400)
336{
337 mfd_remove_devices(wm8400->dev);
338}
339
340#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
341static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
342{
343 struct i2c_client *i2c = io_data;
344 struct i2c_msg xfer[2];
345 int ret;
346
347 /* Write register */
348 xfer[0].addr = i2c->addr;
349 xfer[0].flags = 0;
350 xfer[0].len = 1;
351 xfer[0].buf = ®
352
353 /* Read data */
354 xfer[1].addr = i2c->addr;
355 xfer[1].flags = I2C_M_RD;
356 xfer[1].len = count * sizeof(u16);
357 xfer[1].buf = (u8 *)dest;
358
359 ret = i2c_transfer(i2c->adapter, xfer, 2);
360 if (ret == 2)
361 ret = 0;
362 else if (ret >= 0)
363 ret = -EIO;
364
365 return ret;
366}
367
368static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
369{
370 struct i2c_client *i2c = io_data;
371 u8 *msg;
372 int ret;
373
374 /* We add 1 byte for device register - ideally I2C would gather. */
375 msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
376 if (msg == NULL)
377 return -ENOMEM;
378
379 msg[0] = reg;
380 memcpy(&msg[1], src, count * sizeof(u16));
381
382 ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
383
384 if (ret == (count * 2) + 1)
385 ret = 0;
386 else if (ret >= 0)
387 ret = -EIO;
388
389 kfree(msg);
390
391 return ret;
392}
393
394static int wm8400_i2c_probe(struct i2c_client *i2c,
395 const struct i2c_device_id *id)
396{
397 struct wm8400 *wm8400;
398 int ret;
399
400 wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
401 if (wm8400 == NULL) {
402 ret = -ENOMEM;
403 goto err;
404 }
405
406 wm8400->io_data = i2c;
407 wm8400->read_dev = wm8400_i2c_read;
408 wm8400->write_dev = wm8400_i2c_write;
409 wm8400->dev = &i2c->dev;
410 i2c_set_clientdata(i2c, wm8400);
411
412 ret = wm8400_init(wm8400, i2c->dev.platform_data);
413 if (ret != 0)
414 goto struct_err;
415
416 return 0;
417
418struct_err:
419 kfree(wm8400);
420err:
421 return ret;
422}
423
424static int wm8400_i2c_remove(struct i2c_client *i2c)
425{
426 struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
427
428 wm8400_release(wm8400);
429 kfree(wm8400);
430
431 return 0;
432}
433
434static const struct i2c_device_id wm8400_i2c_id[] = {
435 { "wm8400", 0 },
436 { }
437};
438MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
439
440static struct i2c_driver wm8400_i2c_driver = {
441 .driver = {
442 .name = "WM8400",
443 .owner = THIS_MODULE,
444 },
445 .probe = wm8400_i2c_probe,
446 .remove = wm8400_i2c_remove,
447 .id_table = wm8400_i2c_id,
448};
449#endif
450
451static int __init wm8400_module_init(void)
452{
453 int ret = -ENODEV;
454
455#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
456 ret = i2c_add_driver(&wm8400_i2c_driver);
457 if (ret != 0)
458 pr_err("Failed to register I2C driver: %d\n", ret);
459#endif
460
461 return ret;
462}
463subsys_initcall(wm8400_module_init);
464
465static void __exit wm8400_module_exit(void)
466{
467#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
468 i2c_del_driver(&wm8400_i2c_driver);
469#endif
470}
471module_exit(wm8400_module_exit);
472
473MODULE_LICENSE("GPL");
474MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Core driver for WM8400.
4 *
5 * Copyright 2008 Wolfson Microelectronics PLC.
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 */
9
10#include <linux/init.h>
11#include <linux/bug.h>
12#include <linux/err.h>
13#include <linux/i2c.h>
14#include <linux/kernel.h>
15#include <linux/mfd/core.h>
16#include <linux/mfd/wm8400-private.h>
17#include <linux/mfd/wm8400-audio.h>
18#include <linux/regmap.h>
19#include <linux/slab.h>
20
21static bool wm8400_volatile(struct device *dev, unsigned int reg)
22{
23 switch (reg) {
24 case WM8400_INTERRUPT_STATUS_1:
25 case WM8400_INTERRUPT_LEVELS:
26 case WM8400_SHUTDOWN_REASON:
27 return true;
28 default:
29 return false;
30 }
31}
32
33static int wm8400_register_codec(struct wm8400 *wm8400)
34{
35 const struct mfd_cell cell = {
36 .name = "wm8400-codec",
37 .platform_data = wm8400,
38 .pdata_size = sizeof(*wm8400),
39 };
40
41 return devm_mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0, NULL);
42}
43
44/*
45 * wm8400_init - Generic initialisation
46 *
47 * The WM8400 can be configured as either an I2C or SPI device. Probe
48 * functions for each bus set up the accessors then call into this to
49 * set up the device itself.
50 */
51static int wm8400_init(struct wm8400 *wm8400,
52 struct wm8400_platform_data *pdata)
53{
54 unsigned int reg;
55 int ret;
56
57 dev_set_drvdata(wm8400->dev, wm8400);
58
59 /* Check that this is actually a WM8400 */
60 ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, ®);
61 if (ret != 0) {
62 dev_err(wm8400->dev, "Chip ID register read failed\n");
63 return -EIO;
64 }
65 if (reg != 0x6172) {
66 dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
67 reg);
68 return -ENODEV;
69 }
70
71 ret = regmap_read(wm8400->regmap, WM8400_ID, ®);
72 if (ret != 0) {
73 dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
74 return ret;
75 }
76 reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
77 dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
78
79 ret = wm8400_register_codec(wm8400);
80 if (ret != 0) {
81 dev_err(wm8400->dev, "Failed to register codec\n");
82 return ret;
83 }
84
85 if (pdata && pdata->platform_init) {
86 ret = pdata->platform_init(wm8400->dev);
87 if (ret != 0) {
88 dev_err(wm8400->dev, "Platform init failed: %d\n",
89 ret);
90 return ret;
91 }
92 } else
93 dev_warn(wm8400->dev, "No platform initialisation supplied\n");
94
95 return 0;
96}
97
98static const struct regmap_config wm8400_regmap_config = {
99 .reg_bits = 8,
100 .val_bits = 16,
101 .max_register = WM8400_REGISTER_COUNT - 1,
102
103 .volatile_reg = wm8400_volatile,
104
105 .cache_type = REGCACHE_RBTREE,
106};
107
108/**
109 * wm8400_reset_codec_reg_cache - Reset cached codec registers to
110 * their default values.
111 *
112 * @wm8400: pointer to local driver data structure
113 */
114void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
115{
116 regmap_reinit_cache(wm8400->regmap, &wm8400_regmap_config);
117}
118EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
119
120#if IS_ENABLED(CONFIG_I2C)
121static int wm8400_i2c_probe(struct i2c_client *i2c,
122 const struct i2c_device_id *id)
123{
124 struct wm8400 *wm8400;
125
126 wm8400 = devm_kzalloc(&i2c->dev, sizeof(struct wm8400), GFP_KERNEL);
127 if (!wm8400)
128 return -ENOMEM;
129
130 wm8400->regmap = devm_regmap_init_i2c(i2c, &wm8400_regmap_config);
131 if (IS_ERR(wm8400->regmap))
132 return PTR_ERR(wm8400->regmap);
133
134 wm8400->dev = &i2c->dev;
135 i2c_set_clientdata(i2c, wm8400);
136
137 return wm8400_init(wm8400, dev_get_platdata(&i2c->dev));
138}
139
140static const struct i2c_device_id wm8400_i2c_id[] = {
141 { "wm8400", 0 },
142 { }
143};
144
145static struct i2c_driver wm8400_i2c_driver = {
146 .driver = {
147 .name = "WM8400",
148 },
149 .probe = wm8400_i2c_probe,
150 .id_table = wm8400_i2c_id,
151};
152#endif
153
154static int __init wm8400_driver_init(void)
155{
156 int ret = -ENODEV;
157
158#if IS_ENABLED(CONFIG_I2C)
159 ret = i2c_add_driver(&wm8400_i2c_driver);
160 if (ret != 0)
161 pr_err("Failed to register I2C driver: %d\n", ret);
162#endif
163
164 return ret;
165}
166subsys_initcall(wm8400_driver_init);