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  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * MFD core driver for Rockchip RK808/RK818
  4 *
  5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  6 *
  7 * Author: Chris Zhong <zyw@rock-chips.com>
  8 * Author: Zhang Qing <zhangqing@rock-chips.com>
  9 *
 10 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
 11 *
 12 * Author: Wadim Egorov <w.egorov@phytec.de>
 13 */
 14
 15#include <linux/i2c.h>
 16#include <linux/interrupt.h>
 17#include <linux/mfd/rk808.h>
 18#include <linux/mfd/core.h>
 19#include <linux/module.h>
 20#include <linux/of_device.h>
 21#include <linux/regmap.h>
 22
 23struct rk808_reg_data {
 24	int addr;
 25	int mask;
 26	int value;
 27};
 28
 29static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
 30{
 31	/*
 32	 * Notes:
 33	 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
 34	 *   we don't use that feature.  It's better to cache.
 35	 * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
 36	 *   bits are cleared in case when we shutoff anyway, but better safe.
 37	 */
 38
 39	switch (reg) {
 40	case RK808_SECONDS_REG ... RK808_WEEKS_REG:
 41	case RK808_RTC_STATUS_REG:
 42	case RK808_VB_MON_REG:
 43	case RK808_THERMAL_REG:
 44	case RK808_DCDC_UV_STS_REG:
 45	case RK808_LDO_UV_STS_REG:
 46	case RK808_DCDC_PG_REG:
 47	case RK808_LDO_PG_REG:
 48	case RK808_DEVCTRL_REG:
 49	case RK808_INT_STS_REG1:
 50	case RK808_INT_STS_REG2:
 51		return true;
 52	}
 53
 54	return false;
 55}
 56
 57static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg)
 58{
 59	/*
 60	 * Notes:
 61	 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
 62	 *   we don't use that feature.  It's better to cache.
 63	 */
 64
 65	switch (reg) {
 66	case RK817_SECONDS_REG ... RK817_WEEKS_REG:
 67	case RK817_RTC_STATUS_REG:
 68	case RK817_CODEC_DTOP_LPT_SRST:
 69	case RK817_INT_STS_REG0:
 70	case RK817_INT_STS_REG1:
 71	case RK817_INT_STS_REG2:
 72	case RK817_SYS_STS:
 73		return true;
 74	}
 75
 76	return true;
 77}
 78
 79static const struct regmap_config rk818_regmap_config = {
 80	.reg_bits = 8,
 81	.val_bits = 8,
 82	.max_register = RK818_USB_CTRL_REG,
 83	.cache_type = REGCACHE_RBTREE,
 84	.volatile_reg = rk808_is_volatile_reg,
 85};
 86
 87static const struct regmap_config rk805_regmap_config = {
 88	.reg_bits = 8,
 89	.val_bits = 8,
 90	.max_register = RK805_OFF_SOURCE_REG,
 91	.cache_type = REGCACHE_RBTREE,
 92	.volatile_reg = rk808_is_volatile_reg,
 93};
 94
 95static const struct regmap_config rk808_regmap_config = {
 96	.reg_bits = 8,
 97	.val_bits = 8,
 98	.max_register = RK808_IO_POL_REG,
 99	.cache_type = REGCACHE_RBTREE,
100	.volatile_reg = rk808_is_volatile_reg,
101};
102
103static const struct regmap_config rk817_regmap_config = {
104	.reg_bits = 8,
105	.val_bits = 8,
106	.max_register = RK817_GPIO_INT_CFG,
107	.cache_type = REGCACHE_NONE,
108	.volatile_reg = rk817_is_volatile_reg,
109};
110
111static const struct resource rtc_resources[] = {
112	DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM),
113};
114
115static const struct resource rk817_rtc_resources[] = {
116	DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
117};
118
119static const struct resource rk805_key_resources[] = {
120	DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
121	DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
122};
123
124static const struct resource rk817_pwrkey_resources[] = {
125	DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE),
126	DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL),
127};
128
129static const struct mfd_cell rk805s[] = {
130	{ .name = "rk808-clkout", },
131	{ .name = "rk808-regulator", },
132	{ .name = "rk805-pinctrl", },
133	{
134		.name = "rk808-rtc",
135		.num_resources = ARRAY_SIZE(rtc_resources),
136		.resources = &rtc_resources[0],
137	},
138	{	.name = "rk805-pwrkey",
139		.num_resources = ARRAY_SIZE(rk805_key_resources),
140		.resources = &rk805_key_resources[0],
141	},
142};
143
144static const struct mfd_cell rk808s[] = {
145	{ .name = "rk808-clkout", },
146	{ .name = "rk808-regulator", },
147	{
148		.name = "rk808-rtc",
149		.num_resources = ARRAY_SIZE(rtc_resources),
150		.resources = rtc_resources,
151	},
152};
153
154static const struct mfd_cell rk817s[] = {
155	{ .name = "rk808-clkout",},
156	{ .name = "rk808-regulator",},
157	{
158		.name = "rk805-pwrkey",
159		.num_resources = ARRAY_SIZE(rk817_pwrkey_resources),
160		.resources = &rk817_pwrkey_resources[0],
161	},
162	{
163		.name = "rk808-rtc",
164		.num_resources = ARRAY_SIZE(rk817_rtc_resources),
165		.resources = &rk817_rtc_resources[0],
166	},
167	{ .name = "rk817-codec",},
168};
169
170static const struct mfd_cell rk818s[] = {
171	{ .name = "rk808-clkout", },
172	{ .name = "rk808-regulator", },
173	{
174		.name = "rk808-rtc",
175		.num_resources = ARRAY_SIZE(rtc_resources),
176		.resources = rtc_resources,
177	},
178};
179
180static const struct rk808_reg_data rk805_pre_init_reg[] = {
181	{RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
182				 RK805_BUCK1_2_ILMAX_4000MA},
183	{RK805_BUCK2_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
184				 RK805_BUCK1_2_ILMAX_4000MA},
185	{RK805_BUCK3_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
186				 RK805_BUCK3_ILMAX_3000MA},
187	{RK805_BUCK4_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
188				 RK805_BUCK4_ILMAX_3500MA},
189	{RK805_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_400MA},
190	{RK805_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP115C},
191};
192
193static const struct rk808_reg_data rk808_pre_init_reg[] = {
194	{ RK808_BUCK3_CONFIG_REG, BUCK_ILMIN_MASK,  BUCK_ILMIN_150MA },
195	{ RK808_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK,  BUCK_ILMIN_200MA },
196	{ RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
197	{ RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK,  BUCK_ILMIN_200MA },
198	{ RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK,  BUCK_ILMIN_200MA },
199	{ RK808_DCDC_UV_ACT_REG,  BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
200	{ RK808_VB_MON_REG,       MASK_ALL,         VB_LO_ACT |
201						    VB_LO_SEL_3500MV },
202};
203
204static const struct rk808_reg_data rk817_pre_init_reg[] = {
205	{RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP},
206	/* Codec specific registers */
207	{ RK817_CODEC_DTOP_VUCTL, MASK_ALL, 0x03 },
208	{ RK817_CODEC_DTOP_VUCTIME, MASK_ALL, 0x00 },
209	{ RK817_CODEC_DTOP_LPT_SRST, MASK_ALL, 0x00 },
210	{ RK817_CODEC_DTOP_DIGEN_CLKE, MASK_ALL, 0x00 },
211	/* from vendor driver, CODEC_AREF_RTCFG0 not defined in data sheet */
212	{ RK817_CODEC_AREF_RTCFG0, MASK_ALL, 0x00 },
213	{ RK817_CODEC_AREF_RTCFG1, MASK_ALL, 0x06 },
214	{ RK817_CODEC_AADC_CFG0, MASK_ALL, 0xc8 },
215	/* from vendor driver, CODEC_AADC_CFG1 not defined in data sheet */
216	{ RK817_CODEC_AADC_CFG1, MASK_ALL, 0x00 },
217	{ RK817_CODEC_DADC_VOLL, MASK_ALL, 0x00 },
218	{ RK817_CODEC_DADC_VOLR, MASK_ALL, 0x00 },
219	{ RK817_CODEC_DADC_SR_ACL0, MASK_ALL, 0x00 },
220	{ RK817_CODEC_DADC_ALC1, MASK_ALL, 0x00 },
221	{ RK817_CODEC_DADC_ALC2, MASK_ALL, 0x00 },
222	{ RK817_CODEC_DADC_NG, MASK_ALL, 0x00 },
223	{ RK817_CODEC_DADC_HPF, MASK_ALL, 0x00 },
224	{ RK817_CODEC_DADC_RVOLL, MASK_ALL, 0xff },
225	{ RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff },
226	{ RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 },
227	{ RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 },
228	{ RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 },
229	{ RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 },
230	{ RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 },
231	{ RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 },
232	{ RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 },
233	/* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */
234	{ RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 },
235	{ RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 },
236	{ RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 },
237	{ RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 },
238	{ RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 },
239	{ RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 },
240	{ RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 },
241	{ RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 },
242	{ RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 },
243	{ RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff },
244	{ RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff },
245	{ RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 },
246	{ RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 },
247	{ RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 },
248	{ RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 },
249	{ RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 },
250	{ RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 },
251	{ RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 },
252	/* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */
253	{ RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 },
254	{ RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 },
255	{ RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 },
256	{ RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 },
257	{ RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 },
258	{ RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 },
259	{ RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 },
260	{ RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 },
261	{ RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 },
262	{ RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff },
263	{ RK817_CODEC_DDAC_RVOLR, MASK_ALL, 0xff },
264	{ RK817_CODEC_AHP_ANTI0, MASK_ALL, 0x00 },
265	{ RK817_CODEC_AHP_ANTI1, MASK_ALL, 0x00 },
266	{ RK817_CODEC_AHP_CFG0, MASK_ALL, 0xe0 },
267	{ RK817_CODEC_AHP_CFG1, MASK_ALL, 0x1f },
268	{ RK817_CODEC_AHP_CP, MASK_ALL, 0x09 },
269	{ RK817_CODEC_ACLASSD_CFG1, MASK_ALL, 0x69 },
270	{ RK817_CODEC_ACLASSD_CFG2, MASK_ALL, 0x44 },
271	{ RK817_CODEC_APLL_CFG0, MASK_ALL, 0x04 },
272	{ RK817_CODEC_APLL_CFG1, MASK_ALL, 0x00 },
273	{ RK817_CODEC_APLL_CFG2, MASK_ALL, 0x30 },
274	{ RK817_CODEC_APLL_CFG3, MASK_ALL, 0x19 },
275	{ RK817_CODEC_APLL_CFG4, MASK_ALL, 0x65 },
276	{ RK817_CODEC_APLL_CFG5, MASK_ALL, 0x01 },
277	{ RK817_CODEC_DI2S_CKM, MASK_ALL, 0x01 },
278	{ RK817_CODEC_DI2S_RSD, MASK_ALL, 0x00 },
279	{ RK817_CODEC_DI2S_RXCR1, MASK_ALL, 0x00 },
280	{ RK817_CODEC_DI2S_RXCR2, MASK_ALL, 0x17 },
281	{ RK817_CODEC_DI2S_RXCMD_TSD, MASK_ALL, 0x00 },
282	{ RK817_CODEC_DI2S_TXCR1, MASK_ALL, 0x00 },
283	{ RK817_CODEC_DI2S_TXCR2, MASK_ALL, 0x17 },
284	{ RK817_CODEC_DI2S_TXCR3_TXCMD, MASK_ALL, 0x00 },
285	{RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L},
286	{RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK,
287					   RK817_HOTDIE_105 | RK817_TSD_140},
288};
289
290static const struct rk808_reg_data rk818_pre_init_reg[] = {
291	/* improve efficiency */
292	{ RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK,  BUCK_ILMIN_250MA },
293	{ RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK,  BUCK_ILMIN_250MA },
294	{ RK818_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
295	{ RK818_USB_CTRL_REG,	  RK818_USB_ILIM_SEL_MASK,
296						    RK818_USB_ILMIN_2000MA },
297	/* close charger when usb lower then 3.4V */
298	{ RK818_USB_CTRL_REG,	  RK818_USB_CHG_SD_VSEL_MASK,
299						    (0x7 << 4) },
300	/* no action when vref */
301	{ RK818_H5V_EN_REG,	  BIT(1),	    RK818_REF_RDY_CTRL },
302	/* enable HDMI 5V */
303	{ RK818_H5V_EN_REG,	  BIT(0),	    RK818_H5V_EN },
304	{ RK808_VB_MON_REG,	  MASK_ALL,	    VB_LO_ACT |
305						    VB_LO_SEL_3500MV },
306};
307
308static const struct regmap_irq rk805_irqs[] = {
309	[RK805_IRQ_PWRON_RISE] = {
310		.mask = RK805_IRQ_PWRON_RISE_MSK,
311		.reg_offset = 0,
312	},
313	[RK805_IRQ_VB_LOW] = {
314		.mask = RK805_IRQ_VB_LOW_MSK,
315		.reg_offset = 0,
316	},
317	[RK805_IRQ_PWRON] = {
318		.mask = RK805_IRQ_PWRON_MSK,
319		.reg_offset = 0,
320	},
321	[RK805_IRQ_PWRON_LP] = {
322		.mask = RK805_IRQ_PWRON_LP_MSK,
323		.reg_offset = 0,
324	},
325	[RK805_IRQ_HOTDIE] = {
326		.mask = RK805_IRQ_HOTDIE_MSK,
327		.reg_offset = 0,
328	},
329	[RK805_IRQ_RTC_ALARM] = {
330		.mask = RK805_IRQ_RTC_ALARM_MSK,
331		.reg_offset = 0,
332	},
333	[RK805_IRQ_RTC_PERIOD] = {
334		.mask = RK805_IRQ_RTC_PERIOD_MSK,
335		.reg_offset = 0,
336	},
337	[RK805_IRQ_PWRON_FALL] = {
338		.mask = RK805_IRQ_PWRON_FALL_MSK,
339		.reg_offset = 0,
340	},
341};
342
343static const struct regmap_irq rk808_irqs[] = {
344	/* INT_STS */
345	[RK808_IRQ_VOUT_LO] = {
346		.mask = RK808_IRQ_VOUT_LO_MSK,
347		.reg_offset = 0,
348	},
349	[RK808_IRQ_VB_LO] = {
350		.mask = RK808_IRQ_VB_LO_MSK,
351		.reg_offset = 0,
352	},
353	[RK808_IRQ_PWRON] = {
354		.mask = RK808_IRQ_PWRON_MSK,
355		.reg_offset = 0,
356	},
357	[RK808_IRQ_PWRON_LP] = {
358		.mask = RK808_IRQ_PWRON_LP_MSK,
359		.reg_offset = 0,
360	},
361	[RK808_IRQ_HOTDIE] = {
362		.mask = RK808_IRQ_HOTDIE_MSK,
363		.reg_offset = 0,
364	},
365	[RK808_IRQ_RTC_ALARM] = {
366		.mask = RK808_IRQ_RTC_ALARM_MSK,
367		.reg_offset = 0,
368	},
369	[RK808_IRQ_RTC_PERIOD] = {
370		.mask = RK808_IRQ_RTC_PERIOD_MSK,
371		.reg_offset = 0,
372	},
373
374	/* INT_STS2 */
375	[RK808_IRQ_PLUG_IN_INT] = {
376		.mask = RK808_IRQ_PLUG_IN_INT_MSK,
377		.reg_offset = 1,
378	},
379	[RK808_IRQ_PLUG_OUT_INT] = {
380		.mask = RK808_IRQ_PLUG_OUT_INT_MSK,
381		.reg_offset = 1,
382	},
383};
384
385static const struct regmap_irq rk818_irqs[] = {
386	/* INT_STS */
387	[RK818_IRQ_VOUT_LO] = {
388		.mask = RK818_IRQ_VOUT_LO_MSK,
389		.reg_offset = 0,
390	},
391	[RK818_IRQ_VB_LO] = {
392		.mask = RK818_IRQ_VB_LO_MSK,
393		.reg_offset = 0,
394	},
395	[RK818_IRQ_PWRON] = {
396		.mask = RK818_IRQ_PWRON_MSK,
397		.reg_offset = 0,
398	},
399	[RK818_IRQ_PWRON_LP] = {
400		.mask = RK818_IRQ_PWRON_LP_MSK,
401		.reg_offset = 0,
402	},
403	[RK818_IRQ_HOTDIE] = {
404		.mask = RK818_IRQ_HOTDIE_MSK,
405		.reg_offset = 0,
406	},
407	[RK818_IRQ_RTC_ALARM] = {
408		.mask = RK818_IRQ_RTC_ALARM_MSK,
409		.reg_offset = 0,
410	},
411	[RK818_IRQ_RTC_PERIOD] = {
412		.mask = RK818_IRQ_RTC_PERIOD_MSK,
413		.reg_offset = 0,
414	},
415	[RK818_IRQ_USB_OV] = {
416		.mask = RK818_IRQ_USB_OV_MSK,
417		.reg_offset = 0,
418	},
419
420	/* INT_STS2 */
421	[RK818_IRQ_PLUG_IN] = {
422		.mask = RK818_IRQ_PLUG_IN_MSK,
423		.reg_offset = 1,
424	},
425	[RK818_IRQ_PLUG_OUT] = {
426		.mask = RK818_IRQ_PLUG_OUT_MSK,
427		.reg_offset = 1,
428	},
429	[RK818_IRQ_CHG_OK] = {
430		.mask = RK818_IRQ_CHG_OK_MSK,
431		.reg_offset = 1,
432	},
433	[RK818_IRQ_CHG_TE] = {
434		.mask = RK818_IRQ_CHG_TE_MSK,
435		.reg_offset = 1,
436	},
437	[RK818_IRQ_CHG_TS1] = {
438		.mask = RK818_IRQ_CHG_TS1_MSK,
439		.reg_offset = 1,
440	},
441	[RK818_IRQ_TS2] = {
442		.mask = RK818_IRQ_TS2_MSK,
443		.reg_offset = 1,
444	},
445	[RK818_IRQ_CHG_CVTLIM] = {
446		.mask = RK818_IRQ_CHG_CVTLIM_MSK,
447		.reg_offset = 1,
448	},
449	[RK818_IRQ_DISCHG_ILIM] = {
450		.mask = RK818_IRQ_DISCHG_ILIM_MSK,
451		.reg_offset = 1,
452	},
453};
454
455static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
456	REGMAP_IRQ_REG_LINE(0, 8),
457	REGMAP_IRQ_REG_LINE(1, 8),
458	REGMAP_IRQ_REG_LINE(2, 8),
459	REGMAP_IRQ_REG_LINE(3, 8),
460	REGMAP_IRQ_REG_LINE(4, 8),
461	REGMAP_IRQ_REG_LINE(5, 8),
462	REGMAP_IRQ_REG_LINE(6, 8),
463	REGMAP_IRQ_REG_LINE(7, 8),
464	REGMAP_IRQ_REG_LINE(8, 8),
465	REGMAP_IRQ_REG_LINE(9, 8),
466	REGMAP_IRQ_REG_LINE(10, 8),
467	REGMAP_IRQ_REG_LINE(11, 8),
468	REGMAP_IRQ_REG_LINE(12, 8),
469	REGMAP_IRQ_REG_LINE(13, 8),
470	REGMAP_IRQ_REG_LINE(14, 8),
471	REGMAP_IRQ_REG_LINE(15, 8),
472	REGMAP_IRQ_REG_LINE(16, 8),
473	REGMAP_IRQ_REG_LINE(17, 8),
474	REGMAP_IRQ_REG_LINE(18, 8),
475	REGMAP_IRQ_REG_LINE(19, 8),
476	REGMAP_IRQ_REG_LINE(20, 8),
477	REGMAP_IRQ_REG_LINE(21, 8),
478	REGMAP_IRQ_REG_LINE(22, 8),
479	REGMAP_IRQ_REG_LINE(23, 8)
480};
481
482static struct regmap_irq_chip rk805_irq_chip = {
483	.name = "rk805",
484	.irqs = rk805_irqs,
485	.num_irqs = ARRAY_SIZE(rk805_irqs),
486	.num_regs = 1,
487	.status_base = RK805_INT_STS_REG,
488	.mask_base = RK805_INT_STS_MSK_REG,
489	.ack_base = RK805_INT_STS_REG,
490	.init_ack_masked = true,
491};
492
493static const struct regmap_irq_chip rk808_irq_chip = {
494	.name = "rk808",
495	.irqs = rk808_irqs,
496	.num_irqs = ARRAY_SIZE(rk808_irqs),
497	.num_regs = 2,
498	.irq_reg_stride = 2,
499	.status_base = RK808_INT_STS_REG1,
500	.mask_base = RK808_INT_STS_MSK_REG1,
501	.ack_base = RK808_INT_STS_REG1,
502	.init_ack_masked = true,
503};
504
505static struct regmap_irq_chip rk817_irq_chip = {
506	.name = "rk817",
507	.irqs = rk817_irqs,
508	.num_irqs = ARRAY_SIZE(rk817_irqs),
509	.num_regs = 3,
510	.irq_reg_stride = 2,
511	.status_base = RK817_INT_STS_REG0,
512	.mask_base = RK817_INT_STS_MSK_REG0,
513	.ack_base = RK817_INT_STS_REG0,
514	.init_ack_masked = true,
515};
516
517static const struct regmap_irq_chip rk818_irq_chip = {
518	.name = "rk818",
519	.irqs = rk818_irqs,
520	.num_irqs = ARRAY_SIZE(rk818_irqs),
521	.num_regs = 2,
522	.irq_reg_stride = 2,
523	.status_base = RK818_INT_STS_REG1,
524	.mask_base = RK818_INT_STS_MSK_REG1,
525	.ack_base = RK818_INT_STS_REG1,
526	.init_ack_masked = true,
527};
528
529static struct i2c_client *rk808_i2c_client;
530
531static void rk808_pm_power_off(void)
532{
533	int ret;
534	unsigned int reg, bit;
535	struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
536
537	switch (rk808->variant) {
538	case RK805_ID:
539		reg = RK805_DEV_CTRL_REG;
540		bit = DEV_OFF;
541		break;
542	case RK808_ID:
543		reg = RK808_DEVCTRL_REG,
544		bit = DEV_OFF_RST;
545		break;
546	case RK818_ID:
547		reg = RK818_DEVCTRL_REG;
548		bit = DEV_OFF;
549		break;
550	default:
551		return;
552	}
553	ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
554	if (ret)
555		dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n");
556}
557
558static void rk8xx_shutdown(struct i2c_client *client)
559{
560	struct rk808 *rk808 = i2c_get_clientdata(client);
561	int ret;
562
563	switch (rk808->variant) {
564	case RK805_ID:
565		ret = regmap_update_bits(rk808->regmap,
566					 RK805_GPIO_IO_POL_REG,
567					 SLP_SD_MSK,
568					 SHUTDOWN_FUN);
569		break;
570	case RK809_ID:
571	case RK817_ID:
572		ret = regmap_update_bits(rk808->regmap,
573					 RK817_SYS_CFG(3),
574					 RK817_SLPPIN_FUNC_MSK,
575					 SLPPIN_DN_FUN);
576		break;
577	default:
578		return;
579	}
580	if (ret)
581		dev_warn(&client->dev,
582			 "Cannot switch to power down function\n");
583}
584
585static const struct of_device_id rk808_of_match[] = {
586	{ .compatible = "rockchip,rk805" },
587	{ .compatible = "rockchip,rk808" },
588	{ .compatible = "rockchip,rk809" },
589	{ .compatible = "rockchip,rk817" },
590	{ .compatible = "rockchip,rk818" },
591	{ },
592};
593MODULE_DEVICE_TABLE(of, rk808_of_match);
594
595static int rk808_probe(struct i2c_client *client,
596		       const struct i2c_device_id *id)
597{
598	struct device_node *np = client->dev.of_node;
599	struct rk808 *rk808;
600	const struct rk808_reg_data *pre_init_reg;
601	const struct mfd_cell *cells;
602	int nr_pre_init_regs;
603	int nr_cells;
604	int msb, lsb;
605	unsigned char pmic_id_msb, pmic_id_lsb;
606	int ret;
607	int i;
608
609	rk808 = devm_kzalloc(&client->dev, sizeof(*rk808), GFP_KERNEL);
610	if (!rk808)
611		return -ENOMEM;
612
613	if (of_device_is_compatible(np, "rockchip,rk817") ||
614	    of_device_is_compatible(np, "rockchip,rk809")) {
615		pmic_id_msb = RK817_ID_MSB;
616		pmic_id_lsb = RK817_ID_LSB;
617	} else {
618		pmic_id_msb = RK808_ID_MSB;
619		pmic_id_lsb = RK808_ID_LSB;
620	}
621
622	/* Read chip variant */
623	msb = i2c_smbus_read_byte_data(client, pmic_id_msb);
624	if (msb < 0) {
625		dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
626			RK808_ID_MSB);
627		return msb;
628	}
629
630	lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb);
631	if (lsb < 0) {
632		dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
633			RK808_ID_LSB);
634		return lsb;
635	}
636
637	rk808->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
638	dev_info(&client->dev, "chip id: 0x%x\n", (unsigned int)rk808->variant);
639
640	switch (rk808->variant) {
641	case RK805_ID:
642		rk808->regmap_cfg = &rk805_regmap_config;
643		rk808->regmap_irq_chip = &rk805_irq_chip;
644		pre_init_reg = rk805_pre_init_reg;
645		nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg);
646		cells = rk805s;
647		nr_cells = ARRAY_SIZE(rk805s);
648		break;
649	case RK808_ID:
650		rk808->regmap_cfg = &rk808_regmap_config;
651		rk808->regmap_irq_chip = &rk808_irq_chip;
652		pre_init_reg = rk808_pre_init_reg;
653		nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg);
654		cells = rk808s;
655		nr_cells = ARRAY_SIZE(rk808s);
656		break;
657	case RK818_ID:
658		rk808->regmap_cfg = &rk818_regmap_config;
659		rk808->regmap_irq_chip = &rk818_irq_chip;
660		pre_init_reg = rk818_pre_init_reg;
661		nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg);
662		cells = rk818s;
663		nr_cells = ARRAY_SIZE(rk818s);
664		break;
665	case RK809_ID:
666	case RK817_ID:
667		rk808->regmap_cfg = &rk817_regmap_config;
668		rk808->regmap_irq_chip = &rk817_irq_chip;
669		pre_init_reg = rk817_pre_init_reg;
670		nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg);
671		cells = rk817s;
672		nr_cells = ARRAY_SIZE(rk817s);
673		break;
674	default:
675		dev_err(&client->dev, "Unsupported RK8XX ID %lu\n",
676			rk808->variant);
677		return -EINVAL;
678	}
679
680	rk808->i2c = client;
681	i2c_set_clientdata(client, rk808);
682
683	rk808->regmap = devm_regmap_init_i2c(client, rk808->regmap_cfg);
684	if (IS_ERR(rk808->regmap)) {
685		dev_err(&client->dev, "regmap initialization failed\n");
686		return PTR_ERR(rk808->regmap);
687	}
688
689	if (!client->irq) {
690		dev_err(&client->dev, "No interrupt support, no core IRQ\n");
691		return -EINVAL;
692	}
693
694	ret = regmap_add_irq_chip(rk808->regmap, client->irq,
695				  IRQF_ONESHOT, -1,
696				  rk808->regmap_irq_chip, &rk808->irq_data);
697	if (ret) {
698		dev_err(&client->dev, "Failed to add irq_chip %d\n", ret);
699		return ret;
700	}
701
702	for (i = 0; i < nr_pre_init_regs; i++) {
703		ret = regmap_update_bits(rk808->regmap,
704					pre_init_reg[i].addr,
705					pre_init_reg[i].mask,
706					pre_init_reg[i].value);
707		if (ret) {
708			dev_err(&client->dev,
709				"0x%x write err\n",
710				pre_init_reg[i].addr);
711			return ret;
712		}
713	}
714
715	ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE,
716			      cells, nr_cells, NULL, 0,
717			      regmap_irq_get_domain(rk808->irq_data));
718	if (ret) {
719		dev_err(&client->dev, "failed to add MFD devices %d\n", ret);
720		goto err_irq;
721	}
722
723	if (of_property_read_bool(np, "rockchip,system-power-controller")) {
724		rk808_i2c_client = client;
725		pm_power_off = rk808_pm_power_off;
726	}
727
728	return 0;
729
730err_irq:
731	regmap_del_irq_chip(client->irq, rk808->irq_data);
732	return ret;
733}
734
735static int rk808_remove(struct i2c_client *client)
736{
737	struct rk808 *rk808 = i2c_get_clientdata(client);
738
739	regmap_del_irq_chip(client->irq, rk808->irq_data);
740
741	/**
742	 * pm_power_off may points to a function from another module.
743	 * Check if the pointer is set by us and only then overwrite it.
744	 */
745	if (pm_power_off == rk808_pm_power_off)
746		pm_power_off = NULL;
747
748	return 0;
749}
750
751static int __maybe_unused rk8xx_suspend(struct device *dev)
752{
753	struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
754	int ret = 0;
755
756	switch (rk808->variant) {
757	case RK805_ID:
758		ret = regmap_update_bits(rk808->regmap,
759					 RK805_GPIO_IO_POL_REG,
760					 SLP_SD_MSK,
761					 SLEEP_FUN);
762		break;
763	case RK809_ID:
764	case RK817_ID:
765		ret = regmap_update_bits(rk808->regmap,
766					 RK817_SYS_CFG(3),
767					 RK817_SLPPIN_FUNC_MSK,
768					 SLPPIN_SLP_FUN);
769		break;
770	default:
771		break;
772	}
773
774	return ret;
775}
776
777static int __maybe_unused rk8xx_resume(struct device *dev)
778{
779	struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
780	int ret = 0;
781
782	switch (rk808->variant) {
783	case RK809_ID:
784	case RK817_ID:
785		ret = regmap_update_bits(rk808->regmap,
786					 RK817_SYS_CFG(3),
787					 RK817_SLPPIN_FUNC_MSK,
788					 SLPPIN_NULL_FUN);
789		break;
790	default:
791		break;
792	}
793
794	return ret;
795}
796static SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume);
797
798static struct i2c_driver rk808_i2c_driver = {
799	.driver = {
800		.name = "rk808",
801		.of_match_table = rk808_of_match,
802		.pm = &rk8xx_pm_ops,
803	},
804	.probe    = rk808_probe,
805	.remove   = rk808_remove,
806	.shutdown = rk8xx_shutdown,
807};
808
809module_i2c_driver(rk808_i2c_driver);
810
811MODULE_LICENSE("GPL");
812MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
813MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
814MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
815MODULE_DESCRIPTION("RK808/RK818 PMIC driver");