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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * ltr501.c - Support for Lite-On LTR501 ambient light and proximity sensor
4 *
5 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6 *
7 * 7-bit I2C slave address 0x23
8 *
9 * TODO: IR LED characteristics
10 */
11
12#include <linux/module.h>
13#include <linux/i2c.h>
14#include <linux/err.h>
15#include <linux/delay.h>
16#include <linux/regmap.h>
17#include <linux/acpi.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/events.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/buffer.h>
24#include <linux/iio/triggered_buffer.h>
25
26#define LTR501_DRV_NAME "ltr501"
27
28#define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
29#define LTR501_PS_CONTR 0x81 /* PS operation mode */
30#define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
31#define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
32#define LTR501_PART_ID 0x86
33#define LTR501_MANUFAC_ID 0x87
34#define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
35#define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */
36#define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
37#define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */
38#define LTR501_ALS_PS_STATUS 0x8c
39#define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
40#define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */
41#define LTR501_INTR 0x8f /* output mode, polarity, mode */
42#define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
43#define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
44#define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
45#define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
46#define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
47#define LTR501_MAX_REG 0x9f
48
49#define LTR501_ALS_CONTR_SW_RESET BIT(2)
50#define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
51#define LTR501_CONTR_PS_GAIN_SHIFT 2
52#define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
53#define LTR501_CONTR_ACTIVE BIT(1)
54
55#define LTR501_STATUS_ALS_INTR BIT(3)
56#define LTR501_STATUS_ALS_RDY BIT(2)
57#define LTR501_STATUS_PS_INTR BIT(1)
58#define LTR501_STATUS_PS_RDY BIT(0)
59
60#define LTR501_PS_DATA_MASK 0x7ff
61#define LTR501_PS_THRESH_MASK 0x7ff
62#define LTR501_ALS_THRESH_MASK 0xffff
63
64#define LTR501_ALS_DEF_PERIOD 500000
65#define LTR501_PS_DEF_PERIOD 100000
66
67#define LTR501_REGMAP_NAME "ltr501_regmap"
68
69#define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
70 ((vis_coeff * vis_data) - (ir_coeff * ir_data))
71
72static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
73
74static const struct reg_field reg_field_it =
75 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
76static const struct reg_field reg_field_als_intr =
77 REG_FIELD(LTR501_INTR, 1, 1);
78static const struct reg_field reg_field_ps_intr =
79 REG_FIELD(LTR501_INTR, 0, 0);
80static const struct reg_field reg_field_als_rate =
81 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
82static const struct reg_field reg_field_ps_rate =
83 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
84static const struct reg_field reg_field_als_prst =
85 REG_FIELD(LTR501_INTR_PRST, 0, 3);
86static const struct reg_field reg_field_ps_prst =
87 REG_FIELD(LTR501_INTR_PRST, 4, 7);
88
89struct ltr501_samp_table {
90 int freq_val; /* repetition frequency in micro HZ*/
91 int time_val; /* repetition rate in micro seconds */
92};
93
94#define LTR501_RESERVED_GAIN -1
95
96enum {
97 ltr501 = 0,
98 ltr559,
99 ltr301,
100};
101
102struct ltr501_gain {
103 int scale;
104 int uscale;
105};
106
107static const struct ltr501_gain ltr501_als_gain_tbl[] = {
108 {1, 0},
109 {0, 5000},
110};
111
112static const struct ltr501_gain ltr559_als_gain_tbl[] = {
113 {1, 0},
114 {0, 500000},
115 {0, 250000},
116 {0, 125000},
117 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
118 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
119 {0, 20000},
120 {0, 10000},
121};
122
123static const struct ltr501_gain ltr501_ps_gain_tbl[] = {
124 {1, 0},
125 {0, 250000},
126 {0, 125000},
127 {0, 62500},
128};
129
130static const struct ltr501_gain ltr559_ps_gain_tbl[] = {
131 {0, 62500}, /* x16 gain */
132 {0, 31250}, /* x32 gain */
133 {0, 15625}, /* bits X1 are for x64 gain */
134 {0, 15624},
135};
136
137struct ltr501_chip_info {
138 u8 partid;
139 const struct ltr501_gain *als_gain;
140 int als_gain_tbl_size;
141 const struct ltr501_gain *ps_gain;
142 int ps_gain_tbl_size;
143 u8 als_mode_active;
144 u8 als_gain_mask;
145 u8 als_gain_shift;
146 struct iio_chan_spec const *channels;
147 const int no_channels;
148 const struct iio_info *info;
149 const struct iio_info *info_no_irq;
150};
151
152struct ltr501_data {
153 struct i2c_client *client;
154 struct mutex lock_als, lock_ps;
155 const struct ltr501_chip_info *chip_info;
156 u8 als_contr, ps_contr;
157 int als_period, ps_period; /* period in micro seconds */
158 struct regmap *regmap;
159 struct regmap_field *reg_it;
160 struct regmap_field *reg_als_intr;
161 struct regmap_field *reg_ps_intr;
162 struct regmap_field *reg_als_rate;
163 struct regmap_field *reg_ps_rate;
164 struct regmap_field *reg_als_prst;
165 struct regmap_field *reg_ps_prst;
166};
167
168static const struct ltr501_samp_table ltr501_als_samp_table[] = {
169 {20000000, 50000}, {10000000, 100000},
170 {5000000, 200000}, {2000000, 500000},
171 {1000000, 1000000}, {500000, 2000000},
172 {500000, 2000000}, {500000, 2000000}
173};
174
175static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
176 {20000000, 50000}, {14285714, 70000},
177 {10000000, 100000}, {5000000, 200000},
178 {2000000, 500000}, {1000000, 1000000},
179 {500000, 2000000}, {500000, 2000000},
180 {500000, 2000000}
181};
182
183static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
184 int len, int val, int val2)
185{
186 int i, freq;
187
188 freq = val * 1000000 + val2;
189
190 for (i = 0; i < len; i++) {
191 if (tab[i].freq_val == freq)
192 return i;
193 }
194
195 return -EINVAL;
196}
197
198static int ltr501_als_read_samp_freq(const struct ltr501_data *data,
199 int *val, int *val2)
200{
201 int ret, i;
202
203 ret = regmap_field_read(data->reg_als_rate, &i);
204 if (ret < 0)
205 return ret;
206
207 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
208 return -EINVAL;
209
210 *val = ltr501_als_samp_table[i].freq_val / 1000000;
211 *val2 = ltr501_als_samp_table[i].freq_val % 1000000;
212
213 return IIO_VAL_INT_PLUS_MICRO;
214}
215
216static int ltr501_ps_read_samp_freq(const struct ltr501_data *data,
217 int *val, int *val2)
218{
219 int ret, i;
220
221 ret = regmap_field_read(data->reg_ps_rate, &i);
222 if (ret < 0)
223 return ret;
224
225 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
226 return -EINVAL;
227
228 *val = ltr501_ps_samp_table[i].freq_val / 1000000;
229 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
230
231 return IIO_VAL_INT_PLUS_MICRO;
232}
233
234static int ltr501_als_write_samp_freq(struct ltr501_data *data,
235 int val, int val2)
236{
237 int i, ret;
238
239 i = ltr501_match_samp_freq(ltr501_als_samp_table,
240 ARRAY_SIZE(ltr501_als_samp_table),
241 val, val2);
242
243 if (i < 0)
244 return i;
245
246 mutex_lock(&data->lock_als);
247 ret = regmap_field_write(data->reg_als_rate, i);
248 mutex_unlock(&data->lock_als);
249
250 return ret;
251}
252
253static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
254 int val, int val2)
255{
256 int i, ret;
257
258 i = ltr501_match_samp_freq(ltr501_ps_samp_table,
259 ARRAY_SIZE(ltr501_ps_samp_table),
260 val, val2);
261
262 if (i < 0)
263 return i;
264
265 mutex_lock(&data->lock_ps);
266 ret = regmap_field_write(data->reg_ps_rate, i);
267 mutex_unlock(&data->lock_ps);
268
269 return ret;
270}
271
272static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val)
273{
274 int ret, i;
275
276 ret = regmap_field_read(data->reg_als_rate, &i);
277 if (ret < 0)
278 return ret;
279
280 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
281 return -EINVAL;
282
283 *val = ltr501_als_samp_table[i].time_val;
284
285 return IIO_VAL_INT;
286}
287
288static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val)
289{
290 int ret, i;
291
292 ret = regmap_field_read(data->reg_ps_rate, &i);
293 if (ret < 0)
294 return ret;
295
296 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
297 return -EINVAL;
298
299 *val = ltr501_ps_samp_table[i].time_val;
300
301 return IIO_VAL_INT;
302}
303
304/* IR and visible spectrum coeff's are given in data sheet */
305static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
306{
307 unsigned long ratio, lux;
308
309 if (vis_data == 0)
310 return 0;
311
312 /* multiply numerator by 100 to avoid handling ratio < 1 */
313 ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
314
315 if (ratio < 45)
316 lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
317 else if (ratio >= 45 && ratio < 64)
318 lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
319 else if (ratio >= 64 && ratio < 85)
320 lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
321 else
322 lux = 0;
323
324 return lux / 1000;
325}
326
327static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask)
328{
329 int tries = 100;
330 int ret, status;
331
332 while (tries--) {
333 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
334 if (ret < 0)
335 return ret;
336 if ((status & drdy_mask) == drdy_mask)
337 return 0;
338 msleep(25);
339 }
340
341 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
342 return -EIO;
343}
344
345static int ltr501_set_it_time(struct ltr501_data *data, int it)
346{
347 int ret, i, index = -1, status;
348
349 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
350 if (int_time_mapping[i] == it) {
351 index = i;
352 break;
353 }
354 }
355 /* Make sure integ time index is valid */
356 if (index < 0)
357 return -EINVAL;
358
359 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
360 if (ret < 0)
361 return ret;
362
363 if (status & LTR501_CONTR_ALS_GAIN_MASK) {
364 /*
365 * 200 ms and 400 ms integ time can only be
366 * used in dynamic range 1
367 */
368 if (index > 1)
369 return -EINVAL;
370 } else
371 /* 50 ms integ time can only be used in dynamic range 2 */
372 if (index == 1)
373 return -EINVAL;
374
375 return regmap_field_write(data->reg_it, index);
376}
377
378/* read int time in micro seconds */
379static int ltr501_read_it_time(const struct ltr501_data *data,
380 int *val, int *val2)
381{
382 int ret, index;
383
384 ret = regmap_field_read(data->reg_it, &index);
385 if (ret < 0)
386 return ret;
387
388 /* Make sure integ time index is valid */
389 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
390 return -EINVAL;
391
392 *val2 = int_time_mapping[index];
393 *val = 0;
394
395 return IIO_VAL_INT_PLUS_MICRO;
396}
397
398static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2])
399{
400 int ret;
401
402 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
403 if (ret < 0)
404 return ret;
405 /* always read both ALS channels in given order */
406 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
407 buf, 2 * sizeof(__le16));
408}
409
410static int ltr501_read_ps(const struct ltr501_data *data)
411{
412 __le16 status;
413 int ret;
414
415 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
416 if (ret < 0)
417 return ret;
418
419 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
420 &status, sizeof(status));
421 if (ret < 0)
422 return ret;
423
424 return le16_to_cpu(status);
425}
426
427static int ltr501_read_intr_prst(const struct ltr501_data *data,
428 enum iio_chan_type type,
429 int *val2)
430{
431 int ret, samp_period, prst;
432
433 switch (type) {
434 case IIO_INTENSITY:
435 ret = regmap_field_read(data->reg_als_prst, &prst);
436 if (ret < 0)
437 return ret;
438
439 ret = ltr501_als_read_samp_period(data, &samp_period);
440
441 if (ret < 0)
442 return ret;
443 *val2 = samp_period * prst;
444 return IIO_VAL_INT_PLUS_MICRO;
445 case IIO_PROXIMITY:
446 ret = regmap_field_read(data->reg_ps_prst, &prst);
447 if (ret < 0)
448 return ret;
449
450 ret = ltr501_ps_read_samp_period(data, &samp_period);
451
452 if (ret < 0)
453 return ret;
454
455 *val2 = samp_period * prst;
456 return IIO_VAL_INT_PLUS_MICRO;
457 default:
458 return -EINVAL;
459 }
460
461 return -EINVAL;
462}
463
464static int ltr501_write_intr_prst(struct ltr501_data *data,
465 enum iio_chan_type type,
466 int val, int val2)
467{
468 int ret, samp_period, new_val;
469 unsigned long period;
470
471 if (val < 0 || val2 < 0)
472 return -EINVAL;
473
474 /* period in microseconds */
475 period = ((val * 1000000) + val2);
476
477 switch (type) {
478 case IIO_INTENSITY:
479 ret = ltr501_als_read_samp_period(data, &samp_period);
480 if (ret < 0)
481 return ret;
482
483 /* period should be atleast equal to sampling period */
484 if (period < samp_period)
485 return -EINVAL;
486
487 new_val = DIV_ROUND_UP(period, samp_period);
488 if (new_val < 0 || new_val > 0x0f)
489 return -EINVAL;
490
491 mutex_lock(&data->lock_als);
492 ret = regmap_field_write(data->reg_als_prst, new_val);
493 mutex_unlock(&data->lock_als);
494 if (ret >= 0)
495 data->als_period = period;
496
497 return ret;
498 case IIO_PROXIMITY:
499 ret = ltr501_ps_read_samp_period(data, &samp_period);
500 if (ret < 0)
501 return ret;
502
503 /* period should be atleast equal to rate */
504 if (period < samp_period)
505 return -EINVAL;
506
507 new_val = DIV_ROUND_UP(period, samp_period);
508 if (new_val < 0 || new_val > 0x0f)
509 return -EINVAL;
510
511 mutex_lock(&data->lock_ps);
512 ret = regmap_field_write(data->reg_ps_prst, new_val);
513 mutex_unlock(&data->lock_ps);
514 if (ret >= 0)
515 data->ps_period = period;
516
517 return ret;
518 default:
519 return -EINVAL;
520 }
521
522 return -EINVAL;
523}
524
525static const struct iio_event_spec ltr501_als_event_spec[] = {
526 {
527 .type = IIO_EV_TYPE_THRESH,
528 .dir = IIO_EV_DIR_RISING,
529 .mask_separate = BIT(IIO_EV_INFO_VALUE),
530 }, {
531 .type = IIO_EV_TYPE_THRESH,
532 .dir = IIO_EV_DIR_FALLING,
533 .mask_separate = BIT(IIO_EV_INFO_VALUE),
534 }, {
535 .type = IIO_EV_TYPE_THRESH,
536 .dir = IIO_EV_DIR_EITHER,
537 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
538 BIT(IIO_EV_INFO_PERIOD),
539 },
540
541};
542
543static const struct iio_event_spec ltr501_pxs_event_spec[] = {
544 {
545 .type = IIO_EV_TYPE_THRESH,
546 .dir = IIO_EV_DIR_RISING,
547 .mask_separate = BIT(IIO_EV_INFO_VALUE),
548 }, {
549 .type = IIO_EV_TYPE_THRESH,
550 .dir = IIO_EV_DIR_FALLING,
551 .mask_separate = BIT(IIO_EV_INFO_VALUE),
552 }, {
553 .type = IIO_EV_TYPE_THRESH,
554 .dir = IIO_EV_DIR_EITHER,
555 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
556 BIT(IIO_EV_INFO_PERIOD),
557 },
558};
559
560#define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
561 _evspec, _evsize) { \
562 .type = IIO_INTENSITY, \
563 .modified = 1, \
564 .address = (_addr), \
565 .channel2 = (_mod), \
566 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
567 .info_mask_shared_by_type = (_shared), \
568 .scan_index = (_idx), \
569 .scan_type = { \
570 .sign = 'u', \
571 .realbits = 16, \
572 .storagebits = 16, \
573 .endianness = IIO_CPU, \
574 }, \
575 .event_spec = _evspec,\
576 .num_event_specs = _evsize,\
577}
578
579#define LTR501_LIGHT_CHANNEL() { \
580 .type = IIO_LIGHT, \
581 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
582 .scan_index = -1, \
583}
584
585static const struct iio_chan_spec ltr501_channels[] = {
586 LTR501_LIGHT_CHANNEL(),
587 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
588 ltr501_als_event_spec,
589 ARRAY_SIZE(ltr501_als_event_spec)),
590 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
591 BIT(IIO_CHAN_INFO_SCALE) |
592 BIT(IIO_CHAN_INFO_INT_TIME) |
593 BIT(IIO_CHAN_INFO_SAMP_FREQ),
594 NULL, 0),
595 {
596 .type = IIO_PROXIMITY,
597 .address = LTR501_PS_DATA,
598 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
599 BIT(IIO_CHAN_INFO_SCALE),
600 .scan_index = 2,
601 .scan_type = {
602 .sign = 'u',
603 .realbits = 11,
604 .storagebits = 16,
605 .endianness = IIO_CPU,
606 },
607 .event_spec = ltr501_pxs_event_spec,
608 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
609 },
610 IIO_CHAN_SOFT_TIMESTAMP(3),
611};
612
613static const struct iio_chan_spec ltr301_channels[] = {
614 LTR501_LIGHT_CHANNEL(),
615 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
616 ltr501_als_event_spec,
617 ARRAY_SIZE(ltr501_als_event_spec)),
618 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
619 BIT(IIO_CHAN_INFO_SCALE) |
620 BIT(IIO_CHAN_INFO_INT_TIME) |
621 BIT(IIO_CHAN_INFO_SAMP_FREQ),
622 NULL, 0),
623 IIO_CHAN_SOFT_TIMESTAMP(2),
624};
625
626static int ltr501_read_raw(struct iio_dev *indio_dev,
627 struct iio_chan_spec const *chan,
628 int *val, int *val2, long mask)
629{
630 struct ltr501_data *data = iio_priv(indio_dev);
631 __le16 buf[2];
632 int ret, i;
633
634 switch (mask) {
635 case IIO_CHAN_INFO_PROCESSED:
636 switch (chan->type) {
637 case IIO_LIGHT:
638 ret = iio_device_claim_direct_mode(indio_dev);
639 if (ret)
640 return ret;
641
642 mutex_lock(&data->lock_als);
643 ret = ltr501_read_als(data, buf);
644 mutex_unlock(&data->lock_als);
645 iio_device_release_direct_mode(indio_dev);
646 if (ret < 0)
647 return ret;
648 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
649 le16_to_cpu(buf[0]));
650 return IIO_VAL_INT;
651 default:
652 return -EINVAL;
653 }
654 case IIO_CHAN_INFO_RAW:
655 ret = iio_device_claim_direct_mode(indio_dev);
656 if (ret)
657 return ret;
658
659 switch (chan->type) {
660 case IIO_INTENSITY:
661 mutex_lock(&data->lock_als);
662 ret = ltr501_read_als(data, buf);
663 mutex_unlock(&data->lock_als);
664 if (ret < 0)
665 break;
666 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
667 buf[0] : buf[1]);
668 ret = IIO_VAL_INT;
669 break;
670 case IIO_PROXIMITY:
671 mutex_lock(&data->lock_ps);
672 ret = ltr501_read_ps(data);
673 mutex_unlock(&data->lock_ps);
674 if (ret < 0)
675 break;
676 *val = ret & LTR501_PS_DATA_MASK;
677 ret = IIO_VAL_INT;
678 break;
679 default:
680 ret = -EINVAL;
681 break;
682 }
683
684 iio_device_release_direct_mode(indio_dev);
685 return ret;
686
687 case IIO_CHAN_INFO_SCALE:
688 switch (chan->type) {
689 case IIO_INTENSITY:
690 i = (data->als_contr & data->chip_info->als_gain_mask)
691 >> data->chip_info->als_gain_shift;
692 *val = data->chip_info->als_gain[i].scale;
693 *val2 = data->chip_info->als_gain[i].uscale;
694 return IIO_VAL_INT_PLUS_MICRO;
695 case IIO_PROXIMITY:
696 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
697 LTR501_CONTR_PS_GAIN_SHIFT;
698 *val = data->chip_info->ps_gain[i].scale;
699 *val2 = data->chip_info->ps_gain[i].uscale;
700 return IIO_VAL_INT_PLUS_MICRO;
701 default:
702 return -EINVAL;
703 }
704 case IIO_CHAN_INFO_INT_TIME:
705 switch (chan->type) {
706 case IIO_INTENSITY:
707 return ltr501_read_it_time(data, val, val2);
708 default:
709 return -EINVAL;
710 }
711 case IIO_CHAN_INFO_SAMP_FREQ:
712 switch (chan->type) {
713 case IIO_INTENSITY:
714 return ltr501_als_read_samp_freq(data, val, val2);
715 case IIO_PROXIMITY:
716 return ltr501_ps_read_samp_freq(data, val, val2);
717 default:
718 return -EINVAL;
719 }
720 }
721 return -EINVAL;
722}
723
724static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size,
725 int val, int val2)
726{
727 int i;
728
729 for (i = 0; i < size; i++)
730 if (val == gain[i].scale && val2 == gain[i].uscale)
731 return i;
732
733 return -1;
734}
735
736static int ltr501_write_raw(struct iio_dev *indio_dev,
737 struct iio_chan_spec const *chan,
738 int val, int val2, long mask)
739{
740 struct ltr501_data *data = iio_priv(indio_dev);
741 int i, ret, freq_val, freq_val2;
742 const struct ltr501_chip_info *info = data->chip_info;
743
744 ret = iio_device_claim_direct_mode(indio_dev);
745 if (ret)
746 return ret;
747
748 switch (mask) {
749 case IIO_CHAN_INFO_SCALE:
750 switch (chan->type) {
751 case IIO_INTENSITY:
752 i = ltr501_get_gain_index(info->als_gain,
753 info->als_gain_tbl_size,
754 val, val2);
755 if (i < 0) {
756 ret = -EINVAL;
757 break;
758 }
759
760 data->als_contr &= ~info->als_gain_mask;
761 data->als_contr |= i << info->als_gain_shift;
762
763 ret = regmap_write(data->regmap, LTR501_ALS_CONTR,
764 data->als_contr);
765 break;
766 case IIO_PROXIMITY:
767 i = ltr501_get_gain_index(info->ps_gain,
768 info->ps_gain_tbl_size,
769 val, val2);
770 if (i < 0) {
771 ret = -EINVAL;
772 break;
773 }
774 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
775 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
776
777 ret = regmap_write(data->regmap, LTR501_PS_CONTR,
778 data->ps_contr);
779 break;
780 default:
781 ret = -EINVAL;
782 break;
783 }
784 break;
785
786 case IIO_CHAN_INFO_INT_TIME:
787 switch (chan->type) {
788 case IIO_INTENSITY:
789 if (val != 0) {
790 ret = -EINVAL;
791 break;
792 }
793 mutex_lock(&data->lock_als);
794 ret = ltr501_set_it_time(data, val2);
795 mutex_unlock(&data->lock_als);
796 break;
797 default:
798 ret = -EINVAL;
799 break;
800 }
801 break;
802
803 case IIO_CHAN_INFO_SAMP_FREQ:
804 switch (chan->type) {
805 case IIO_INTENSITY:
806 ret = ltr501_als_read_samp_freq(data, &freq_val,
807 &freq_val2);
808 if (ret < 0)
809 break;
810
811 ret = ltr501_als_write_samp_freq(data, val, val2);
812 if (ret < 0)
813 break;
814
815 /* update persistence count when changing frequency */
816 ret = ltr501_write_intr_prst(data, chan->type,
817 0, data->als_period);
818
819 if (ret < 0)
820 ret = ltr501_als_write_samp_freq(data, freq_val,
821 freq_val2);
822 break;
823 case IIO_PROXIMITY:
824 ret = ltr501_ps_read_samp_freq(data, &freq_val,
825 &freq_val2);
826 if (ret < 0)
827 break;
828
829 ret = ltr501_ps_write_samp_freq(data, val, val2);
830 if (ret < 0)
831 break;
832
833 /* update persistence count when changing frequency */
834 ret = ltr501_write_intr_prst(data, chan->type,
835 0, data->ps_period);
836
837 if (ret < 0)
838 ret = ltr501_ps_write_samp_freq(data, freq_val,
839 freq_val2);
840 break;
841 default:
842 ret = -EINVAL;
843 break;
844 }
845 break;
846
847 default:
848 ret = -EINVAL;
849 break;
850 }
851
852 iio_device_release_direct_mode(indio_dev);
853 return ret;
854}
855
856static int ltr501_read_thresh(const struct iio_dev *indio_dev,
857 const struct iio_chan_spec *chan,
858 enum iio_event_type type,
859 enum iio_event_direction dir,
860 enum iio_event_info info,
861 int *val, int *val2)
862{
863 const struct ltr501_data *data = iio_priv(indio_dev);
864 int ret, thresh_data;
865
866 switch (chan->type) {
867 case IIO_INTENSITY:
868 switch (dir) {
869 case IIO_EV_DIR_RISING:
870 ret = regmap_bulk_read(data->regmap,
871 LTR501_ALS_THRESH_UP,
872 &thresh_data, 2);
873 if (ret < 0)
874 return ret;
875 *val = thresh_data & LTR501_ALS_THRESH_MASK;
876 return IIO_VAL_INT;
877 case IIO_EV_DIR_FALLING:
878 ret = regmap_bulk_read(data->regmap,
879 LTR501_ALS_THRESH_LOW,
880 &thresh_data, 2);
881 if (ret < 0)
882 return ret;
883 *val = thresh_data & LTR501_ALS_THRESH_MASK;
884 return IIO_VAL_INT;
885 default:
886 return -EINVAL;
887 }
888 case IIO_PROXIMITY:
889 switch (dir) {
890 case IIO_EV_DIR_RISING:
891 ret = regmap_bulk_read(data->regmap,
892 LTR501_PS_THRESH_UP,
893 &thresh_data, 2);
894 if (ret < 0)
895 return ret;
896 *val = thresh_data & LTR501_PS_THRESH_MASK;
897 return IIO_VAL_INT;
898 case IIO_EV_DIR_FALLING:
899 ret = regmap_bulk_read(data->regmap,
900 LTR501_PS_THRESH_LOW,
901 &thresh_data, 2);
902 if (ret < 0)
903 return ret;
904 *val = thresh_data & LTR501_PS_THRESH_MASK;
905 return IIO_VAL_INT;
906 default:
907 return -EINVAL;
908 }
909 default:
910 return -EINVAL;
911 }
912
913 return -EINVAL;
914}
915
916static int ltr501_write_thresh(struct iio_dev *indio_dev,
917 const struct iio_chan_spec *chan,
918 enum iio_event_type type,
919 enum iio_event_direction dir,
920 enum iio_event_info info,
921 int val, int val2)
922{
923 struct ltr501_data *data = iio_priv(indio_dev);
924 int ret;
925
926 if (val < 0)
927 return -EINVAL;
928
929 switch (chan->type) {
930 case IIO_INTENSITY:
931 if (val > LTR501_ALS_THRESH_MASK)
932 return -EINVAL;
933 switch (dir) {
934 case IIO_EV_DIR_RISING:
935 mutex_lock(&data->lock_als);
936 ret = regmap_bulk_write(data->regmap,
937 LTR501_ALS_THRESH_UP,
938 &val, 2);
939 mutex_unlock(&data->lock_als);
940 return ret;
941 case IIO_EV_DIR_FALLING:
942 mutex_lock(&data->lock_als);
943 ret = regmap_bulk_write(data->regmap,
944 LTR501_ALS_THRESH_LOW,
945 &val, 2);
946 mutex_unlock(&data->lock_als);
947 return ret;
948 default:
949 return -EINVAL;
950 }
951 case IIO_PROXIMITY:
952 if (val > LTR501_PS_THRESH_MASK)
953 return -EINVAL;
954 switch (dir) {
955 case IIO_EV_DIR_RISING:
956 mutex_lock(&data->lock_ps);
957 ret = regmap_bulk_write(data->regmap,
958 LTR501_PS_THRESH_UP,
959 &val, 2);
960 mutex_unlock(&data->lock_ps);
961 return ret;
962 case IIO_EV_DIR_FALLING:
963 mutex_lock(&data->lock_ps);
964 ret = regmap_bulk_write(data->regmap,
965 LTR501_PS_THRESH_LOW,
966 &val, 2);
967 mutex_unlock(&data->lock_ps);
968 return ret;
969 default:
970 return -EINVAL;
971 }
972 default:
973 return -EINVAL;
974 }
975
976 return -EINVAL;
977}
978
979static int ltr501_read_event(struct iio_dev *indio_dev,
980 const struct iio_chan_spec *chan,
981 enum iio_event_type type,
982 enum iio_event_direction dir,
983 enum iio_event_info info,
984 int *val, int *val2)
985{
986 int ret;
987
988 switch (info) {
989 case IIO_EV_INFO_VALUE:
990 return ltr501_read_thresh(indio_dev, chan, type, dir,
991 info, val, val2);
992 case IIO_EV_INFO_PERIOD:
993 ret = ltr501_read_intr_prst(iio_priv(indio_dev),
994 chan->type, val2);
995 *val = *val2 / 1000000;
996 *val2 = *val2 % 1000000;
997 return ret;
998 default:
999 return -EINVAL;
1000 }
1001
1002 return -EINVAL;
1003}
1004
1005static int ltr501_write_event(struct iio_dev *indio_dev,
1006 const struct iio_chan_spec *chan,
1007 enum iio_event_type type,
1008 enum iio_event_direction dir,
1009 enum iio_event_info info,
1010 int val, int val2)
1011{
1012 switch (info) {
1013 case IIO_EV_INFO_VALUE:
1014 if (val2 != 0)
1015 return -EINVAL;
1016 return ltr501_write_thresh(indio_dev, chan, type, dir,
1017 info, val, val2);
1018 case IIO_EV_INFO_PERIOD:
1019 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
1020 val, val2);
1021 default:
1022 return -EINVAL;
1023 }
1024
1025 return -EINVAL;
1026}
1027
1028static int ltr501_read_event_config(struct iio_dev *indio_dev,
1029 const struct iio_chan_spec *chan,
1030 enum iio_event_type type,
1031 enum iio_event_direction dir)
1032{
1033 struct ltr501_data *data = iio_priv(indio_dev);
1034 int ret, status;
1035
1036 switch (chan->type) {
1037 case IIO_INTENSITY:
1038 ret = regmap_field_read(data->reg_als_intr, &status);
1039 if (ret < 0)
1040 return ret;
1041 return status;
1042 case IIO_PROXIMITY:
1043 ret = regmap_field_read(data->reg_ps_intr, &status);
1044 if (ret < 0)
1045 return ret;
1046 return status;
1047 default:
1048 return -EINVAL;
1049 }
1050
1051 return -EINVAL;
1052}
1053
1054static int ltr501_write_event_config(struct iio_dev *indio_dev,
1055 const struct iio_chan_spec *chan,
1056 enum iio_event_type type,
1057 enum iio_event_direction dir, int state)
1058{
1059 struct ltr501_data *data = iio_priv(indio_dev);
1060 int ret;
1061
1062 /* only 1 and 0 are valid inputs */
1063 if (state != 1 && state != 0)
1064 return -EINVAL;
1065
1066 switch (chan->type) {
1067 case IIO_INTENSITY:
1068 mutex_lock(&data->lock_als);
1069 ret = regmap_field_write(data->reg_als_intr, state);
1070 mutex_unlock(&data->lock_als);
1071 return ret;
1072 case IIO_PROXIMITY:
1073 mutex_lock(&data->lock_ps);
1074 ret = regmap_field_write(data->reg_ps_intr, state);
1075 mutex_unlock(&data->lock_ps);
1076 return ret;
1077 default:
1078 return -EINVAL;
1079 }
1080
1081 return -EINVAL;
1082}
1083
1084static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1085 struct device_attribute *attr,
1086 char *buf)
1087{
1088 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1089 const struct ltr501_chip_info *info = data->chip_info;
1090 ssize_t len = 0;
1091 int i;
1092
1093 for (i = 0; i < info->ps_gain_tbl_size; i++) {
1094 if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1095 continue;
1096 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1097 info->ps_gain[i].scale,
1098 info->ps_gain[i].uscale);
1099 }
1100
1101 buf[len - 1] = '\n';
1102
1103 return len;
1104}
1105
1106static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1107 struct device_attribute *attr,
1108 char *buf)
1109{
1110 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1111 const struct ltr501_chip_info *info = data->chip_info;
1112 ssize_t len = 0;
1113 int i;
1114
1115 for (i = 0; i < info->als_gain_tbl_size; i++) {
1116 if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1117 continue;
1118 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1119 info->als_gain[i].scale,
1120 info->als_gain[i].uscale);
1121 }
1122
1123 buf[len - 1] = '\n';
1124
1125 return len;
1126}
1127
1128static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1129static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1130
1131static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1132 ltr501_show_proximity_scale_avail, NULL, 0);
1133static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1134 ltr501_show_intensity_scale_avail, NULL, 0);
1135
1136static struct attribute *ltr501_attributes[] = {
1137 &iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1138 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1139 &iio_const_attr_integration_time_available.dev_attr.attr,
1140 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1141 NULL
1142};
1143
1144static struct attribute *ltr301_attributes[] = {
1145 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1146 &iio_const_attr_integration_time_available.dev_attr.attr,
1147 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1148 NULL
1149};
1150
1151static const struct attribute_group ltr501_attribute_group = {
1152 .attrs = ltr501_attributes,
1153};
1154
1155static const struct attribute_group ltr301_attribute_group = {
1156 .attrs = ltr301_attributes,
1157};
1158
1159static const struct iio_info ltr501_info_no_irq = {
1160 .read_raw = ltr501_read_raw,
1161 .write_raw = ltr501_write_raw,
1162 .attrs = <r501_attribute_group,
1163};
1164
1165static const struct iio_info ltr501_info = {
1166 .read_raw = ltr501_read_raw,
1167 .write_raw = ltr501_write_raw,
1168 .attrs = <r501_attribute_group,
1169 .read_event_value = <r501_read_event,
1170 .write_event_value = <r501_write_event,
1171 .read_event_config = <r501_read_event_config,
1172 .write_event_config = <r501_write_event_config,
1173};
1174
1175static const struct iio_info ltr301_info_no_irq = {
1176 .read_raw = ltr501_read_raw,
1177 .write_raw = ltr501_write_raw,
1178 .attrs = <r301_attribute_group,
1179};
1180
1181static const struct iio_info ltr301_info = {
1182 .read_raw = ltr501_read_raw,
1183 .write_raw = ltr501_write_raw,
1184 .attrs = <r301_attribute_group,
1185 .read_event_value = <r501_read_event,
1186 .write_event_value = <r501_write_event,
1187 .read_event_config = <r501_read_event_config,
1188 .write_event_config = <r501_write_event_config,
1189};
1190
1191static const struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1192 [ltr501] = {
1193 .partid = 0x08,
1194 .als_gain = ltr501_als_gain_tbl,
1195 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1196 .ps_gain = ltr501_ps_gain_tbl,
1197 .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1198 .als_mode_active = BIT(0) | BIT(1),
1199 .als_gain_mask = BIT(3),
1200 .als_gain_shift = 3,
1201 .info = <r501_info,
1202 .info_no_irq = <r501_info_no_irq,
1203 .channels = ltr501_channels,
1204 .no_channels = ARRAY_SIZE(ltr501_channels),
1205 },
1206 [ltr559] = {
1207 .partid = 0x09,
1208 .als_gain = ltr559_als_gain_tbl,
1209 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1210 .ps_gain = ltr559_ps_gain_tbl,
1211 .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1212 .als_mode_active = BIT(0),
1213 .als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1214 .als_gain_shift = 2,
1215 .info = <r501_info,
1216 .info_no_irq = <r501_info_no_irq,
1217 .channels = ltr501_channels,
1218 .no_channels = ARRAY_SIZE(ltr501_channels),
1219 },
1220 [ltr301] = {
1221 .partid = 0x08,
1222 .als_gain = ltr501_als_gain_tbl,
1223 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1224 .als_mode_active = BIT(0) | BIT(1),
1225 .als_gain_mask = BIT(3),
1226 .als_gain_shift = 3,
1227 .info = <r301_info,
1228 .info_no_irq = <r301_info_no_irq,
1229 .channels = ltr301_channels,
1230 .no_channels = ARRAY_SIZE(ltr301_channels),
1231 },
1232};
1233
1234static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1235{
1236 int ret;
1237
1238 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
1239 if (ret < 0)
1240 return ret;
1241
1242 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
1243}
1244
1245static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1246{
1247 struct iio_poll_func *pf = p;
1248 struct iio_dev *indio_dev = pf->indio_dev;
1249 struct ltr501_data *data = iio_priv(indio_dev);
1250 struct {
1251 u16 channels[3];
1252 s64 ts __aligned(8);
1253 } scan;
1254 __le16 als_buf[2];
1255 u8 mask = 0;
1256 int j = 0;
1257 int ret, psdata;
1258
1259 memset(&scan, 0, sizeof(scan));
1260
1261 /* figure out which data needs to be ready */
1262 if (test_bit(0, indio_dev->active_scan_mask) ||
1263 test_bit(1, indio_dev->active_scan_mask))
1264 mask |= LTR501_STATUS_ALS_RDY;
1265 if (test_bit(2, indio_dev->active_scan_mask))
1266 mask |= LTR501_STATUS_PS_RDY;
1267
1268 ret = ltr501_drdy(data, mask);
1269 if (ret < 0)
1270 goto done;
1271
1272 if (mask & LTR501_STATUS_ALS_RDY) {
1273 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1274 als_buf, sizeof(als_buf));
1275 if (ret < 0)
1276 return ret;
1277 if (test_bit(0, indio_dev->active_scan_mask))
1278 scan.channels[j++] = le16_to_cpu(als_buf[1]);
1279 if (test_bit(1, indio_dev->active_scan_mask))
1280 scan.channels[j++] = le16_to_cpu(als_buf[0]);
1281 }
1282
1283 if (mask & LTR501_STATUS_PS_RDY) {
1284 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1285 &psdata, 2);
1286 if (ret < 0)
1287 goto done;
1288 scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
1289 }
1290
1291 iio_push_to_buffers_with_timestamp(indio_dev, &scan,
1292 iio_get_time_ns(indio_dev));
1293
1294done:
1295 iio_trigger_notify_done(indio_dev->trig);
1296
1297 return IRQ_HANDLED;
1298}
1299
1300static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1301{
1302 struct iio_dev *indio_dev = private;
1303 struct ltr501_data *data = iio_priv(indio_dev);
1304 int ret, status;
1305
1306 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1307 if (ret < 0) {
1308 dev_err(&data->client->dev,
1309 "irq read int reg failed\n");
1310 return IRQ_HANDLED;
1311 }
1312
1313 if (status & LTR501_STATUS_ALS_INTR)
1314 iio_push_event(indio_dev,
1315 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1316 IIO_EV_TYPE_THRESH,
1317 IIO_EV_DIR_EITHER),
1318 iio_get_time_ns(indio_dev));
1319
1320 if (status & LTR501_STATUS_PS_INTR)
1321 iio_push_event(indio_dev,
1322 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1323 IIO_EV_TYPE_THRESH,
1324 IIO_EV_DIR_EITHER),
1325 iio_get_time_ns(indio_dev));
1326
1327 return IRQ_HANDLED;
1328}
1329
1330static int ltr501_init(struct ltr501_data *data)
1331{
1332 int ret, status;
1333
1334 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
1335 if (ret < 0)
1336 return ret;
1337
1338 data->als_contr = status | data->chip_info->als_mode_active;
1339
1340 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
1341 if (ret < 0)
1342 return ret;
1343
1344 data->ps_contr = status | LTR501_CONTR_ACTIVE;
1345
1346 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1347 if (ret < 0)
1348 return ret;
1349
1350 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1351 if (ret < 0)
1352 return ret;
1353
1354 return ltr501_write_contr(data, data->als_contr, data->ps_contr);
1355}
1356
1357static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1358{
1359 switch (reg) {
1360 case LTR501_ALS_DATA1:
1361 case LTR501_ALS_DATA1_UPPER:
1362 case LTR501_ALS_DATA0:
1363 case LTR501_ALS_DATA0_UPPER:
1364 case LTR501_ALS_PS_STATUS:
1365 case LTR501_PS_DATA:
1366 case LTR501_PS_DATA_UPPER:
1367 return true;
1368 default:
1369 return false;
1370 }
1371}
1372
1373static const struct regmap_config ltr501_regmap_config = {
1374 .name = LTR501_REGMAP_NAME,
1375 .reg_bits = 8,
1376 .val_bits = 8,
1377 .max_register = LTR501_MAX_REG,
1378 .cache_type = REGCACHE_RBTREE,
1379 .volatile_reg = ltr501_is_volatile_reg,
1380};
1381
1382static int ltr501_powerdown(struct ltr501_data *data)
1383{
1384 return ltr501_write_contr(data, data->als_contr &
1385 ~data->chip_info->als_mode_active,
1386 data->ps_contr & ~LTR501_CONTR_ACTIVE);
1387}
1388
1389static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
1390{
1391 const struct acpi_device_id *id;
1392
1393 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1394 if (!id)
1395 return NULL;
1396 *chip_idx = id->driver_data;
1397 return dev_name(dev);
1398}
1399
1400static int ltr501_probe(struct i2c_client *client,
1401 const struct i2c_device_id *id)
1402{
1403 struct ltr501_data *data;
1404 struct iio_dev *indio_dev;
1405 struct regmap *regmap;
1406 int ret, partid, chip_idx = 0;
1407 const char *name = NULL;
1408
1409 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1410 if (!indio_dev)
1411 return -ENOMEM;
1412
1413 regmap = devm_regmap_init_i2c(client, <r501_regmap_config);
1414 if (IS_ERR(regmap)) {
1415 dev_err(&client->dev, "Regmap initialization failed.\n");
1416 return PTR_ERR(regmap);
1417 }
1418
1419 data = iio_priv(indio_dev);
1420 i2c_set_clientdata(client, indio_dev);
1421 data->client = client;
1422 data->regmap = regmap;
1423 mutex_init(&data->lock_als);
1424 mutex_init(&data->lock_ps);
1425
1426 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1427 reg_field_it);
1428 if (IS_ERR(data->reg_it)) {
1429 dev_err(&client->dev, "Integ time reg field init failed.\n");
1430 return PTR_ERR(data->reg_it);
1431 }
1432
1433 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1434 reg_field_als_intr);
1435 if (IS_ERR(data->reg_als_intr)) {
1436 dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1437 return PTR_ERR(data->reg_als_intr);
1438 }
1439
1440 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1441 reg_field_ps_intr);
1442 if (IS_ERR(data->reg_ps_intr)) {
1443 dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1444 return PTR_ERR(data->reg_ps_intr);
1445 }
1446
1447 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1448 reg_field_als_rate);
1449 if (IS_ERR(data->reg_als_rate)) {
1450 dev_err(&client->dev, "ALS samp rate field init failed.\n");
1451 return PTR_ERR(data->reg_als_rate);
1452 }
1453
1454 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1455 reg_field_ps_rate);
1456 if (IS_ERR(data->reg_ps_rate)) {
1457 dev_err(&client->dev, "PS samp rate field init failed.\n");
1458 return PTR_ERR(data->reg_ps_rate);
1459 }
1460
1461 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1462 reg_field_als_prst);
1463 if (IS_ERR(data->reg_als_prst)) {
1464 dev_err(&client->dev, "ALS prst reg field init failed\n");
1465 return PTR_ERR(data->reg_als_prst);
1466 }
1467
1468 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1469 reg_field_ps_prst);
1470 if (IS_ERR(data->reg_ps_prst)) {
1471 dev_err(&client->dev, "PS prst reg field init failed.\n");
1472 return PTR_ERR(data->reg_ps_prst);
1473 }
1474
1475 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
1476 if (ret < 0)
1477 return ret;
1478
1479 if (id) {
1480 name = id->name;
1481 chip_idx = id->driver_data;
1482 } else if (ACPI_HANDLE(&client->dev)) {
1483 name = ltr501_match_acpi_device(&client->dev, &chip_idx);
1484 } else {
1485 return -ENODEV;
1486 }
1487
1488 data->chip_info = <r501_chip_info_tbl[chip_idx];
1489
1490 if ((partid >> 4) != data->chip_info->partid)
1491 return -ENODEV;
1492
1493 indio_dev->info = data->chip_info->info;
1494 indio_dev->channels = data->chip_info->channels;
1495 indio_dev->num_channels = data->chip_info->no_channels;
1496 indio_dev->name = name;
1497 indio_dev->modes = INDIO_DIRECT_MODE;
1498
1499 ret = ltr501_init(data);
1500 if (ret < 0)
1501 return ret;
1502
1503 if (client->irq > 0) {
1504 ret = devm_request_threaded_irq(&client->dev, client->irq,
1505 NULL, ltr501_interrupt_handler,
1506 IRQF_TRIGGER_FALLING |
1507 IRQF_ONESHOT,
1508 "ltr501_thresh_event",
1509 indio_dev);
1510 if (ret) {
1511 dev_err(&client->dev, "request irq (%d) failed\n",
1512 client->irq);
1513 return ret;
1514 }
1515 } else {
1516 indio_dev->info = data->chip_info->info_no_irq;
1517 }
1518
1519 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1520 ltr501_trigger_handler, NULL);
1521 if (ret)
1522 goto powerdown_on_error;
1523
1524 ret = iio_device_register(indio_dev);
1525 if (ret)
1526 goto error_unreg_buffer;
1527
1528 return 0;
1529
1530error_unreg_buffer:
1531 iio_triggered_buffer_cleanup(indio_dev);
1532powerdown_on_error:
1533 ltr501_powerdown(data);
1534 return ret;
1535}
1536
1537static int ltr501_remove(struct i2c_client *client)
1538{
1539 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1540
1541 iio_device_unregister(indio_dev);
1542 iio_triggered_buffer_cleanup(indio_dev);
1543 ltr501_powerdown(iio_priv(indio_dev));
1544
1545 return 0;
1546}
1547
1548#ifdef CONFIG_PM_SLEEP
1549static int ltr501_suspend(struct device *dev)
1550{
1551 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1552 to_i2c_client(dev)));
1553 return ltr501_powerdown(data);
1554}
1555
1556static int ltr501_resume(struct device *dev)
1557{
1558 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1559 to_i2c_client(dev)));
1560
1561 return ltr501_write_contr(data, data->als_contr,
1562 data->ps_contr);
1563}
1564#endif
1565
1566static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1567
1568static const struct acpi_device_id ltr_acpi_match[] = {
1569 {"LTER0501", ltr501},
1570 {"LTER0559", ltr559},
1571 {"LTER0301", ltr301},
1572 { },
1573};
1574MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1575
1576static const struct i2c_device_id ltr501_id[] = {
1577 { "ltr501", ltr501},
1578 { "ltr559", ltr559},
1579 { "ltr301", ltr301},
1580 { }
1581};
1582MODULE_DEVICE_TABLE(i2c, ltr501_id);
1583
1584static struct i2c_driver ltr501_driver = {
1585 .driver = {
1586 .name = LTR501_DRV_NAME,
1587 .pm = <r501_pm_ops,
1588 .acpi_match_table = ACPI_PTR(ltr_acpi_match),
1589 },
1590 .probe = ltr501_probe,
1591 .remove = ltr501_remove,
1592 .id_table = ltr501_id,
1593};
1594
1595module_i2c_driver(ltr501_driver);
1596
1597MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1598MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1599MODULE_LICENSE("GPL");