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1/*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef DC_STREAM_H_
27#define DC_STREAM_H_
28
29#include "dc_types.h"
30#include "grph_object_defs.h"
31
32/*******************************************************************************
33 * Stream Interfaces
34 ******************************************************************************/
35struct timing_sync_info {
36 int group_id;
37 int group_size;
38 bool master;
39};
40
41struct dc_stream_status {
42 int primary_otg_inst;
43 int stream_enc_inst;
44 int plane_count;
45 int audio_inst;
46 struct timing_sync_info timing_sync_info;
47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
48 bool is_abm_supported;
49};
50
51// TODO: References to this needs to be removed..
52struct freesync_context {
53 bool dummy;
54};
55
56enum hubp_dmdata_mode {
57 DMDATA_SW_MODE,
58 DMDATA_HW_MODE
59};
60
61struct dc_dmdata_attributes {
62 /* Specifies whether dynamic meta data will be updated by software
63 * or has to be fetched by hardware (DMA mode)
64 */
65 enum hubp_dmdata_mode dmdata_mode;
66 /* Specifies if current dynamic meta data is to be used only for the current frame */
67 bool dmdata_repeat;
68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */
69 uint32_t dmdata_size;
70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
71 bool dmdata_updated;
72 /* If hardware mode is used, the base address where DMDATA surface is located */
73 PHYSICAL_ADDRESS_LOC address;
74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
75 bool dmdata_qos_mode;
76 /* If qos_mode = 1, this is the QOS value to be used: */
77 uint32_t dmdata_qos_level;
78 /* Specifies the value in unit of REFCLK cycles to be added to the
79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
80 */
81 uint32_t dmdata_dl_delta;
82 /* An unbounded array of uint32s, represents software dmdata to be loaded */
83 uint32_t *dmdata_sw_data;
84};
85
86struct dc_writeback_info {
87 bool wb_enabled;
88 int dwb_pipe_inst;
89 struct dc_dwb_params dwb_params;
90 struct mcif_buf_params mcif_buf_params;
91 struct mcif_warmup_params mcif_warmup_params;
92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */
93 struct dc_plane_state *writeback_source_plane;
94 /* source MPCC instance. for use by internally by dc */
95 int mpcc_inst;
96};
97
98struct dc_writeback_update {
99 unsigned int num_wb_info;
100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
101};
102
103enum vertical_interrupt_ref_point {
104 START_V_UPDATE = 0,
105 START_V_SYNC,
106 INVALID_POINT
107
108 //For now, only v_update interrupt is used.
109 //START_V_BLANK,
110 //START_V_ACTIVE
111};
112
113struct periodic_interrupt_config {
114 enum vertical_interrupt_ref_point ref_point;
115 int lines_offset;
116};
117
118union stream_update_flags {
119 struct {
120 uint32_t scaling:1;
121 uint32_t out_tf:1;
122 uint32_t out_csc:1;
123 uint32_t abm_level:1;
124 uint32_t dpms_off:1;
125 uint32_t gamut_remap:1;
126 uint32_t wb_update:1;
127 uint32_t dsc_changed : 1;
128 } bits;
129
130 uint32_t raw;
131};
132
133struct test_pattern {
134 enum dp_test_pattern type;
135 enum dp_test_pattern_color_space color_space;
136 struct link_training_settings const *p_link_settings;
137 unsigned char const *p_custom_pattern;
138 unsigned int cust_pattern_size;
139};
140
141struct dc_stream_state {
142 // sink is deprecated, new code should not reference
143 // this pointer
144 struct dc_sink *sink;
145
146 struct dc_link *link;
147 /* For dynamic link encoder assignment, update the link encoder assigned to
148 * a stream via the volatile dc_state rather than the static dc_link.
149 */
150 struct link_encoder *link_enc;
151 struct dc_panel_patch sink_patches;
152 union display_content_support content_support;
153 struct dc_crtc_timing timing;
154 struct dc_crtc_timing_adjust adjust;
155 struct dc_info_packet vrr_infopacket;
156 struct dc_info_packet vsc_infopacket;
157 struct dc_info_packet vsp_infopacket;
158
159 struct rect src; /* composition area */
160 struct rect dst; /* stream addressable area */
161
162 // TODO: References to this needs to be removed..
163 struct freesync_context freesync_ctx;
164
165 struct audio_info audio_info;
166
167 struct dc_info_packet hdr_static_metadata;
168 PHYSICAL_ADDRESS_LOC dmdata_address;
169 bool use_dynamic_meta;
170
171 struct dc_transfer_func *out_transfer_func;
172 struct colorspace_transform gamut_remap_matrix;
173 struct dc_csc_transform csc_color_matrix;
174
175 enum dc_color_space output_color_space;
176 enum dc_dither_option dither_option;
177
178 enum view_3d_format view_format;
179
180 bool use_vsc_sdp_for_colorimetry;
181 bool ignore_msa_timing_param;
182
183 bool freesync_on_desktop;
184
185 bool converter_disable_audio;
186 uint8_t qs_bit;
187 uint8_t qy_bit;
188
189 /* TODO: custom INFO packets */
190 /* TODO: ABM info (DMCU) */
191 /* TODO: CEA VIC */
192
193 /* DMCU info */
194 unsigned int abm_level;
195
196 struct periodic_interrupt_config periodic_interrupt0;
197 struct periodic_interrupt_config periodic_interrupt1;
198
199 /* from core_stream struct */
200 struct dc_context *ctx;
201
202 /* used by DCP and FMT */
203 struct bit_depth_reduction_params bit_depth_params;
204 struct clamping_and_pixel_encoding_params clamping;
205
206 int phy_pix_clk;
207 enum signal_type signal;
208 bool dpms_off;
209
210 void *dm_stream_context;
211
212 struct dc_cursor_attributes cursor_attributes;
213 struct dc_cursor_position cursor_position;
214 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
215
216 /* from stream struct */
217 struct kref refcount;
218
219 struct crtc_trigger_info triggered_crtc_reset;
220
221 /* writeback */
222 unsigned int num_wb_info;
223 struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
224 const struct dc_transfer_func *func_shaper;
225 const struct dc_3dlut *lut3d_func;
226 /* Computed state bits */
227 bool mode_changed : 1;
228
229 /* Output from DC when stream state is committed or altered
230 * DC may only access these values during:
231 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
232 * values may not change outside of those calls
233 */
234 struct {
235 // For interrupt management, some hardware instance
236 // offsets need to be exposed to DM
237 uint8_t otg_offset;
238 } out;
239
240 bool apply_edp_fast_boot_optimization;
241 bool apply_seamless_boot_optimization;
242
243 uint32_t stream_id;
244
245 struct test_pattern test_pattern;
246 union stream_update_flags update_flags;
247
248 bool has_non_synchronizable_pclk;
249 bool vblank_synchronized;
250};
251
252#define ABM_LEVEL_IMMEDIATE_DISABLE 255
253
254struct dc_stream_update {
255 struct dc_stream_state *stream;
256
257 struct rect src;
258 struct rect dst;
259 struct dc_transfer_func *out_transfer_func;
260 struct dc_info_packet *hdr_static_metadata;
261 unsigned int *abm_level;
262
263 struct periodic_interrupt_config *periodic_interrupt0;
264 struct periodic_interrupt_config *periodic_interrupt1;
265
266 struct dc_info_packet *vrr_infopacket;
267 struct dc_info_packet *vsc_infopacket;
268 struct dc_info_packet *vsp_infopacket;
269
270 bool *dpms_off;
271 bool integer_scaling_update;
272
273 struct colorspace_transform *gamut_remap;
274 enum dc_color_space *output_color_space;
275 enum dc_dither_option *dither_option;
276
277 struct dc_csc_transform *output_csc_transform;
278
279 struct dc_writeback_update *wb_update;
280 struct dc_dsc_config *dsc_config;
281 struct dc_transfer_func *func_shaper;
282 struct dc_3dlut *lut3d_func;
283
284 struct test_pattern *pending_test_pattern;
285};
286
287bool dc_is_stream_unchanged(
288 struct dc_stream_state *old_stream, struct dc_stream_state *stream);
289bool dc_is_stream_scaling_unchanged(
290 struct dc_stream_state *old_stream, struct dc_stream_state *stream);
291
292/*
293 * Set up surface attributes and associate to a stream
294 * The surfaces parameter is an absolute set of all surface active for the stream.
295 * If no surfaces are provided, the stream will be blanked; no memory read.
296 * Any flip related attribute changes must be done through this interface.
297 *
298 * After this call:
299 * Surfaces attributes are programmed and configured to be composed into stream.
300 * This does not trigger a flip. No surface address is programmed.
301 */
302
303void dc_commit_updates_for_stream(struct dc *dc,
304 struct dc_surface_update *srf_updates,
305 int surface_count,
306 struct dc_stream_state *stream,
307 struct dc_stream_update *stream_update,
308 struct dc_state *state);
309/*
310 * Log the current stream state.
311 */
312void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
313
314uint8_t dc_get_current_stream_count(struct dc *dc);
315struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
316struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link);
317
318/*
319 * Return the current frame counter.
320 */
321uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
322
323/*
324 * Send dp sdp message.
325 */
326bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
327 const uint8_t *custom_sdp_message,
328 unsigned int sdp_message_size);
329
330/* TODO: Return parsed values rather than direct register read
331 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
332 * being refactored properly to be dce-specific
333 */
334bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
335 uint32_t *v_blank_start,
336 uint32_t *v_blank_end,
337 uint32_t *h_position,
338 uint32_t *v_position);
339
340enum dc_status dc_add_stream_to_ctx(
341 struct dc *dc,
342 struct dc_state *new_ctx,
343 struct dc_stream_state *stream);
344
345enum dc_status dc_remove_stream_from_ctx(
346 struct dc *dc,
347 struct dc_state *new_ctx,
348 struct dc_stream_state *stream);
349
350
351bool dc_add_plane_to_context(
352 const struct dc *dc,
353 struct dc_stream_state *stream,
354 struct dc_plane_state *plane_state,
355 struct dc_state *context);
356
357bool dc_remove_plane_from_context(
358 const struct dc *dc,
359 struct dc_stream_state *stream,
360 struct dc_plane_state *plane_state,
361 struct dc_state *context);
362
363bool dc_rem_all_planes_for_stream(
364 const struct dc *dc,
365 struct dc_stream_state *stream,
366 struct dc_state *context);
367
368bool dc_add_all_planes_for_stream(
369 const struct dc *dc,
370 struct dc_stream_state *stream,
371 struct dc_plane_state * const *plane_states,
372 int plane_count,
373 struct dc_state *context);
374
375bool dc_stream_add_writeback(struct dc *dc,
376 struct dc_stream_state *stream,
377 struct dc_writeback_info *wb_info);
378
379bool dc_stream_remove_writeback(struct dc *dc,
380 struct dc_stream_state *stream,
381 uint32_t dwb_pipe_inst);
382
383enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
384 struct dc_state *state,
385 struct dc_stream_state *stream);
386
387bool dc_stream_warmup_writeback(struct dc *dc,
388 int num_dwb,
389 struct dc_writeback_info *wb_info);
390
391bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
392
393bool dc_stream_set_dynamic_metadata(struct dc *dc,
394 struct dc_stream_state *stream,
395 struct dc_dmdata_attributes *dmdata_attr);
396
397enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
398
399/*
400 * Set up streams and links associated to drive sinks
401 * The streams parameter is an absolute set of all active streams.
402 *
403 * After this call:
404 * Phy, Encoder, Timing Generator are programmed and enabled.
405 * New streams are enabled with blank stream; no memory read.
406 */
407/*
408 * Enable stereo when commit_streams is not required,
409 * for example, frame alternate.
410 */
411void dc_enable_stereo(
412 struct dc *dc,
413 struct dc_state *context,
414 struct dc_stream_state *streams[],
415 uint8_t stream_count);
416
417/* Triggers multi-stream synchronization. */
418void dc_trigger_sync(struct dc *dc, struct dc_state *context);
419
420enum surface_update_type dc_check_update_surfaces_for_stream(
421 struct dc *dc,
422 struct dc_surface_update *updates,
423 int surface_count,
424 struct dc_stream_update *stream_update,
425 const struct dc_stream_status *stream_status);
426
427/**
428 * Create a new default stream for the requested sink
429 */
430struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
431
432struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
433
434void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
435
436void dc_stream_retain(struct dc_stream_state *dc_stream);
437void dc_stream_release(struct dc_stream_state *dc_stream);
438
439struct dc_stream_status *dc_stream_get_status_from_state(
440 struct dc_state *state,
441 struct dc_stream_state *stream);
442struct dc_stream_status *dc_stream_get_status(
443 struct dc_stream_state *dc_stream);
444
445#ifndef TRIM_FSFT
446bool dc_optimize_timing_for_fsft(
447 struct dc_stream_state *pStream,
448 unsigned int max_input_rate_in_khz);
449#endif
450
451/*******************************************************************************
452 * Cursor interfaces - To manages the cursor within a stream
453 ******************************************************************************/
454/* TODO: Deprecated once we switch to dc_set_cursor_position */
455bool dc_stream_set_cursor_attributes(
456 struct dc_stream_state *stream,
457 const struct dc_cursor_attributes *attributes);
458
459bool dc_stream_set_cursor_position(
460 struct dc_stream_state *stream,
461 const struct dc_cursor_position *position);
462
463
464bool dc_stream_adjust_vmin_vmax(struct dc *dc,
465 struct dc_stream_state *stream,
466 struct dc_crtc_timing_adjust *adjust);
467
468bool dc_stream_get_last_used_drr_vtotal(struct dc *dc,
469 struct dc_stream_state *stream,
470 uint32_t *refresh_rate);
471
472bool dc_stream_get_crtc_position(struct dc *dc,
473 struct dc_stream_state **stream,
474 int num_streams,
475 unsigned int *v_pos,
476 unsigned int *nom_v_pos);
477
478#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
479bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream,
480 struct crc_params *crc_window);
481bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc,
482 struct dc_stream_state *stream);
483#endif
484
485bool dc_stream_configure_crc(struct dc *dc,
486 struct dc_stream_state *stream,
487 struct crc_params *crc_window,
488 bool enable,
489 bool continuous);
490
491bool dc_stream_get_crc(struct dc *dc,
492 struct dc_stream_state *stream,
493 uint32_t *r_cr,
494 uint32_t *g_y,
495 uint32_t *b_cb);
496
497void dc_stream_set_static_screen_params(struct dc *dc,
498 struct dc_stream_state **stream,
499 int num_streams,
500 const struct dc_static_screen_params *params);
501
502void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
503 enum dc_dynamic_expansion option);
504
505void dc_stream_set_dither_option(struct dc_stream_state *stream,
506 enum dc_dither_option option);
507
508bool dc_stream_set_gamut_remap(struct dc *dc,
509 const struct dc_stream_state *stream);
510
511bool dc_stream_program_csc_matrix(struct dc *dc,
512 struct dc_stream_state *stream);
513
514bool dc_stream_get_crtc_position(struct dc *dc,
515 struct dc_stream_state **stream,
516 int num_streams,
517 unsigned int *v_pos,
518 unsigned int *nom_v_pos);
519
520#endif /* DC_STREAM_H_ */