1/*
 2 * psr.h: This file holds the macros for masking off various parts of
 3 *        the processor status register on the Sparc. This is valid
 4 *        for Version 8. On the V9 this is renamed to the PSTATE
 5 *        register and its members are accessed as fields like
 6 *        PSTATE.PRIV for the current CPU privilege level.
 7 *
 8 * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
 9 */
10
11#ifndef __LINUX_SPARC_PSR_H
12#define __LINUX_SPARC_PSR_H
13
14/* The Sparc PSR fields are laid out as the following:
15 *
16 *  ------------------------------------------------------------------------
17 *  | impl  | vers  | icc   | resv  | EC | EF | PIL  | S | PS | ET |  CWP  |
18 *  | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6  | 5  |  4-0  |
19 *  ------------------------------------------------------------------------
20 */
21#define PSR_CWP     0x0000001f         /* current window pointer     */
22#define PSR_ET      0x00000020         /* enable traps field         */
23#define PSR_PS      0x00000040         /* previous privilege level   */
24#define PSR_S       0x00000080         /* current privilege level    */
25#define PSR_PIL     0x00000f00         /* processor interrupt level  */
26#define PSR_EF      0x00001000         /* enable floating point      */
27#define PSR_EC      0x00002000         /* enable co-processor        */
28#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
29#define PSR_LE      0x00008000         /* SuperSparcII little-endian */
30#define PSR_ICC     0x00f00000         /* integer condition codes    */
31#define PSR_C       0x00100000         /* carry bit                  */
32#define PSR_V       0x00200000         /* overflow bit               */
33#define PSR_Z       0x00400000         /* zero bit                   */
34#define PSR_N       0x00800000         /* negative bit               */
35#define PSR_VERS    0x0f000000         /* cpu-version field          */
36#define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
37
38#ifdef __KERNEL__
39
40#ifndef __ASSEMBLY__
41/* Get the %psr register. */
42static inline unsigned int get_psr(void)
43{
44	unsigned int psr;
45	__asm__ __volatile__(
46		"rd	%%psr, %0\n\t"
47		"nop\n\t"
48		"nop\n\t"
49		"nop\n\t"
50	: "=r" (psr)
51	: /* no inputs */
52	: "memory");
53
54	return psr;
55}
56
57static inline void put_psr(unsigned int new_psr)
58{
59	__asm__ __volatile__(
60		"wr	%0, 0x0, %%psr\n\t"
61		"nop\n\t"
62		"nop\n\t"
63		"nop\n\t"
64	: /* no outputs */
65	: "r" (new_psr)
66	: "memory", "cc");
67}
68
69/* Get the %fsr register.  Be careful, make sure the floating point
70 * enable bit is set in the %psr when you execute this or you will
71 * incur a trap.
72 */
73
74extern unsigned int fsr_storage;
75
76static inline unsigned int get_fsr(void)
77{
78	unsigned int fsr = 0;
79
80	__asm__ __volatile__(
81		"st	%%fsr, %1\n\t"
82		"ld	%1, %0\n\t"
83	: "=r" (fsr)
84	: "m" (fsr_storage));
85
86	return fsr;
87}
88
89#endif /* !(__ASSEMBLY__) */
90
91#endif /* (__KERNEL__) */
92
93#endif /* !(__LINUX_SPARC_PSR_H) */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * psr.h: This file holds the macros for masking off various parts of
 4 *        the processor status register on the Sparc. This is valid
 5 *        for Version 8. On the V9 this is renamed to the PSTATE
 6 *        register and its members are accessed as fields like
 7 *        PSTATE.PRIV for the current CPU privilege level.
 8 *
 9 * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
10 */
 
11#ifndef __LINUX_SPARC_PSR_H
12#define __LINUX_SPARC_PSR_H
13
14#include <uapi/asm/psr.h>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
15
 
16
17#ifndef __ASSEMBLY__
18/* Get the %psr register. */
19static inline unsigned int get_psr(void)
20{
21	unsigned int psr;
22	__asm__ __volatile__(
23		"rd	%%psr, %0\n\t"
24		"nop\n\t"
25		"nop\n\t"
26		"nop\n\t"
27	: "=r" (psr)
28	: /* no inputs */
29	: "memory");
30
31	return psr;
32}
33
34static inline void put_psr(unsigned int new_psr)
35{
36	__asm__ __volatile__(
37		"wr	%0, 0x0, %%psr\n\t"
38		"nop\n\t"
39		"nop\n\t"
40		"nop\n\t"
41	: /* no outputs */
42	: "r" (new_psr)
43	: "memory", "cc");
44}
45
46/* Get the %fsr register.  Be careful, make sure the floating point
47 * enable bit is set in the %psr when you execute this or you will
48 * incur a trap.
49 */
50
51extern unsigned int fsr_storage;
52
53static inline unsigned int get_fsr(void)
54{
55	unsigned int fsr = 0;
56
57	__asm__ __volatile__(
58		"st	%%fsr, %1\n\t"
59		"ld	%1, %0\n\t"
60	: "=r" (fsr)
61	: "m" (fsr_storage));
62
63	return fsr;
64}
65
66#endif /* !(__ASSEMBLY__) */
 
 
67
68#endif /* !(__LINUX_SPARC_PSR_H) */