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1// SPDX-License-Identifier: GPL-2.0
2#include <dt-bindings/clock/ingenic,tcu.h>
3#include <dt-bindings/clock/x1000-cgu.h>
4#include <dt-bindings/dma/x1000-dma.h>
5
6/ {
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "ingenic,x1000", "ingenic,x1000e";
10
11 cpus {
12 #address-cells = <1>;
13 #size-cells = <0>;
14
15 cpu0: cpu@0 {
16 device_type = "cpu";
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
19
20 clocks = <&cgu X1000_CLK_CPU>;
21 clock-names = "cpu";
22 };
23 };
24
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
29 compatible = "mti,cpu-interrupt-controller";
30 };
31
32 intc: interrupt-controller@10001000 {
33 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
34 reg = <0x10001000 0x50>;
35
36 interrupt-controller;
37 #interrupt-cells = <1>;
38
39 interrupt-parent = <&cpuintc>;
40 interrupts = <2>;
41 };
42
43 exclk: ext {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 };
47
48 rtclk: rtc {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <32768>;
52 };
53
54 cgu: x1000-cgu@10000000 {
55 compatible = "ingenic,x1000-cgu", "simple-mfd";
56 reg = <0x10000000 0x100>;
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges = <0x0 0x10000000 0x100>;
60
61 #clock-cells = <1>;
62
63 clocks = <&exclk>, <&rtclk>;
64 clock-names = "ext", "rtc";
65
66 otg_phy: usb-phy@3c {
67 compatible = "ingenic,x1000-phy";
68 reg = <0x3c 0x10>;
69
70 clocks = <&cgu X1000_CLK_OTGPHY>;
71
72 #phy-cells = <0>;
73
74 status = "disabled";
75 };
76
77 rng: rng@d8 {
78 compatible = "ingenic,x1000-rng";
79 reg = <0xd8 0x8>;
80
81 status = "disabled";
82 };
83
84 mac_phy_ctrl: mac-phy-ctrl@e8 {
85 compatible = "syscon";
86 reg = <0xe8 0x4>;
87 };
88 };
89
90 ost: timer@12000000 {
91 compatible = "ingenic,x1000-ost";
92 reg = <0x12000000 0x3c>;
93
94 #clock-cells = <1>;
95
96 clocks = <&cgu X1000_CLK_OST>;
97 clock-names = "ost";
98
99 interrupt-parent = <&cpuintc>;
100 interrupts = <3>;
101 };
102
103 tcu: timer@10002000 {
104 compatible = "ingenic,x1000-tcu", "simple-mfd";
105 reg = <0x10002000 0x1000>;
106 #address-cells = <1>;
107 #size-cells = <1>;
108 ranges = <0x0 0x10002000 0x1000>;
109
110 #clock-cells = <1>;
111
112 clocks = <&cgu X1000_CLK_RTCLK>,
113 <&cgu X1000_CLK_EXCLK>,
114 <&cgu X1000_CLK_PCLK>;
115 clock-names = "rtc", "ext", "pclk";
116
117 interrupt-controller;
118 #interrupt-cells = <1>;
119
120 interrupt-parent = <&intc>;
121 interrupts = <27 26 25>;
122
123 wdt: watchdog@0 {
124 compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog";
125 reg = <0x0 0x10>;
126
127 clocks = <&tcu TCU_CLK_WDT>;
128 clock-names = "wdt";
129 };
130 };
131
132 rtc: rtc@10003000 {
133 compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
134 reg = <0x10003000 0x4c>;
135
136 interrupt-parent = <&intc>;
137 interrupts = <32>;
138
139 clocks = <&cgu X1000_CLK_RTCLK>;
140 clock-names = "rtc";
141 };
142
143 pinctrl: pin-controller@10010000 {
144 compatible = "ingenic,x1000-pinctrl";
145 reg = <0x10010000 0x800>;
146 #address-cells = <1>;
147 #size-cells = <0>;
148
149 gpa: gpio@0 {
150 compatible = "ingenic,x1000-gpio";
151 reg = <0>;
152
153 gpio-controller;
154 gpio-ranges = <&pinctrl 0 0 32>;
155 #gpio-cells = <2>;
156
157 interrupt-controller;
158 #interrupt-cells = <2>;
159
160 interrupt-parent = <&intc>;
161 interrupts = <17>;
162 };
163
164 gpb: gpio@1 {
165 compatible = "ingenic,x1000-gpio";
166 reg = <1>;
167
168 gpio-controller;
169 gpio-ranges = <&pinctrl 0 32 32>;
170 #gpio-cells = <2>;
171
172 interrupt-controller;
173 #interrupt-cells = <2>;
174
175 interrupt-parent = <&intc>;
176 interrupts = <16>;
177 };
178
179 gpc: gpio@2 {
180 compatible = "ingenic,x1000-gpio";
181 reg = <2>;
182
183 gpio-controller;
184 gpio-ranges = <&pinctrl 0 64 32>;
185 #gpio-cells = <2>;
186
187 interrupt-controller;
188 #interrupt-cells = <2>;
189
190 interrupt-parent = <&intc>;
191 interrupts = <15>;
192 };
193
194 gpd: gpio@3 {
195 compatible = "ingenic,x1000-gpio";
196 reg = <3>;
197
198 gpio-controller;
199 gpio-ranges = <&pinctrl 0 96 32>;
200 #gpio-cells = <2>;
201
202 interrupt-controller;
203 #interrupt-cells = <2>;
204
205 interrupt-parent = <&intc>;
206 interrupts = <14>;
207 };
208 };
209
210 uart0: serial@10030000 {
211 compatible = "ingenic,x1000-uart";
212 reg = <0x10030000 0x100>;
213
214 interrupt-parent = <&intc>;
215 interrupts = <51>;
216
217 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
218 clock-names = "baud", "module";
219
220 status = "disabled";
221 };
222
223 uart1: serial@10031000 {
224 compatible = "ingenic,x1000-uart";
225 reg = <0x10031000 0x100>;
226
227 interrupt-parent = <&intc>;
228 interrupts = <50>;
229
230 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
231 clock-names = "baud", "module";
232
233 status = "disabled";
234 };
235
236 uart2: serial@10032000 {
237 compatible = "ingenic,x1000-uart";
238 reg = <0x10032000 0x100>;
239
240 interrupt-parent = <&intc>;
241 interrupts = <49>;
242
243 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
244 clock-names = "baud", "module";
245
246 status = "disabled";
247 };
248
249 i2c0: i2c-controller@10050000 {
250 compatible = "ingenic,x1000-i2c";
251 reg = <0x10050000 0x1000>;
252 #address-cells = <1>;
253 #size-cells = <0>;
254
255 interrupt-parent = <&intc>;
256 interrupts = <60>;
257
258 clocks = <&cgu X1000_CLK_I2C0>;
259
260 status = "disabled";
261 };
262
263 i2c1: i2c-controller@10051000 {
264 compatible = "ingenic,x1000-i2c";
265 reg = <0x10051000 0x1000>;
266 #address-cells = <1>;
267 #size-cells = <0>;
268
269 interrupt-parent = <&intc>;
270 interrupts = <59>;
271
272 clocks = <&cgu X1000_CLK_I2C1>;
273
274 status = "disabled";
275 };
276
277 i2c2: i2c-controller@10052000 {
278 compatible = "ingenic,x1000-i2c";
279 reg = <0x10052000 0x1000>;
280 #address-cells = <1>;
281 #size-cells = <0>;
282
283 interrupt-parent = <&intc>;
284 interrupts = <58>;
285
286 clocks = <&cgu X1000_CLK_I2C2>;
287
288 status = "disabled";
289 };
290
291 pdma: dma-controller@13420000 {
292 compatible = "ingenic,x1000-dma";
293 reg = <0x13420000 0x400>, <0x13421000 0x40>;
294 #dma-cells = <2>;
295
296 interrupt-parent = <&intc>;
297 interrupts = <10>;
298
299 clocks = <&cgu X1000_CLK_PDMA>;
300 };
301
302 msc0: mmc@13450000 {
303 compatible = "ingenic,x1000-mmc";
304 reg = <0x13450000 0x1000>;
305
306 interrupt-parent = <&intc>;
307 interrupts = <37>;
308
309 clocks = <&cgu X1000_CLK_MSC0>;
310 clock-names = "mmc";
311
312 cap-sd-highspeed;
313 cap-mmc-highspeed;
314 cap-sdio-irq;
315
316 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
317 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
318 dma-names = "rx", "tx";
319
320 status = "disabled";
321 };
322
323 msc1: mmc@13460000 {
324 compatible = "ingenic,x1000-mmc";
325 reg = <0x13460000 0x1000>;
326
327 interrupt-parent = <&intc>;
328 interrupts = <36>;
329
330 clocks = <&cgu X1000_CLK_MSC1>;
331 clock-names = "mmc";
332
333 cap-sd-highspeed;
334 cap-mmc-highspeed;
335 cap-sdio-irq;
336
337 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
338 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
339 dma-names = "rx", "tx";
340
341 status = "disabled";
342 };
343
344 mac: ethernet@134b0000 {
345 compatible = "ingenic,x1000-mac", "snps,dwmac";
346 reg = <0x134b0000 0x2000>;
347
348 interrupt-parent = <&intc>;
349 interrupts = <55>;
350 interrupt-names = "macirq";
351
352 clocks = <&cgu X1000_CLK_MAC>;
353 clock-names = "stmmaceth";
354
355 mode-reg = <&mac_phy_ctrl>;
356
357 status = "disabled";
358
359 mdio: mdio {
360 compatible = "snps,dwmac-mdio";
361 #address-cells = <1>;
362 #size-cells = <0>;
363
364 status = "disabled";
365 };
366 };
367
368 otg: usb@13500000 {
369 compatible = "ingenic,x1000-otg", "snps,dwc2";
370 reg = <0x13500000 0x40000>;
371
372 interrupt-parent = <&intc>;
373 interrupts = <21>;
374
375 clocks = <&cgu X1000_CLK_OTG>;
376 clock-names = "otg";
377
378 phys = <&otg_phy>;
379 phy-names = "usb2-phy";
380
381 g-rx-fifo-size = <768>;
382 g-np-tx-fifo-size = <256>;
383 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
384
385 status = "disabled";
386 };
387};