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1#ifndef _ASM_IA64_PCI_H
2#define _ASM_IA64_PCI_H
3
4#include <linux/mm.h>
5#include <linux/slab.h>
6#include <linux/spinlock.h>
7#include <linux/string.h>
8#include <linux/types.h>
9
10#include <asm/io.h>
11#include <asm/scatterlist.h>
12#include <asm/hw_irq.h>
13
14/*
15 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
16 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
17 * loader.
18 */
19#define pcibios_assign_all_busses() 0
20
21#define PCIBIOS_MIN_IO 0x1000
22#define PCIBIOS_MIN_MEM 0x10000000
23
24void pcibios_config_init(void);
25
26struct pci_dev;
27
28/*
29 * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct
30 * correspondence between device bus addresses and CPU physical addresses.
31 * Platforms with a hardware I/O MMU _must_ turn this off to suppress the
32 * bounce buffer handling code in the block and network device layers.
33 * Platforms with separate bus address spaces _must_ turn this off and provide
34 * a device DMA mapping implementation that takes care of the necessary
35 * address translation.
36 *
37 * For now, the ia64 platforms which may have separate/multiple bus address
38 * spaces all have I/O MMUs which support the merging of physically
39 * discontiguous buffers, so we can use that as the sole factor to determine
40 * the setting of PCI_DMA_BUS_IS_PHYS.
41 */
42extern unsigned long ia64_max_iommu_merge_mask;
43#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
44
45static inline void
46pcibios_set_master (struct pci_dev *dev)
47{
48 /* No special bus mastering setup handling */
49}
50
51static inline void
52pcibios_penalize_isa_irq (int irq, int active)
53{
54 /* We don't do dynamic PCI IRQ allocation */
55}
56
57#include <asm-generic/pci-dma-compat.h>
58
59#ifdef CONFIG_PCI
60static inline void pci_dma_burst_advice(struct pci_dev *pdev,
61 enum pci_dma_burst_strategy *strat,
62 unsigned long *strategy_parameter)
63{
64 unsigned long cacheline_size;
65 u8 byte;
66
67 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
68 if (byte == 0)
69 cacheline_size = 1024;
70 else
71 cacheline_size = (int) byte * 4;
72
73 *strat = PCI_DMA_BURST_MULTIPLE;
74 *strategy_parameter = cacheline_size;
75}
76#endif
77
78#define HAVE_PCI_MMAP
79extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
80 enum pci_mmap_state mmap_state, int write_combine);
81#define HAVE_PCI_LEGACY
82extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
83 struct vm_area_struct *vma,
84 enum pci_mmap_state mmap_state);
85
86#define pci_get_legacy_mem platform_pci_get_legacy_mem
87#define pci_legacy_read platform_pci_legacy_read
88#define pci_legacy_write platform_pci_legacy_write
89
90struct pci_window {
91 struct resource resource;
92 u64 offset;
93};
94
95struct pci_controller {
96 void *acpi_handle;
97 void *iommu;
98 int segment;
99 int node; /* nearest node with memory or -1 for global allocation */
100
101 unsigned int windows;
102 struct pci_window *window;
103
104 void *platform_data;
105};
106
107#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
108#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
109
110extern struct pci_ops pci_root_ops;
111
112static inline int pci_proc_domain(struct pci_bus *bus)
113{
114 return (pci_domain_nr(bus) != 0);
115}
116
117extern void pcibios_resource_to_bus(struct pci_dev *dev,
118 struct pci_bus_region *region, struct resource *res);
119
120extern void pcibios_bus_to_resource(struct pci_dev *dev,
121 struct resource *res, struct pci_bus_region *region);
122
123static inline struct resource *
124pcibios_select_root(struct pci_dev *pdev, struct resource *res)
125{
126 struct resource *root = NULL;
127
128 if (res->flags & IORESOURCE_IO)
129 root = &ioport_resource;
130 if (res->flags & IORESOURCE_MEM)
131 root = &iomem_resource;
132
133 return root;
134}
135
136#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
137static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
138{
139 return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
140}
141
142#ifdef CONFIG_DMAR
143extern void pci_iommu_alloc(void);
144#endif
145#endif /* _ASM_IA64_PCI_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_IA64_PCI_H
3#define _ASM_IA64_PCI_H
4
5#include <linux/mm.h>
6#include <linux/slab.h>
7#include <linux/spinlock.h>
8#include <linux/string.h>
9#include <linux/types.h>
10#include <linux/scatterlist.h>
11
12#include <asm/io.h>
13#include <asm/hw_irq.h>
14
15struct pci_vector_struct {
16 __u16 segment; /* PCI Segment number */
17 __u16 bus; /* PCI Bus number */
18 __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
19 __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
20 __u32 irq; /* IRQ assigned */
21};
22
23/*
24 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
25 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
26 * loader.
27 */
28#define pcibios_assign_all_busses() 0
29
30#define PCIBIOS_MIN_IO 0x1000
31#define PCIBIOS_MIN_MEM 0x10000000
32
33#define HAVE_PCI_MMAP
34#define ARCH_GENERIC_PCI_MMAP_RESOURCE
35#define arch_can_pci_mmap_wc() 1
36
37#define HAVE_PCI_LEGACY
38extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
39 struct vm_area_struct *vma,
40 enum pci_mmap_state mmap_state);
41
42char *pci_get_legacy_mem(struct pci_bus *bus);
43int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size);
44int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size);
45
46struct pci_controller {
47 struct acpi_device *companion;
48 void *iommu;
49 int segment;
50 int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */
51
52 void *platform_data;
53};
54
55
56#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
57#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
58
59extern struct pci_ops pci_root_ops;
60
61static inline int pci_proc_domain(struct pci_bus *bus)
62{
63 return (pci_domain_nr(bus) != 0);
64}
65
66#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
67static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
68{
69 return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
70}
71
72#endif /* _ASM_IA64_PCI_H */