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1/*
2 * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef _UAPI_TEGRA_DRM_H_
24#define _UAPI_TEGRA_DRM_H_
25
26#include "drm.h"
27
28#if defined(__cplusplus)
29extern "C" {
30#endif
31
32#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
33#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
34
35/**
36 * struct drm_tegra_gem_create - parameters for the GEM object creation IOCTL
37 */
38struct drm_tegra_gem_create {
39 /**
40 * @size:
41 *
42 * The size, in bytes, of the buffer object to be created.
43 */
44 __u64 size;
45
46 /**
47 * @flags:
48 *
49 * A bitmask of flags that influence the creation of GEM objects:
50 *
51 * DRM_TEGRA_GEM_CREATE_TILED
52 * Use the 16x16 tiling format for this buffer.
53 *
54 * DRM_TEGRA_GEM_CREATE_BOTTOM_UP
55 * The buffer has a bottom-up layout.
56 */
57 __u32 flags;
58
59 /**
60 * @handle:
61 *
62 * The handle of the created GEM object. Set by the kernel upon
63 * successful completion of the IOCTL.
64 */
65 __u32 handle;
66};
67
68/**
69 * struct drm_tegra_gem_mmap - parameters for the GEM mmap IOCTL
70 */
71struct drm_tegra_gem_mmap {
72 /**
73 * @handle:
74 *
75 * Handle of the GEM object to obtain an mmap offset for.
76 */
77 __u32 handle;
78
79 /**
80 * @pad:
81 *
82 * Structure padding that may be used in the future. Must be 0.
83 */
84 __u32 pad;
85
86 /**
87 * @offset:
88 *
89 * The mmap offset for the given GEM object. Set by the kernel upon
90 * successful completion of the IOCTL.
91 */
92 __u64 offset;
93};
94
95/**
96 * struct drm_tegra_syncpt_read - parameters for the read syncpoint IOCTL
97 */
98struct drm_tegra_syncpt_read {
99 /**
100 * @id:
101 *
102 * ID of the syncpoint to read the current value from.
103 */
104 __u32 id;
105
106 /**
107 * @value:
108 *
109 * The current syncpoint value. Set by the kernel upon successful
110 * completion of the IOCTL.
111 */
112 __u32 value;
113};
114
115/**
116 * struct drm_tegra_syncpt_incr - parameters for the increment syncpoint IOCTL
117 */
118struct drm_tegra_syncpt_incr {
119 /**
120 * @id:
121 *
122 * ID of the syncpoint to increment.
123 */
124 __u32 id;
125
126 /**
127 * @pad:
128 *
129 * Structure padding that may be used in the future. Must be 0.
130 */
131 __u32 pad;
132};
133
134/**
135 * struct drm_tegra_syncpt_wait - parameters for the wait syncpoint IOCTL
136 */
137struct drm_tegra_syncpt_wait {
138 /**
139 * @id:
140 *
141 * ID of the syncpoint to wait on.
142 */
143 __u32 id;
144
145 /**
146 * @thresh:
147 *
148 * Threshold value for which to wait.
149 */
150 __u32 thresh;
151
152 /**
153 * @timeout:
154 *
155 * Timeout, in milliseconds, to wait.
156 */
157 __u32 timeout;
158
159 /**
160 * @value:
161 *
162 * The new syncpoint value after the wait. Set by the kernel upon
163 * successful completion of the IOCTL.
164 */
165 __u32 value;
166};
167
168#define DRM_TEGRA_NO_TIMEOUT (0xffffffff)
169
170/**
171 * struct drm_tegra_open_channel - parameters for the open channel IOCTL
172 */
173struct drm_tegra_open_channel {
174 /**
175 * @client:
176 *
177 * The client ID for this channel.
178 */
179 __u32 client;
180
181 /**
182 * @pad:
183 *
184 * Structure padding that may be used in the future. Must be 0.
185 */
186 __u32 pad;
187
188 /**
189 * @context:
190 *
191 * The application context of this channel. Set by the kernel upon
192 * successful completion of the IOCTL. This context needs to be passed
193 * to the DRM_TEGRA_CHANNEL_CLOSE or the DRM_TEGRA_SUBMIT IOCTLs.
194 */
195 __u64 context;
196};
197
198/**
199 * struct drm_tegra_close_channel - parameters for the close channel IOCTL
200 */
201struct drm_tegra_close_channel {
202 /**
203 * @context:
204 *
205 * The application context of this channel. This is obtained from the
206 * DRM_TEGRA_OPEN_CHANNEL IOCTL.
207 */
208 __u64 context;
209};
210
211/**
212 * struct drm_tegra_get_syncpt - parameters for the get syncpoint IOCTL
213 */
214struct drm_tegra_get_syncpt {
215 /**
216 * @context:
217 *
218 * The application context identifying the channel for which to obtain
219 * the syncpoint ID.
220 */
221 __u64 context;
222
223 /**
224 * @index:
225 *
226 * Index of the client syncpoint for which to obtain the ID.
227 */
228 __u32 index;
229
230 /**
231 * @id:
232 *
233 * The ID of the given syncpoint. Set by the kernel upon successful
234 * completion of the IOCTL.
235 */
236 __u32 id;
237};
238
239/**
240 * struct drm_tegra_get_syncpt_base - parameters for the get wait base IOCTL
241 */
242struct drm_tegra_get_syncpt_base {
243 /**
244 * @context:
245 *
246 * The application context identifying for which channel to obtain the
247 * wait base.
248 */
249 __u64 context;
250
251 /**
252 * @syncpt:
253 *
254 * ID of the syncpoint for which to obtain the wait base.
255 */
256 __u32 syncpt;
257
258 /**
259 * @id:
260 *
261 * The ID of the wait base corresponding to the client syncpoint. Set
262 * by the kernel upon successful completion of the IOCTL.
263 */
264 __u32 id;
265};
266
267/**
268 * struct drm_tegra_syncpt - syncpoint increment operation
269 */
270struct drm_tegra_syncpt {
271 /**
272 * @id:
273 *
274 * ID of the syncpoint to operate on.
275 */
276 __u32 id;
277
278 /**
279 * @incrs:
280 *
281 * Number of increments to perform for the syncpoint.
282 */
283 __u32 incrs;
284};
285
286/**
287 * struct drm_tegra_cmdbuf - structure describing a command buffer
288 */
289struct drm_tegra_cmdbuf {
290 /**
291 * @handle:
292 *
293 * Handle to a GEM object containing the command buffer.
294 */
295 __u32 handle;
296
297 /**
298 * @offset:
299 *
300 * Offset, in bytes, into the GEM object identified by @handle at
301 * which the command buffer starts.
302 */
303 __u32 offset;
304
305 /**
306 * @words:
307 *
308 * Number of 32-bit words in this command buffer.
309 */
310 __u32 words;
311
312 /**
313 * @pad:
314 *
315 * Structure padding that may be used in the future. Must be 0.
316 */
317 __u32 pad;
318};
319
320/**
321 * struct drm_tegra_reloc - GEM object relocation structure
322 */
323struct drm_tegra_reloc {
324 struct {
325 /**
326 * @cmdbuf.handle:
327 *
328 * Handle to the GEM object containing the command buffer for
329 * which to perform this GEM object relocation.
330 */
331 __u32 handle;
332
333 /**
334 * @cmdbuf.offset:
335 *
336 * Offset, in bytes, into the command buffer at which to
337 * insert the relocated address.
338 */
339 __u32 offset;
340 } cmdbuf;
341 struct {
342 /**
343 * @target.handle:
344 *
345 * Handle to the GEM object to be relocated.
346 */
347 __u32 handle;
348
349 /**
350 * @target.offset:
351 *
352 * Offset, in bytes, into the target GEM object at which the
353 * relocated data starts.
354 */
355 __u32 offset;
356 } target;
357
358 /**
359 * @shift:
360 *
361 * The number of bits by which to shift relocated addresses.
362 */
363 __u32 shift;
364
365 /**
366 * @pad:
367 *
368 * Structure padding that may be used in the future. Must be 0.
369 */
370 __u32 pad;
371};
372
373/**
374 * struct drm_tegra_waitchk - wait check structure
375 */
376struct drm_tegra_waitchk {
377 /**
378 * @handle:
379 *
380 * Handle to the GEM object containing a command stream on which to
381 * perform the wait check.
382 */
383 __u32 handle;
384
385 /**
386 * @offset:
387 *
388 * Offset, in bytes, of the location in the command stream to perform
389 * the wait check on.
390 */
391 __u32 offset;
392
393 /**
394 * @syncpt:
395 *
396 * ID of the syncpoint to wait check.
397 */
398 __u32 syncpt;
399
400 /**
401 * @thresh:
402 *
403 * Threshold value for which to check.
404 */
405 __u32 thresh;
406};
407
408/**
409 * struct drm_tegra_submit - job submission structure
410 */
411struct drm_tegra_submit {
412 /**
413 * @context:
414 *
415 * The application context identifying the channel to use for the
416 * execution of this job.
417 */
418 __u64 context;
419
420 /**
421 * @num_syncpts:
422 *
423 * The number of syncpoints operated on by this job. This defines the
424 * length of the array pointed to by @syncpts.
425 */
426 __u32 num_syncpts;
427
428 /**
429 * @num_cmdbufs:
430 *
431 * The number of command buffers to execute as part of this job. This
432 * defines the length of the array pointed to by @cmdbufs.
433 */
434 __u32 num_cmdbufs;
435
436 /**
437 * @num_relocs:
438 *
439 * The number of relocations to perform before executing this job.
440 * This defines the length of the array pointed to by @relocs.
441 */
442 __u32 num_relocs;
443
444 /**
445 * @num_waitchks:
446 *
447 * The number of wait checks to perform as part of this job. This
448 * defines the length of the array pointed to by @waitchks.
449 */
450 __u32 num_waitchks;
451
452 /**
453 * @waitchk_mask:
454 *
455 * Bitmask of valid wait checks.
456 */
457 __u32 waitchk_mask;
458
459 /**
460 * @timeout:
461 *
462 * Timeout, in milliseconds, before this job is cancelled.
463 */
464 __u32 timeout;
465
466 /**
467 * @syncpts:
468 *
469 * A pointer to an array of &struct drm_tegra_syncpt structures that
470 * specify the syncpoint operations performed as part of this job.
471 * The number of elements in the array must be equal to the value
472 * given by @num_syncpts.
473 */
474 __u64 syncpts;
475
476 /**
477 * @cmdbufs:
478 *
479 * A pointer to an array of &struct drm_tegra_cmdbuf structures that
480 * define the command buffers to execute as part of this job. The
481 * number of elements in the array must be equal to the value given
482 * by @num_syncpts.
483 */
484 __u64 cmdbufs;
485
486 /**
487 * @relocs:
488 *
489 * A pointer to an array of &struct drm_tegra_reloc structures that
490 * specify the relocations that need to be performed before executing
491 * this job. The number of elements in the array must be equal to the
492 * value given by @num_relocs.
493 */
494 __u64 relocs;
495
496 /**
497 * @waitchks:
498 *
499 * A pointer to an array of &struct drm_tegra_waitchk structures that
500 * specify the wait checks to be performed while executing this job.
501 * The number of elements in the array must be equal to the value
502 * given by @num_waitchks.
503 */
504 __u64 waitchks;
505
506 /**
507 * @fence:
508 *
509 * The threshold of the syncpoint associated with this job after it
510 * has been completed. Set by the kernel upon successful completion of
511 * the IOCTL. This can be used with the DRM_TEGRA_SYNCPT_WAIT IOCTL to
512 * wait for this job to be finished.
513 */
514 __u32 fence;
515
516 /**
517 * @reserved:
518 *
519 * This field is reserved for future use. Must be 0.
520 */
521 __u32 reserved[5];
522};
523
524#define DRM_TEGRA_GEM_TILING_MODE_PITCH 0
525#define DRM_TEGRA_GEM_TILING_MODE_TILED 1
526#define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2
527
528/**
529 * struct drm_tegra_gem_set_tiling - parameters for the set tiling IOCTL
530 */
531struct drm_tegra_gem_set_tiling {
532 /**
533 * @handle:
534 *
535 * Handle to the GEM object for which to set the tiling parameters.
536 */
537 __u32 handle;
538
539 /**
540 * @mode:
541 *
542 * The tiling mode to set. Must be one of:
543 *
544 * DRM_TEGRA_GEM_TILING_MODE_PITCH
545 * pitch linear format
546 *
547 * DRM_TEGRA_GEM_TILING_MODE_TILED
548 * 16x16 tiling format
549 *
550 * DRM_TEGRA_GEM_TILING_MODE_BLOCK
551 * 16Bx2 tiling format
552 */
553 __u32 mode;
554
555 /**
556 * @value:
557 *
558 * The value to set for the tiling mode parameter.
559 */
560 __u32 value;
561
562 /**
563 * @pad:
564 *
565 * Structure padding that may be used in the future. Must be 0.
566 */
567 __u32 pad;
568};
569
570/**
571 * struct drm_tegra_gem_get_tiling - parameters for the get tiling IOCTL
572 */
573struct drm_tegra_gem_get_tiling {
574 /**
575 * @handle:
576 *
577 * Handle to the GEM object for which to query the tiling parameters.
578 */
579 __u32 handle;
580
581 /**
582 * @mode:
583 *
584 * The tiling mode currently associated with the GEM object. Set by
585 * the kernel upon successful completion of the IOCTL.
586 */
587 __u32 mode;
588
589 /**
590 * @value:
591 *
592 * The tiling mode parameter currently associated with the GEM object.
593 * Set by the kernel upon successful completion of the IOCTL.
594 */
595 __u32 value;
596
597 /**
598 * @pad:
599 *
600 * Structure padding that may be used in the future. Must be 0.
601 */
602 __u32 pad;
603};
604
605#define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0)
606#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP)
607
608/**
609 * struct drm_tegra_gem_set_flags - parameters for the set flags IOCTL
610 */
611struct drm_tegra_gem_set_flags {
612 /**
613 * @handle:
614 *
615 * Handle to the GEM object for which to set the flags.
616 */
617 __u32 handle;
618
619 /**
620 * @flags:
621 *
622 * The flags to set for the GEM object.
623 */
624 __u32 flags;
625};
626
627/**
628 * struct drm_tegra_gem_get_flags - parameters for the get flags IOCTL
629 */
630struct drm_tegra_gem_get_flags {
631 /**
632 * @handle:
633 *
634 * Handle to the GEM object for which to query the flags.
635 */
636 __u32 handle;
637
638 /**
639 * @flags:
640 *
641 * The flags currently associated with the GEM object. Set by the
642 * kernel upon successful completion of the IOCTL.
643 */
644 __u32 flags;
645};
646
647#define DRM_TEGRA_GEM_CREATE 0x00
648#define DRM_TEGRA_GEM_MMAP 0x01
649#define DRM_TEGRA_SYNCPT_READ 0x02
650#define DRM_TEGRA_SYNCPT_INCR 0x03
651#define DRM_TEGRA_SYNCPT_WAIT 0x04
652#define DRM_TEGRA_OPEN_CHANNEL 0x05
653#define DRM_TEGRA_CLOSE_CHANNEL 0x06
654#define DRM_TEGRA_GET_SYNCPT 0x07
655#define DRM_TEGRA_SUBMIT 0x08
656#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
657#define DRM_TEGRA_GEM_SET_TILING 0x0a
658#define DRM_TEGRA_GEM_GET_TILING 0x0b
659#define DRM_TEGRA_GEM_SET_FLAGS 0x0c
660#define DRM_TEGRA_GEM_GET_FLAGS 0x0d
661
662#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
663#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
664#define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
665#define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
666#define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
667#define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
668#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_close_channel)
669#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
670#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
671#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
672#define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling)
673#define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling)
674#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
675#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
676
677#if defined(__cplusplus)
678}
679#endif
680
681#endif