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1/*
2 * sp5100_tco : TCO timer driver for sp5100 chipsets
3 *
4 * (c) Copyright 2009 Google Inc., All Rights Reserved.
5 *
6 * Based on i8xx_tco.c:
7 * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
8 * Reserved.
9 * http://www.kernelconcepts.de
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide"
17 */
18
19/*
20 * Includes, defines, variables, module parameters, ...
21 */
22
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/watchdog.h>
28#include <linux/init.h>
29#include <linux/fs.h>
30#include <linux/pci.h>
31#include <linux/ioport.h>
32#include <linux/platform_device.h>
33#include <linux/uaccess.h>
34#include <linux/io.h>
35
36#include "sp5100_tco.h"
37
38/* Module and version information */
39#define TCO_VERSION "0.01"
40#define TCO_MODULE_NAME "SP5100 TCO timer"
41#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
42#define PFX TCO_MODULE_NAME ": "
43
44/* internal variables */
45static u32 tcobase_phys;
46static void __iomem *tcobase;
47static unsigned int pm_iobase;
48static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */
49static unsigned long timer_alive;
50static char tco_expect_close;
51static struct pci_dev *sp5100_tco_pci;
52
53/* the watchdog platform device */
54static struct platform_device *sp5100_tco_platform_device;
55
56/* module parameters */
57
58#define WATCHDOG_HEARTBEAT 60 /* 60 sec default heartbeat. */
59static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
60module_param(heartbeat, int, 0);
61MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
62 __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
63
64static int nowayout = WATCHDOG_NOWAYOUT;
65module_param(nowayout, int, 0);
66MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"
67 " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
68
69/*
70 * Some TCO specific functions
71 */
72static void tco_timer_start(void)
73{
74 u32 val;
75 unsigned long flags;
76
77 spin_lock_irqsave(&tco_lock, flags);
78 val = readl(SP5100_WDT_CONTROL(tcobase));
79 val |= SP5100_WDT_START_STOP_BIT;
80 writel(val, SP5100_WDT_CONTROL(tcobase));
81 spin_unlock_irqrestore(&tco_lock, flags);
82}
83
84static void tco_timer_stop(void)
85{
86 u32 val;
87 unsigned long flags;
88
89 spin_lock_irqsave(&tco_lock, flags);
90 val = readl(SP5100_WDT_CONTROL(tcobase));
91 val &= ~SP5100_WDT_START_STOP_BIT;
92 writel(val, SP5100_WDT_CONTROL(tcobase));
93 spin_unlock_irqrestore(&tco_lock, flags);
94}
95
96static void tco_timer_keepalive(void)
97{
98 u32 val;
99 unsigned long flags;
100
101 spin_lock_irqsave(&tco_lock, flags);
102 val = readl(SP5100_WDT_CONTROL(tcobase));
103 val |= SP5100_WDT_TRIGGER_BIT;
104 writel(val, SP5100_WDT_CONTROL(tcobase));
105 spin_unlock_irqrestore(&tco_lock, flags);
106}
107
108static int tco_timer_set_heartbeat(int t)
109{
110 unsigned long flags;
111
112 if (t < 0 || t > 0xffff)
113 return -EINVAL;
114
115 /* Write new heartbeat to watchdog */
116 spin_lock_irqsave(&tco_lock, flags);
117 writel(t, SP5100_WDT_COUNT(tcobase));
118 spin_unlock_irqrestore(&tco_lock, flags);
119
120 heartbeat = t;
121 return 0;
122}
123
124/*
125 * /dev/watchdog handling
126 */
127
128static int sp5100_tco_open(struct inode *inode, struct file *file)
129{
130 /* /dev/watchdog can only be opened once */
131 if (test_and_set_bit(0, &timer_alive))
132 return -EBUSY;
133
134 /* Reload and activate timer */
135 tco_timer_start();
136 tco_timer_keepalive();
137 return nonseekable_open(inode, file);
138}
139
140static int sp5100_tco_release(struct inode *inode, struct file *file)
141{
142 /* Shut off the timer. */
143 if (tco_expect_close == 42) {
144 tco_timer_stop();
145 } else {
146 printk(KERN_CRIT PFX
147 "Unexpected close, not stopping watchdog!\n");
148 tco_timer_keepalive();
149 }
150 clear_bit(0, &timer_alive);
151 tco_expect_close = 0;
152 return 0;
153}
154
155static ssize_t sp5100_tco_write(struct file *file, const char __user *data,
156 size_t len, loff_t *ppos)
157{
158 /* See if we got the magic character 'V' and reload the timer */
159 if (len) {
160 if (!nowayout) {
161 size_t i;
162
163 /* note: just in case someone wrote the magic character
164 * five months ago... */
165 tco_expect_close = 0;
166
167 /* scan to see whether or not we got the magic character
168 */
169 for (i = 0; i != len; i++) {
170 char c;
171 if (get_user(c, data + i))
172 return -EFAULT;
173 if (c == 'V')
174 tco_expect_close = 42;
175 }
176 }
177
178 /* someone wrote to us, we should reload the timer */
179 tco_timer_keepalive();
180 }
181 return len;
182}
183
184static long sp5100_tco_ioctl(struct file *file, unsigned int cmd,
185 unsigned long arg)
186{
187 int new_options, retval = -EINVAL;
188 int new_heartbeat;
189 void __user *argp = (void __user *)arg;
190 int __user *p = argp;
191 static const struct watchdog_info ident = {
192 .options = WDIOF_SETTIMEOUT |
193 WDIOF_KEEPALIVEPING |
194 WDIOF_MAGICCLOSE,
195 .firmware_version = 0,
196 .identity = TCO_MODULE_NAME,
197 };
198
199 switch (cmd) {
200 case WDIOC_GETSUPPORT:
201 return copy_to_user(argp, &ident,
202 sizeof(ident)) ? -EFAULT : 0;
203 case WDIOC_GETSTATUS:
204 case WDIOC_GETBOOTSTATUS:
205 return put_user(0, p);
206 case WDIOC_SETOPTIONS:
207 if (get_user(new_options, p))
208 return -EFAULT;
209 if (new_options & WDIOS_DISABLECARD) {
210 tco_timer_stop();
211 retval = 0;
212 }
213 if (new_options & WDIOS_ENABLECARD) {
214 tco_timer_start();
215 tco_timer_keepalive();
216 retval = 0;
217 }
218 return retval;
219 case WDIOC_KEEPALIVE:
220 tco_timer_keepalive();
221 return 0;
222 case WDIOC_SETTIMEOUT:
223 if (get_user(new_heartbeat, p))
224 return -EFAULT;
225 if (tco_timer_set_heartbeat(new_heartbeat))
226 return -EINVAL;
227 tco_timer_keepalive();
228 /* Fall through */
229 case WDIOC_GETTIMEOUT:
230 return put_user(heartbeat, p);
231 default:
232 return -ENOTTY;
233 }
234}
235
236/*
237 * Kernel Interfaces
238 */
239
240static const struct file_operations sp5100_tco_fops = {
241 .owner = THIS_MODULE,
242 .llseek = no_llseek,
243 .write = sp5100_tco_write,
244 .unlocked_ioctl = sp5100_tco_ioctl,
245 .open = sp5100_tco_open,
246 .release = sp5100_tco_release,
247};
248
249static struct miscdevice sp5100_tco_miscdev = {
250 .minor = WATCHDOG_MINOR,
251 .name = "watchdog",
252 .fops = &sp5100_tco_fops,
253};
254
255/*
256 * Data for PCI driver interface
257 *
258 * This data only exists for exporting the supported
259 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
260 * register a pci_driver, because someone else might
261 * want to register another driver on the same PCI id.
262 */
263static DEFINE_PCI_DEVICE_TABLE(sp5100_tco_pci_tbl) = {
264 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
265 PCI_ANY_ID, },
266 { 0, }, /* End of list */
267};
268MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
269
270/*
271 * Init & exit routines
272 */
273
274static unsigned char __devinit sp5100_tco_setupdevice(void)
275{
276 struct pci_dev *dev = NULL;
277 u32 val;
278
279 /* Match the PCI device */
280 for_each_pci_dev(dev) {
281 if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
282 sp5100_tco_pci = dev;
283 break;
284 }
285 }
286
287 if (!sp5100_tco_pci)
288 return 0;
289
290 /* Request the IO ports used by this driver */
291 pm_iobase = SP5100_IO_PM_INDEX_REG;
292 if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, "SP5100 TCO")) {
293 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
294 pm_iobase);
295 goto exit;
296 }
297
298 /* Find the watchdog base address. */
299 outb(SP5100_PM_WATCHDOG_BASE3, SP5100_IO_PM_INDEX_REG);
300 val = inb(SP5100_IO_PM_DATA_REG);
301 outb(SP5100_PM_WATCHDOG_BASE2, SP5100_IO_PM_INDEX_REG);
302 val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
303 outb(SP5100_PM_WATCHDOG_BASE1, SP5100_IO_PM_INDEX_REG);
304 val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
305 outb(SP5100_PM_WATCHDOG_BASE0, SP5100_IO_PM_INDEX_REG);
306 /* Low three bits of BASE0 are reserved. */
307 val = val << 8 | (inb(SP5100_IO_PM_DATA_REG) & 0xf8);
308
309 if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
310 "SP5100 TCO")) {
311 printk(KERN_ERR PFX "mmio address 0x%04x already in use\n",
312 val);
313 goto unreg_region;
314 }
315 tcobase_phys = val;
316
317 tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE);
318 if (tcobase == 0) {
319 printk(KERN_ERR PFX "failed to get tcobase address\n");
320 goto unreg_mem_region;
321 }
322
323 /* Enable watchdog decode bit */
324 pci_read_config_dword(sp5100_tco_pci,
325 SP5100_PCI_WATCHDOG_MISC_REG,
326 &val);
327
328 val |= SP5100_PCI_WATCHDOG_DECODE_EN;
329
330 pci_write_config_dword(sp5100_tco_pci,
331 SP5100_PCI_WATCHDOG_MISC_REG,
332 val);
333
334 /* Enable Watchdog timer and set the resolution to 1 sec. */
335 outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG);
336 val = inb(SP5100_IO_PM_DATA_REG);
337 val |= SP5100_PM_WATCHDOG_SECOND_RES;
338 val &= ~SP5100_PM_WATCHDOG_DISABLE;
339 outb(val, SP5100_IO_PM_DATA_REG);
340
341 /* Check that the watchdog action is set to reset the system. */
342 val = readl(SP5100_WDT_CONTROL(tcobase));
343 val &= ~SP5100_PM_WATCHDOG_ACTION_RESET;
344 writel(val, SP5100_WDT_CONTROL(tcobase));
345
346 /* Set a reasonable heartbeat before we stop the timer */
347 tco_timer_set_heartbeat(heartbeat);
348
349 /*
350 * Stop the TCO before we change anything so we don't race with
351 * a zeroed timer.
352 */
353 tco_timer_stop();
354
355 /* Done */
356 return 1;
357
358unreg_mem_region:
359 release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
360unreg_region:
361 release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
362exit:
363 return 0;
364}
365
366static int __devinit sp5100_tco_init(struct platform_device *dev)
367{
368 int ret;
369 u32 val;
370
371 /* Check whether or not the hardware watchdog is there. If found, then
372 * set it up.
373 */
374 if (!sp5100_tco_setupdevice())
375 return -ENODEV;
376
377 /* Check to see if last reboot was due to watchdog timeout */
378 printk(KERN_INFO PFX "Watchdog reboot %sdetected.\n",
379 readl(SP5100_WDT_CONTROL(tcobase)) & SP5100_PM_WATCHDOG_FIRED ?
380 "" : "not ");
381
382 /* Clear out the old status */
383 val = readl(SP5100_WDT_CONTROL(tcobase));
384 val &= ~SP5100_PM_WATCHDOG_FIRED;
385 writel(val, SP5100_WDT_CONTROL(tcobase));
386
387 /*
388 * Check that the heartbeat value is within it's range.
389 * If not, reset to the default.
390 */
391 if (tco_timer_set_heartbeat(heartbeat)) {
392 heartbeat = WATCHDOG_HEARTBEAT;
393 tco_timer_set_heartbeat(heartbeat);
394 }
395
396 ret = misc_register(&sp5100_tco_miscdev);
397 if (ret != 0) {
398 printk(KERN_ERR PFX "cannot register miscdev on minor="
399 "%d (err=%d)\n",
400 WATCHDOG_MINOR, ret);
401 goto exit;
402 }
403
404 clear_bit(0, &timer_alive);
405
406 printk(KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec"
407 " (nowayout=%d)\n",
408 tcobase, heartbeat, nowayout);
409
410 return 0;
411
412exit:
413 iounmap(tcobase);
414 release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
415 release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
416 return ret;
417}
418
419static void __devexit sp5100_tco_cleanup(void)
420{
421 /* Stop the timer before we leave */
422 if (!nowayout)
423 tco_timer_stop();
424
425 /* Deregister */
426 misc_deregister(&sp5100_tco_miscdev);
427 iounmap(tcobase);
428 release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
429 release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
430}
431
432static int __devexit sp5100_tco_remove(struct platform_device *dev)
433{
434 if (tcobase)
435 sp5100_tco_cleanup();
436 return 0;
437}
438
439static void sp5100_tco_shutdown(struct platform_device *dev)
440{
441 tco_timer_stop();
442}
443
444static struct platform_driver sp5100_tco_driver = {
445 .probe = sp5100_tco_init,
446 .remove = __devexit_p(sp5100_tco_remove),
447 .shutdown = sp5100_tco_shutdown,
448 .driver = {
449 .owner = THIS_MODULE,
450 .name = TCO_MODULE_NAME,
451 },
452};
453
454static int __init sp5100_tco_init_module(void)
455{
456 int err;
457
458 printk(KERN_INFO PFX "SP5100 TCO WatchDog Timer Driver v%s\n",
459 TCO_VERSION);
460
461 err = platform_driver_register(&sp5100_tco_driver);
462 if (err)
463 return err;
464
465 sp5100_tco_platform_device = platform_device_register_simple(
466 TCO_MODULE_NAME, -1, NULL, 0);
467 if (IS_ERR(sp5100_tco_platform_device)) {
468 err = PTR_ERR(sp5100_tco_platform_device);
469 goto unreg_platform_driver;
470 }
471
472 return 0;
473
474unreg_platform_driver:
475 platform_driver_unregister(&sp5100_tco_driver);
476 return err;
477}
478
479static void __exit sp5100_tco_cleanup_module(void)
480{
481 platform_device_unregister(sp5100_tco_platform_device);
482 platform_driver_unregister(&sp5100_tco_driver);
483 printk(KERN_INFO PFX "SP5100 TCO Watchdog Module Unloaded.\n");
484}
485
486module_init(sp5100_tco_init_module);
487module_exit(sp5100_tco_cleanup_module);
488
489MODULE_AUTHOR("Priyanka Gupta");
490MODULE_DESCRIPTION("TCO timer driver for SP5100 chipset");
491MODULE_LICENSE("GPL");
492MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * sp5100_tco : TCO timer driver for sp5100 chipsets
4 *
5 * (c) Copyright 2009 Google Inc., All Rights Reserved.
6 *
7 * Based on i8xx_tco.c:
8 * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
9 * Reserved.
10 * https://www.kernelconcepts.de
11 *
12 * See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide",
13 * AMD Publication 45482 "AMD SB800-Series Southbridges Register
14 * Reference Guide"
15 * AMD Publication 48751 "BIOS and Kernel Developer’s Guide (BKDG)
16 * for AMD Family 16h Models 00h-0Fh Processors"
17 * AMD Publication 51192 "AMD Bolton FCH Register Reference Guide"
18 * AMD Publication 52740 "BIOS and Kernel Developer’s Guide (BKDG)
19 * for AMD Family 16h Models 30h-3Fh Processors"
20 * AMD Publication 55570-B1-PUB "Processor Programming Reference (PPR)
21 * for AMD Family 17h Model 18h, Revision B1
22 * Processors (PUB)
23 * AMD Publication 55772-A1-PUB "Processor Programming Reference (PPR)
24 * for AMD Family 17h Model 20h, Revision A1
25 * Processors (PUB)
26 */
27
28/*
29 * Includes, defines, variables, module parameters, ...
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/init.h>
35#include <linux/io.h>
36#include <linux/ioport.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <linux/platform_device.h>
41#include <linux/types.h>
42#include <linux/watchdog.h>
43
44#include "sp5100_tco.h"
45
46#define TCO_DRIVER_NAME "sp5100-tco"
47
48/* internal variables */
49
50enum tco_reg_layout {
51 sp5100, sb800, efch
52};
53
54struct sp5100_tco {
55 struct watchdog_device wdd;
56 void __iomem *tcobase;
57 enum tco_reg_layout tco_reg_layout;
58};
59
60/* the watchdog platform device */
61static struct platform_device *sp5100_tco_platform_device;
62/* the associated PCI device */
63static struct pci_dev *sp5100_tco_pci;
64
65/* module parameters */
66
67#define WATCHDOG_HEARTBEAT 60 /* 60 sec default heartbeat. */
68static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
69module_param(heartbeat, int, 0);
70MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
71 __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
72
73static bool nowayout = WATCHDOG_NOWAYOUT;
74module_param(nowayout, bool, 0);
75MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
76 " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
77
78/*
79 * Some TCO specific functions
80 */
81
82static enum tco_reg_layout tco_reg_layout(struct pci_dev *dev)
83{
84 if (dev->vendor == PCI_VENDOR_ID_ATI &&
85 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
86 dev->revision < 0x40) {
87 return sp5100;
88 } else if (dev->vendor == PCI_VENDOR_ID_AMD &&
89 ((dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
90 dev->revision >= 0x41) ||
91 (dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
92 dev->revision >= 0x49))) {
93 return efch;
94 }
95 return sb800;
96}
97
98static int tco_timer_start(struct watchdog_device *wdd)
99{
100 struct sp5100_tco *tco = watchdog_get_drvdata(wdd);
101 u32 val;
102
103 val = readl(SP5100_WDT_CONTROL(tco->tcobase));
104 val |= SP5100_WDT_START_STOP_BIT;
105 writel(val, SP5100_WDT_CONTROL(tco->tcobase));
106
107 return 0;
108}
109
110static int tco_timer_stop(struct watchdog_device *wdd)
111{
112 struct sp5100_tco *tco = watchdog_get_drvdata(wdd);
113 u32 val;
114
115 val = readl(SP5100_WDT_CONTROL(tco->tcobase));
116 val &= ~SP5100_WDT_START_STOP_BIT;
117 writel(val, SP5100_WDT_CONTROL(tco->tcobase));
118
119 return 0;
120}
121
122static int tco_timer_ping(struct watchdog_device *wdd)
123{
124 struct sp5100_tco *tco = watchdog_get_drvdata(wdd);
125 u32 val;
126
127 val = readl(SP5100_WDT_CONTROL(tco->tcobase));
128 val |= SP5100_WDT_TRIGGER_BIT;
129 writel(val, SP5100_WDT_CONTROL(tco->tcobase));
130
131 return 0;
132}
133
134static int tco_timer_set_timeout(struct watchdog_device *wdd,
135 unsigned int t)
136{
137 struct sp5100_tco *tco = watchdog_get_drvdata(wdd);
138
139 /* Write new heartbeat to watchdog */
140 writel(t, SP5100_WDT_COUNT(tco->tcobase));
141
142 wdd->timeout = t;
143
144 return 0;
145}
146
147static u8 sp5100_tco_read_pm_reg8(u8 index)
148{
149 outb(index, SP5100_IO_PM_INDEX_REG);
150 return inb(SP5100_IO_PM_DATA_REG);
151}
152
153static void sp5100_tco_update_pm_reg8(u8 index, u8 reset, u8 set)
154{
155 u8 val;
156
157 outb(index, SP5100_IO_PM_INDEX_REG);
158 val = inb(SP5100_IO_PM_DATA_REG);
159 val &= reset;
160 val |= set;
161 outb(val, SP5100_IO_PM_DATA_REG);
162}
163
164static void tco_timer_enable(struct sp5100_tco *tco)
165{
166 u32 val;
167
168 switch (tco->tco_reg_layout) {
169 case sb800:
170 /* For SB800 or later */
171 /* Set the Watchdog timer resolution to 1 sec */
172 sp5100_tco_update_pm_reg8(SB800_PM_WATCHDOG_CONFIG,
173 0xff, SB800_PM_WATCHDOG_SECOND_RES);
174
175 /* Enable watchdog decode bit and watchdog timer */
176 sp5100_tco_update_pm_reg8(SB800_PM_WATCHDOG_CONTROL,
177 ~SB800_PM_WATCHDOG_DISABLE,
178 SB800_PCI_WATCHDOG_DECODE_EN);
179 break;
180 case sp5100:
181 /* For SP5100 or SB7x0 */
182 /* Enable watchdog decode bit */
183 pci_read_config_dword(sp5100_tco_pci,
184 SP5100_PCI_WATCHDOG_MISC_REG,
185 &val);
186
187 val |= SP5100_PCI_WATCHDOG_DECODE_EN;
188
189 pci_write_config_dword(sp5100_tco_pci,
190 SP5100_PCI_WATCHDOG_MISC_REG,
191 val);
192
193 /* Enable Watchdog timer and set the resolution to 1 sec */
194 sp5100_tco_update_pm_reg8(SP5100_PM_WATCHDOG_CONTROL,
195 ~SP5100_PM_WATCHDOG_DISABLE,
196 SP5100_PM_WATCHDOG_SECOND_RES);
197 break;
198 case efch:
199 /* Set the Watchdog timer resolution to 1 sec and enable */
200 sp5100_tco_update_pm_reg8(EFCH_PM_DECODEEN3,
201 ~EFCH_PM_WATCHDOG_DISABLE,
202 EFCH_PM_DECODEEN_SECOND_RES);
203 break;
204 }
205}
206
207static u32 sp5100_tco_read_pm_reg32(u8 index)
208{
209 u32 val = 0;
210 int i;
211
212 for (i = 3; i >= 0; i--)
213 val = (val << 8) + sp5100_tco_read_pm_reg8(index + i);
214
215 return val;
216}
217
218static int sp5100_tco_setupdevice(struct device *dev,
219 struct watchdog_device *wdd)
220{
221 struct sp5100_tco *tco = watchdog_get_drvdata(wdd);
222 const char *dev_name;
223 u32 mmio_addr = 0, val;
224 int ret;
225
226 /* Request the IO ports used by this driver */
227 if (!request_muxed_region(SP5100_IO_PM_INDEX_REG,
228 SP5100_PM_IOPORTS_SIZE, "sp5100_tco")) {
229 dev_err(dev, "I/O address 0x%04x already in use\n",
230 SP5100_IO_PM_INDEX_REG);
231 return -EBUSY;
232 }
233
234 /*
235 * Determine type of southbridge chipset.
236 */
237 switch (tco->tco_reg_layout) {
238 case sp5100:
239 dev_name = SP5100_DEVNAME;
240 mmio_addr = sp5100_tco_read_pm_reg32(SP5100_PM_WATCHDOG_BASE) &
241 0xfffffff8;
242 break;
243 case sb800:
244 dev_name = SB800_DEVNAME;
245 mmio_addr = sp5100_tco_read_pm_reg32(SB800_PM_WATCHDOG_BASE) &
246 0xfffffff8;
247 break;
248 case efch:
249 dev_name = SB800_DEVNAME;
250 /*
251 * On Family 17h devices, the EFCH_PM_DECODEEN_WDT_TMREN bit of
252 * EFCH_PM_DECODEEN not only enables the EFCH_PM_WDT_ADDR memory
253 * region, it also enables the watchdog itself.
254 */
255 if (boot_cpu_data.x86 == 0x17) {
256 val = sp5100_tco_read_pm_reg8(EFCH_PM_DECODEEN);
257 if (!(val & EFCH_PM_DECODEEN_WDT_TMREN)) {
258 sp5100_tco_update_pm_reg8(EFCH_PM_DECODEEN, 0xff,
259 EFCH_PM_DECODEEN_WDT_TMREN);
260 }
261 }
262 val = sp5100_tco_read_pm_reg8(EFCH_PM_DECODEEN);
263 if (val & EFCH_PM_DECODEEN_WDT_TMREN)
264 mmio_addr = EFCH_PM_WDT_ADDR;
265 break;
266 default:
267 return -ENODEV;
268 }
269
270 /* Check MMIO address conflict */
271 if (!mmio_addr ||
272 !devm_request_mem_region(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE,
273 dev_name)) {
274 if (mmio_addr)
275 dev_dbg(dev, "MMIO address 0x%08x already in use\n",
276 mmio_addr);
277 switch (tco->tco_reg_layout) {
278 case sp5100:
279 /*
280 * Secondly, Find the watchdog timer MMIO address
281 * from SBResource_MMIO register.
282 */
283 /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
284 pci_read_config_dword(sp5100_tco_pci,
285 SP5100_SB_RESOURCE_MMIO_BASE,
286 &mmio_addr);
287 if ((mmio_addr & (SB800_ACPI_MMIO_DECODE_EN |
288 SB800_ACPI_MMIO_SEL)) !=
289 SB800_ACPI_MMIO_DECODE_EN) {
290 ret = -ENODEV;
291 goto unreg_region;
292 }
293 mmio_addr &= ~0xFFF;
294 mmio_addr += SB800_PM_WDT_MMIO_OFFSET;
295 break;
296 case sb800:
297 /* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
298 mmio_addr =
299 sp5100_tco_read_pm_reg32(SB800_PM_ACPI_MMIO_EN);
300 if ((mmio_addr & (SB800_ACPI_MMIO_DECODE_EN |
301 SB800_ACPI_MMIO_SEL)) !=
302 SB800_ACPI_MMIO_DECODE_EN) {
303 ret = -ENODEV;
304 goto unreg_region;
305 }
306 mmio_addr &= ~0xFFF;
307 mmio_addr += SB800_PM_WDT_MMIO_OFFSET;
308 break;
309 case efch:
310 val = sp5100_tco_read_pm_reg8(EFCH_PM_ISACONTROL);
311 if (!(val & EFCH_PM_ISACONTROL_MMIOEN)) {
312 ret = -ENODEV;
313 goto unreg_region;
314 }
315 mmio_addr = EFCH_PM_ACPI_MMIO_ADDR +
316 EFCH_PM_ACPI_MMIO_WDT_OFFSET;
317 break;
318 }
319 dev_dbg(dev, "Got 0x%08x from SBResource_MMIO register\n",
320 mmio_addr);
321 if (!devm_request_mem_region(dev, mmio_addr,
322 SP5100_WDT_MEM_MAP_SIZE,
323 dev_name)) {
324 dev_dbg(dev, "MMIO address 0x%08x already in use\n",
325 mmio_addr);
326 ret = -EBUSY;
327 goto unreg_region;
328 }
329 }
330
331 tco->tcobase = devm_ioremap(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE);
332 if (!tco->tcobase) {
333 dev_err(dev, "failed to get tcobase address\n");
334 ret = -ENOMEM;
335 goto unreg_region;
336 }
337
338 dev_info(dev, "Using 0x%08x for watchdog MMIO address\n", mmio_addr);
339
340 /* Setup the watchdog timer */
341 tco_timer_enable(tco);
342
343 val = readl(SP5100_WDT_CONTROL(tco->tcobase));
344 if (val & SP5100_WDT_DISABLED) {
345 dev_err(dev, "Watchdog hardware is disabled\n");
346 ret = -ENODEV;
347 goto unreg_region;
348 }
349
350 /*
351 * Save WatchDogFired status, because WatchDogFired flag is
352 * cleared here.
353 */
354 if (val & SP5100_WDT_FIRED)
355 wdd->bootstatus = WDIOF_CARDRESET;
356 /* Set watchdog action to reset the system */
357 val &= ~SP5100_WDT_ACTION_RESET;
358 writel(val, SP5100_WDT_CONTROL(tco->tcobase));
359
360 /* Set a reasonable heartbeat before we stop the timer */
361 tco_timer_set_timeout(wdd, wdd->timeout);
362
363 /*
364 * Stop the TCO before we change anything so we don't race with
365 * a zeroed timer.
366 */
367 tco_timer_stop(wdd);
368
369 release_region(SP5100_IO_PM_INDEX_REG, SP5100_PM_IOPORTS_SIZE);
370
371 return 0;
372
373unreg_region:
374 release_region(SP5100_IO_PM_INDEX_REG, SP5100_PM_IOPORTS_SIZE);
375 return ret;
376}
377
378static struct watchdog_info sp5100_tco_wdt_info = {
379 .identity = "SP5100 TCO timer",
380 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
381};
382
383static const struct watchdog_ops sp5100_tco_wdt_ops = {
384 .owner = THIS_MODULE,
385 .start = tco_timer_start,
386 .stop = tco_timer_stop,
387 .ping = tco_timer_ping,
388 .set_timeout = tco_timer_set_timeout,
389};
390
391static int sp5100_tco_probe(struct platform_device *pdev)
392{
393 struct device *dev = &pdev->dev;
394 struct watchdog_device *wdd;
395 struct sp5100_tco *tco;
396 int ret;
397
398 tco = devm_kzalloc(dev, sizeof(*tco), GFP_KERNEL);
399 if (!tco)
400 return -ENOMEM;
401
402 tco->tco_reg_layout = tco_reg_layout(sp5100_tco_pci);
403
404 wdd = &tco->wdd;
405 wdd->parent = dev;
406 wdd->info = &sp5100_tco_wdt_info;
407 wdd->ops = &sp5100_tco_wdt_ops;
408 wdd->timeout = WATCHDOG_HEARTBEAT;
409 wdd->min_timeout = 1;
410 wdd->max_timeout = 0xffff;
411
412 watchdog_init_timeout(wdd, heartbeat, NULL);
413 watchdog_set_nowayout(wdd, nowayout);
414 watchdog_stop_on_reboot(wdd);
415 watchdog_stop_on_unregister(wdd);
416 watchdog_set_drvdata(wdd, tco);
417
418 ret = sp5100_tco_setupdevice(dev, wdd);
419 if (ret)
420 return ret;
421
422 ret = devm_watchdog_register_device(dev, wdd);
423 if (ret)
424 return ret;
425
426 /* Show module parameters */
427 dev_info(dev, "initialized. heartbeat=%d sec (nowayout=%d)\n",
428 wdd->timeout, nowayout);
429
430 return 0;
431}
432
433static struct platform_driver sp5100_tco_driver = {
434 .probe = sp5100_tco_probe,
435 .driver = {
436 .name = TCO_DRIVER_NAME,
437 },
438};
439
440/*
441 * Data for PCI driver interface
442 *
443 * This data only exists for exporting the supported
444 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
445 * register a pci_driver, because someone else might
446 * want to register another driver on the same PCI id.
447 */
448static const struct pci_device_id sp5100_tco_pci_tbl[] = {
449 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
450 PCI_ANY_ID, },
451 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID,
452 PCI_ANY_ID, },
453 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, PCI_ANY_ID,
454 PCI_ANY_ID, },
455 { 0, }, /* End of list */
456};
457MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
458
459static int __init sp5100_tco_init(void)
460{
461 struct pci_dev *dev = NULL;
462 int err;
463
464 /* Match the PCI device */
465 for_each_pci_dev(dev) {
466 if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
467 sp5100_tco_pci = dev;
468 break;
469 }
470 }
471
472 if (!sp5100_tco_pci)
473 return -ENODEV;
474
475 pr_info("SP5100/SB800 TCO WatchDog Timer Driver\n");
476
477 err = platform_driver_register(&sp5100_tco_driver);
478 if (err)
479 return err;
480
481 sp5100_tco_platform_device =
482 platform_device_register_simple(TCO_DRIVER_NAME, -1, NULL, 0);
483 if (IS_ERR(sp5100_tco_platform_device)) {
484 err = PTR_ERR(sp5100_tco_platform_device);
485 goto unreg_platform_driver;
486 }
487
488 return 0;
489
490unreg_platform_driver:
491 platform_driver_unregister(&sp5100_tco_driver);
492 return err;
493}
494
495static void __exit sp5100_tco_exit(void)
496{
497 platform_device_unregister(sp5100_tco_platform_device);
498 platform_driver_unregister(&sp5100_tco_driver);
499}
500
501module_init(sp5100_tco_init);
502module_exit(sp5100_tco_exit);
503
504MODULE_AUTHOR("Priyanka Gupta");
505MODULE_DESCRIPTION("TCO timer driver for SP5100/SB800 chipset");
506MODULE_LICENSE("GPL");