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v3.1
 
   1 /*
   2  * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   3  * All rights reserved.  www.lanmedia.com
   4  * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This code is written by:
   7  * Andrew Stanley-Jones (asj@cban.com)
   8  * Rob Braun (bbraun@vix.com),
   9  * Michael Graff (explorer@vix.com) and
  10  * Matt Thomas (matt@3am-software.com).
  11  *
  12  * With Help By:
  13  * David Boggs
  14  * Ron Crane
  15  * Alan Cox
  16  *
  17  * This software may be used and distributed according to the terms
  18  * of the GNU General Public License version 2, incorporated herein by reference.
  19  *
  20  * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  21  *
  22  * To control link specific options lmcctl is required.
  23  * It can be obtained from ftp.lanmedia.com.
  24  *
  25  * Linux driver notes:
  26  * Linux uses the device struct lmc_private to pass private information
  27  * around.
  28  *
  29  * The initialization portion of this driver (the lmc_reset() and the
  30  * lmc_dec_reset() functions, as well as the led controls and the
  31  * lmc_initcsrs() functions.
  32  *
  33  * The watchdog function runs every second and checks to see if
  34  * we still have link, and that the timing source is what we expected
  35  * it to be.  If link is lost, the interface is marked down, and
  36  * we no longer can transmit.
  37  *
  38  */
  39
  40#include <linux/kernel.h>
  41#include <linux/module.h>
  42#include <linux/string.h>
  43#include <linux/timer.h>
  44#include <linux/ptrace.h>
  45#include <linux/errno.h>
  46#include <linux/ioport.h>
  47#include <linux/slab.h>
  48#include <linux/interrupt.h>
  49#include <linux/pci.h>
  50#include <linux/delay.h>
  51#include <linux/hdlc.h>
  52#include <linux/init.h>
  53#include <linux/in.h>
  54#include <linux/if_arp.h>
  55#include <linux/netdevice.h>
  56#include <linux/etherdevice.h>
  57#include <linux/skbuff.h>
  58#include <linux/inet.h>
  59#include <linux/bitops.h>
  60#include <asm/processor.h>             /* Processor type for cache alignment. */
  61#include <asm/io.h>
  62#include <asm/dma.h>
  63#include <asm/uaccess.h>
  64//#include <asm/spinlock.h>
  65
  66#define DRIVER_MAJOR_VERSION     1
  67#define DRIVER_MINOR_VERSION    34
  68#define DRIVER_SUB_VERSION       0
  69
  70#define DRIVER_VERSION  ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  71
  72#include "lmc.h"
  73#include "lmc_var.h"
  74#include "lmc_ioctl.h"
  75#include "lmc_debug.h"
  76#include "lmc_proto.h"
  77
  78static int LMC_PKT_BUF_SZ = 1542;
  79
  80static DEFINE_PCI_DEVICE_TABLE(lmc_pci_tbl) = {
  81	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  82	  PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  83	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  84	  PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  85	{ 0 }
  86};
  87
  88MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  89MODULE_LICENSE("GPL v2");
  90
  91
  92static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
  93					struct net_device *dev);
  94static int lmc_rx (struct net_device *dev);
  95static int lmc_open(struct net_device *dev);
  96static int lmc_close(struct net_device *dev);
  97static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  98static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  99static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
 100static void lmc_softreset(lmc_softc_t * const);
 101static void lmc_running_reset(struct net_device *dev);
 102static int lmc_ifdown(struct net_device * const);
 103static void lmc_watchdog(unsigned long data);
 104static void lmc_reset(lmc_softc_t * const sc);
 105static void lmc_dec_reset(lmc_softc_t * const sc);
 106static void lmc_driver_timeout(struct net_device *dev);
 107
 108/*
 109 * linux reserves 16 device specific IOCTLs.  We call them
 110 * LMCIOC* to control various bits of our world.
 111 */
 112int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 113{
 114    lmc_softc_t *sc = dev_to_sc(dev);
 115    lmc_ctl_t ctl;
 116    int ret = -EOPNOTSUPP;
 117    u16 regVal;
 118    unsigned long flags;
 119
 120    lmc_trace(dev, "lmc_ioctl in");
 121
 122    /*
 123     * Most functions mess with the structure
 124     * Disable interrupts while we do the polling
 125     */
 126
 127    switch (cmd) {
 128        /*
 129         * Return current driver state.  Since we keep this up
 130         * To date internally, just copy this out to the user.
 131         */
 132    case LMCIOCGINFO: /*fold01*/
 133	if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
 134		ret = -EFAULT;
 135	else
 136		ret = 0;
 137        break;
 138
 139    case LMCIOCSINFO: /*fold01*/
 140        if (!capable(CAP_NET_ADMIN)) {
 141            ret = -EPERM;
 142            break;
 143        }
 144
 145        if(dev->flags & IFF_UP){
 146            ret = -EBUSY;
 147            break;
 148        }
 149
 150	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 151		ret = -EFAULT;
 152		break;
 153	}
 154
 155	spin_lock_irqsave(&sc->lmc_lock, flags);
 156        sc->lmc_media->set_status (sc, &ctl);
 157
 158        if(ctl.crc_length != sc->ictl.crc_length) {
 159            sc->lmc_media->set_crc_length(sc, ctl.crc_length);
 160	    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
 161		sc->TxDescriptControlInit |=  LMC_TDES_ADD_CRC_DISABLE;
 162	    else
 163		sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
 164        }
 165	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 166
 167        ret = 0;
 168        break;
 169
 170    case LMCIOCIFTYPE: /*fold01*/
 171        {
 172	    u16 old_type = sc->if_type;
 173	    u16	new_type;
 174
 175	    if (!capable(CAP_NET_ADMIN)) {
 176		ret = -EPERM;
 177		break;
 178	    }
 179
 180	    if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
 181		ret = -EFAULT;
 182		break;
 183	    }
 184
 185            
 186	    if (new_type == old_type)
 187	    {
 188		ret = 0 ;
 189		break;				/* no change */
 190            }
 191            
 192	    spin_lock_irqsave(&sc->lmc_lock, flags);
 193            lmc_proto_close(sc);
 194
 195            sc->if_type = new_type;
 196            lmc_proto_attach(sc);
 197	    ret = lmc_proto_open(sc);
 198	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 199	    break;
 200	}
 201
 202    case LMCIOCGETXINFO: /*fold01*/
 203	spin_lock_irqsave(&sc->lmc_lock, flags);
 204        sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
 205
 206        sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
 207        sc->lmc_xinfo.PciSlotNumber = 0;
 208        sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
 209        sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
 210        sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
 211        sc->lmc_xinfo.XilinxRevisionNumber =
 212            lmc_mii_readreg (sc, 0, 3) & 0xf;
 213        sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
 214        sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
 215        sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
 216	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 217
 218        sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
 219
 220        if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
 221			 sizeof(struct lmc_xinfo)))
 222		ret = -EFAULT;
 223	else
 224		ret = 0;
 225
 226        break;
 227
 228    case LMCIOCGETLMCSTATS:
 229	    spin_lock_irqsave(&sc->lmc_lock, flags);
 230	    if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
 231		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
 232		    sc->extra_stats.framingBitErrorCount +=
 233			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 234		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
 235		    sc->extra_stats.framingBitErrorCount +=
 236			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 237		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
 238		    sc->extra_stats.lineCodeViolationCount +=
 239			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 240		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
 241		    sc->extra_stats.lineCodeViolationCount +=
 242			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 243		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
 244		    regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
 245
 246		    sc->extra_stats.lossOfFrameCount +=
 247			    (regVal & T1FRAMER_LOF_MASK) >> 4;
 248		    sc->extra_stats.changeOfFrameAlignmentCount +=
 249			    (regVal & T1FRAMER_COFA_MASK) >> 2;
 250		    sc->extra_stats.severelyErroredFrameCount +=
 251			    regVal & T1FRAMER_SEF_MASK;
 252	    }
 253	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 254	    if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
 255			     sizeof(sc->lmc_device->stats)) ||
 256		copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
 257			     &sc->extra_stats, sizeof(sc->extra_stats)))
 258		    ret = -EFAULT;
 259	    else
 260		    ret = 0;
 261	    break;
 262
 263    case LMCIOCCLEARLMCSTATS:
 264	    if (!capable(CAP_NET_ADMIN)) {
 265		    ret = -EPERM;
 266		    break;
 267	    }
 268
 269	    spin_lock_irqsave(&sc->lmc_lock, flags);
 270	    memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
 271	    memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
 272	    sc->extra_stats.check = STATCHECK;
 273	    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 274		    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 275	    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 276	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 277	    ret = 0;
 278	    break;
 279
 280    case LMCIOCSETCIRCUIT: /*fold01*/
 281        if (!capable(CAP_NET_ADMIN)){
 282            ret = -EPERM;
 283            break;
 284        }
 285
 286        if(dev->flags & IFF_UP){
 287            ret = -EBUSY;
 288            break;
 289        }
 290
 291	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 292		ret = -EFAULT;
 293		break;
 294	}
 295	spin_lock_irqsave(&sc->lmc_lock, flags);
 296        sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
 297        sc->ictl.circuit_type = ctl.circuit_type;
 298	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 299        ret = 0;
 300
 301        break;
 302
 303    case LMCIOCRESET: /*fold01*/
 304        if (!capable(CAP_NET_ADMIN)){
 305            ret = -EPERM;
 306            break;
 307        }
 308
 309	spin_lock_irqsave(&sc->lmc_lock, flags);
 310        /* Reset driver and bring back to current state */
 311        printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 312        lmc_running_reset (dev);
 313        printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 314
 315        LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 316	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 317
 318        ret = 0;
 319        break;
 320
 321#ifdef DEBUG
 322    case LMCIOCDUMPEVENTLOG:
 323	if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
 324		ret = -EFAULT;
 325		break;
 326	}
 327	if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
 328			 sizeof(lmcEventLogBuf)))
 329		ret = -EFAULT;
 330	else
 331		ret = 0;
 332
 333        break;
 334#endif /* end ifdef _DBG_EVENTLOG */
 335    case LMCIOCT1CONTROL: /*fold01*/
 336        if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
 337            ret = -EOPNOTSUPP;
 338            break;
 339        }
 340        break;
 341    case LMCIOCXILINX: /*fold01*/
 342        {
 343            struct lmc_xilinx_control xc; /*fold02*/
 344
 345            if (!capable(CAP_NET_ADMIN)){
 346                ret = -EPERM;
 347                break;
 348            }
 349
 350            /*
 351             * Stop the xwitter whlie we restart the hardware
 352             */
 353            netif_stop_queue(dev);
 354
 355	    if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
 356		ret = -EFAULT;
 357		break;
 358	    }
 359            switch(xc.command){
 360            case lmc_xilinx_reset: /*fold02*/
 361                {
 362                    u16 mii;
 363		    spin_lock_irqsave(&sc->lmc_lock, flags);
 364                    mii = lmc_mii_readreg (sc, 0, 16);
 365
 366                    /*
 367                     * Make all of them 0 and make input
 368                     */
 369                    lmc_gpio_mkinput(sc, 0xff);
 370
 371                    /*
 372                     * make the reset output
 373                     */
 374                    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
 375
 376                    /*
 377                     * RESET low to force configuration.  This also forces
 378                     * the transmitter clock to be internal, but we expect to reset
 379                     * that later anyway.
 380                     */
 381
 382                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 383                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 384
 385
 386                    /*
 387                     * hold for more than 10 microseconds
 388                     */
 389                    udelay(50);
 390
 391                    sc->lmc_gpio |= LMC_GEP_RESET;
 392                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 393
 394
 395                    /*
 396                     * stop driving Xilinx-related signals
 397                     */
 398                    lmc_gpio_mkinput(sc, 0xff);
 399
 400                    /* Reset the frammer hardware */
 401                    sc->lmc_media->set_link_status (sc, 1);
 402                    sc->lmc_media->set_status (sc, NULL);
 403//                    lmc_softreset(sc);
 404
 405                    {
 406                        int i;
 407                        for(i = 0; i < 5; i++){
 408                            lmc_led_on(sc, LMC_DS3_LED0);
 409                            mdelay(100);
 410                            lmc_led_off(sc, LMC_DS3_LED0);
 411                            lmc_led_on(sc, LMC_DS3_LED1);
 412                            mdelay(100);
 413                            lmc_led_off(sc, LMC_DS3_LED1);
 414                            lmc_led_on(sc, LMC_DS3_LED3);
 415                            mdelay(100);
 416                            lmc_led_off(sc, LMC_DS3_LED3);
 417                            lmc_led_on(sc, LMC_DS3_LED2);
 418                            mdelay(100);
 419                            lmc_led_off(sc, LMC_DS3_LED2);
 420                        }
 421                    }
 422		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 423                    
 424                    
 425
 426                    ret = 0x0;
 427
 428                }
 429
 430                break;
 431            case lmc_xilinx_load_prom: /*fold02*/
 432                {
 433                    u16 mii;
 434                    int timeout = 500000;
 435		    spin_lock_irqsave(&sc->lmc_lock, flags);
 436                    mii = lmc_mii_readreg (sc, 0, 16);
 437
 438                    /*
 439                     * Make all of them 0 and make input
 440                     */
 441                    lmc_gpio_mkinput(sc, 0xff);
 442
 443                    /*
 444                     * make the reset output
 445                     */
 446                    lmc_gpio_mkoutput(sc,  LMC_GEP_DP | LMC_GEP_RESET);
 447
 448                    /*
 449                     * RESET low to force configuration.  This also forces
 450                     * the transmitter clock to be internal, but we expect to reset
 451                     * that later anyway.
 452                     */
 453
 454                    sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
 455                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 456
 457
 458                    /*
 459                     * hold for more than 10 microseconds
 460                     */
 461                    udelay(50);
 462
 463                    sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
 464                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 465
 466                    /*
 467                     * busy wait for the chip to reset
 468                     */
 469                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 470                           (timeout-- > 0))
 471                        cpu_relax();
 472
 473
 474                    /*
 475                     * stop driving Xilinx-related signals
 476                     */
 477                    lmc_gpio_mkinput(sc, 0xff);
 478		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 479
 480                    ret = 0x0;
 481                    
 482
 483                    break;
 484
 485                }
 486
 487            case lmc_xilinx_load: /*fold02*/
 488                {
 489                    char *data;
 490                    int pos;
 491                    int timeout = 500000;
 492
 493                    if (!xc.data) {
 494                            ret = -EINVAL;
 495                            break;
 496                    }
 497
 498                    data = kmalloc(xc.len, GFP_KERNEL);
 499                    if (!data) {
 500                            printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name);
 501                            ret = -ENOMEM;
 502                            break;
 503                    }
 504                    
 505                    if(copy_from_user(data, xc.data, xc.len))
 506                    {
 507                    	kfree(data);
 508                    	ret = -ENOMEM;
 509                    	break;
 510                    }
 511
 512                    printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
 513
 514		    spin_lock_irqsave(&sc->lmc_lock, flags);
 515                    lmc_gpio_mkinput(sc, 0xff);
 516
 517                    /*
 518                     * Clear the Xilinx and start prgramming from the DEC
 519                     */
 520
 521                    /*
 522                     * Set ouput as:
 523                     * Reset: 0 (active)
 524                     * DP:    0 (active)
 525                     * Mode:  1
 526                     *
 527                     */
 528                    sc->lmc_gpio = 0x00;
 529                    sc->lmc_gpio &= ~LMC_GEP_DP;
 530                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 531                    sc->lmc_gpio |=  LMC_GEP_MODE;
 532                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 533
 534                    lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
 535
 536                    /*
 537                     * Wait at least 10 us 20 to be safe
 538                     */
 539                    udelay(50);
 540
 541                    /*
 542                     * Clear reset and activate programming lines
 543                     * Reset: Input
 544                     * DP:    Input
 545                     * Clock: Output
 546                     * Data:  Output
 547                     * Mode:  Output
 548                     */
 549                    lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
 550
 551                    /*
 552                     * Set LOAD, DATA, Clock to 1
 553                     */
 554                    sc->lmc_gpio = 0x00;
 555                    sc->lmc_gpio |= LMC_GEP_MODE;
 556                    sc->lmc_gpio |= LMC_GEP_DATA;
 557                    sc->lmc_gpio |= LMC_GEP_CLK;
 558                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 559                    
 560                    lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
 561
 562                    /*
 563                     * busy wait for the chip to reset
 564                     */
 565                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 566                           (timeout-- > 0))
 567                        cpu_relax();
 568
 569                    printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
 570
 571                    for(pos = 0; pos < xc.len; pos++){
 572                        switch(data[pos]){
 573                        case 0:
 574                            sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
 575                            break;
 576                        case 1:
 577                            sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
 578                            break;
 579                        default:
 580                            printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
 581                            sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
 582                        }
 583                        sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
 584                        sc->lmc_gpio |= LMC_GEP_MODE;
 585                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 586                        udelay(1);
 587                        
 588                        sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
 589                        sc->lmc_gpio |= LMC_GEP_MODE;
 590                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 591                        udelay(1);
 592                    }
 593                    if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
 594                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
 595                    }
 596                    else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
 597                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
 598                    }
 599                    else {
 600                        printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
 601                    }
 602
 603                    lmc_gpio_mkinput(sc, 0xff);
 604                    
 605                    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
 606                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 607
 608                    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
 609                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 610		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 611
 612                    kfree(data);
 613                    
 614                    ret = 0;
 615                    
 616                    break;
 617                }
 618            default: /*fold02*/
 619                ret = -EBADE;
 620                break;
 621            }
 622
 623            netif_wake_queue(dev);
 624            sc->lmc_txfull = 0;
 625
 626        }
 627        break;
 628    default: /*fold01*/
 629        /* If we don't know what to do, give the protocol a shot. */
 630        ret = lmc_proto_ioctl (sc, ifr, cmd);
 631        break;
 632    }
 633
 634    lmc_trace(dev, "lmc_ioctl out");
 635
 636    return ret;
 637}
 638
 639
 640/* the watchdog process that cruises around */
 641static void lmc_watchdog (unsigned long data) /*fold00*/
 642{
 643    struct net_device *dev = (struct net_device *)data;
 644    lmc_softc_t *sc = dev_to_sc(dev);
 645    int link_status;
 646    u32 ticks;
 647    unsigned long flags;
 648
 649    lmc_trace(dev, "lmc_watchdog in");
 650
 651    spin_lock_irqsave(&sc->lmc_lock, flags);
 652
 653    if(sc->check != 0xBEAFCAFE){
 654        printk("LMC: Corrupt net_device struct, breaking out\n");
 655	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 656        return;
 657    }
 658
 659
 660    /* Make sure the tx jabber and rx watchdog are off,
 661     * and the transmit and receive processes are running.
 662     */
 663
 664    LMC_CSR_WRITE (sc, csr_15, 0x00000011);
 665    sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
 666    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
 667
 668    if (sc->lmc_ok == 0)
 669        goto kick_timer;
 670
 671    LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 672
 673    /* --- begin time out check -----------------------------------
 674     * check for a transmit interrupt timeout
 675     * Has the packet xmt vs xmt serviced threshold been exceeded */
 676    if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 677	sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 678	sc->tx_TimeoutInd == 0)
 679    {
 680
 681        /* wait for the watchdog to come around again */
 682        sc->tx_TimeoutInd = 1;
 683    }
 684    else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 685	     sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 686	     sc->tx_TimeoutInd)
 687    {
 688
 689        LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
 690
 691        sc->tx_TimeoutDisplay = 1;
 692	sc->extra_stats.tx_TimeoutCnt++;
 693
 694        /* DEC chip is stuck, hit it with a RESET!!!! */
 695        lmc_running_reset (dev);
 696
 697
 698        /* look at receive & transmit process state to make sure they are running */
 699        LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
 700
 701        /* look at: DSR - 02  for Reg 16
 702         *                  CTS - 08
 703         *                  DCD - 10
 704         *                  RI  - 20
 705         * for Reg 17
 706         */
 707        LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
 708
 709        /* reset the transmit timeout detection flag */
 710        sc->tx_TimeoutInd = 0;
 711        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 712	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 713    } else {
 714        sc->tx_TimeoutInd = 0;
 715        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 716	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 717    }
 718
 719    /* --- end time out check ----------------------------------- */
 720
 721
 722    link_status = sc->lmc_media->get_link_status (sc);
 723
 724    /*
 725     * hardware level link lost, but the interface is marked as up.
 726     * Mark it as down.
 727     */
 728    if ((link_status == 0) && (sc->last_link_status != 0)) {
 729        printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
 730        sc->last_link_status = 0;
 731        /* lmc_reset (sc); Why reset??? The link can go down ok */
 732
 733        /* Inform the world that link has been lost */
 734	netif_carrier_off(dev);
 735    }
 736
 737    /*
 738     * hardware link is up, but the interface is marked as down.
 739     * Bring it back up again.
 740     */
 741     if (link_status != 0 && sc->last_link_status == 0) {
 742         printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
 743         sc->last_link_status = 1;
 744         /* lmc_reset (sc); Again why reset??? */
 745
 746	 netif_carrier_on(dev);
 747     }
 748
 749    /* Call media specific watchdog functions */
 750    sc->lmc_media->watchdog(sc);
 751
 752    /*
 753     * Poke the transmitter to make sure it
 754     * never stops, even if we run out of mem
 755     */
 756    LMC_CSR_WRITE(sc, csr_rxpoll, 0);
 757
 758    /*
 759     * Check for code that failed
 760     * and try and fix it as appropriate
 761     */
 762    if(sc->failed_ring == 1){
 763        /*
 764         * Failed to setup the recv/xmit rin
 765         * Try again
 766         */
 767        sc->failed_ring = 0;
 768        lmc_softreset(sc);
 769    }
 770    if(sc->failed_recv_alloc == 1){
 771        /*
 772         * We failed to alloc mem in the
 773         * interrupt handler, go through the rings
 774         * and rebuild them
 775         */
 776        sc->failed_recv_alloc = 0;
 777        lmc_softreset(sc);
 778    }
 779
 780
 781    /*
 782     * remember the timer value
 783     */
 784kick_timer:
 785
 786    ticks = LMC_CSR_READ (sc, csr_gp_timer);
 787    LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
 788    sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
 789
 790    /*
 791     * restart this timer.
 792     */
 793    sc->timer.expires = jiffies + (HZ);
 794    add_timer (&sc->timer);
 795
 796    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 797
 798    lmc_trace(dev, "lmc_watchdog out");
 799
 800}
 801
 802static int lmc_attach(struct net_device *dev, unsigned short encoding,
 803		      unsigned short parity)
 804{
 805	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
 806		return 0;
 807	return -EINVAL;
 808}
 809
 810static const struct net_device_ops lmc_ops = {
 811	.ndo_open       = lmc_open,
 812	.ndo_stop       = lmc_close,
 813	.ndo_change_mtu = hdlc_change_mtu,
 814	.ndo_start_xmit = hdlc_start_xmit,
 815	.ndo_do_ioctl   = lmc_ioctl,
 816	.ndo_tx_timeout = lmc_driver_timeout,
 817	.ndo_get_stats  = lmc_get_stats,
 818};
 819
 820static int __devinit lmc_init_one(struct pci_dev *pdev,
 821				  const struct pci_device_id *ent)
 822{
 823	lmc_softc_t *sc;
 824	struct net_device *dev;
 825	u16 subdevice;
 826	u16 AdapModelNum;
 827	int err;
 828	static int cards_found;
 829
 830	/* lmc_trace(dev, "lmc_init_one in"); */
 831
 832	err = pci_enable_device(pdev);
 833	if (err) {
 834		printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
 835		return err;
 836	}
 837
 838	err = pci_request_regions(pdev, "lmc");
 839	if (err) {
 840		printk(KERN_ERR "lmc: pci_request_region failed\n");
 841		goto err_req_io;
 842	}
 843
 844	/*
 845	 * Allocate our own device structure
 846	 */
 847	sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL);
 848	if (!sc) {
 849		err = -ENOMEM;
 850		goto err_kzalloc;
 851	}
 852
 853	dev = alloc_hdlcdev(sc);
 854	if (!dev) {
 855		printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
 856		goto err_hdlcdev;
 857	}
 858
 859
 860	dev->type = ARPHRD_HDLC;
 861	dev_to_hdlc(dev)->xmit = lmc_start_xmit;
 862	dev_to_hdlc(dev)->attach = lmc_attach;
 863	dev->netdev_ops = &lmc_ops;
 864	dev->watchdog_timeo = HZ; /* 1 second */
 865	dev->tx_queue_len = 100;
 866	sc->lmc_device = dev;
 867	sc->name = dev->name;
 868	sc->if_type = LMC_PPP;
 869	sc->check = 0xBEAFCAFE;
 870	dev->base_addr = pci_resource_start(pdev, 0);
 871	dev->irq = pdev->irq;
 872	pci_set_drvdata(pdev, dev);
 873	SET_NETDEV_DEV(dev, &pdev->dev);
 874
 875	/*
 876	 * This will get the protocol layer ready and do any 1 time init's
 877	 * Must have a valid sc and dev structure
 878	 */
 879	lmc_proto_attach(sc);
 880
 881	/* Init the spin lock so can call it latter */
 882
 883	spin_lock_init(&sc->lmc_lock);
 884	pci_set_master(pdev);
 885
 886	printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
 887	       dev->base_addr, dev->irq);
 888
 889	err = register_hdlc_device(dev);
 890	if (err) {
 891		printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
 892		free_netdev(dev);
 893		goto err_hdlcdev;
 894	}
 895
 896    sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
 897    sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 898
 899    /*
 900     *
 901     * Check either the subvendor or the subdevice, some systems reverse
 902     * the setting in the bois, seems to be version and arch dependent?
 903     * Fix the error, exchange the two values 
 904     */
 905    if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
 906	    subdevice = pdev->subsystem_vendor;
 907
 908    switch (subdevice) {
 909    case PCI_DEVICE_ID_LMC_HSSI:
 910	printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
 911        sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
 912        sc->lmc_media = &lmc_hssi_media;
 913        break;
 914    case PCI_DEVICE_ID_LMC_DS3:
 915	printk(KERN_INFO "%s: LMC DS3\n", dev->name);
 916        sc->lmc_cardtype = LMC_CARDTYPE_DS3;
 917        sc->lmc_media = &lmc_ds3_media;
 918        break;
 919    case PCI_DEVICE_ID_LMC_SSI:
 920	printk(KERN_INFO "%s: LMC SSI\n", dev->name);
 921        sc->lmc_cardtype = LMC_CARDTYPE_SSI;
 922        sc->lmc_media = &lmc_ssi_media;
 923        break;
 924    case PCI_DEVICE_ID_LMC_T1:
 925	printk(KERN_INFO "%s: LMC T1\n", dev->name);
 926        sc->lmc_cardtype = LMC_CARDTYPE_T1;
 927        sc->lmc_media = &lmc_t1_media;
 928        break;
 929    default:
 930	printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
 
 
 931        break;
 932    }
 933
 934    lmc_initcsrs (sc, dev->base_addr, 8);
 935
 936    lmc_gpio_mkinput (sc, 0xff);
 937    sc->lmc_gpio = 0;		/* drive no signals yet */
 938
 939    sc->lmc_media->defaults (sc);
 940
 941    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
 942
 943    /* verify that the PCI Sub System ID matches the Adapter Model number
 944     * from the MII register
 945     */
 946    AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
 947
 948    if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
 949	 subdevice != PCI_DEVICE_ID_LMC_T1) &&
 950	(AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
 951	 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
 952	(AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
 953	 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
 954	(AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
 955	 subdevice != PCI_DEVICE_ID_LMC_HSSI))
 956	    printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
 957		   " Subsystem ID = 0x%04x\n",
 958		   dev->name, AdapModelNum, subdevice);
 959
 960    /*
 961     * reset clock
 962     */
 963    LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
 964
 965    sc->board_idx = cards_found++;
 966    sc->extra_stats.check = STATCHECK;
 967    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 968	    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 969    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 970
 971    sc->lmc_ok = 0;
 972    sc->last_link_status = 0;
 973
 974    lmc_trace(dev, "lmc_init_one out");
 975    return 0;
 976
 977err_hdlcdev:
 978	pci_set_drvdata(pdev, NULL);
 979	kfree(sc);
 980err_kzalloc:
 981	pci_release_regions(pdev);
 982err_req_io:
 983	pci_disable_device(pdev);
 984	return err;
 985}
 986
 987/*
 988 * Called from pci when removing module.
 989 */
 990static void __devexit lmc_remove_one(struct pci_dev *pdev)
 991{
 992	struct net_device *dev = pci_get_drvdata(pdev);
 993
 994	if (dev) {
 995		printk(KERN_DEBUG "%s: removing...\n", dev->name);
 996		unregister_hdlc_device(dev);
 997		free_netdev(dev);
 998		pci_release_regions(pdev);
 999		pci_disable_device(pdev);
1000		pci_set_drvdata(pdev, NULL);
1001	}
1002}
1003
1004/* After this is called, packets can be sent.
1005 * Does not initialize the addresses
1006 */
1007static int lmc_open(struct net_device *dev)
1008{
1009    lmc_softc_t *sc = dev_to_sc(dev);
1010    int err;
1011
1012    lmc_trace(dev, "lmc_open in");
1013
1014    lmc_led_on(sc, LMC_DS3_LED0);
1015
1016    lmc_dec_reset(sc);
1017    lmc_reset(sc);
1018
1019    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
1020    LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
1021		  lmc_mii_readreg(sc, 0, 17));
1022
1023    if (sc->lmc_ok){
1024        lmc_trace(dev, "lmc_open lmc_ok out");
1025        return 0;
1026    }
1027
1028    lmc_softreset (sc);
1029
1030    /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1031    if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
1032        printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1033        lmc_trace(dev, "lmc_open irq failed out");
1034        return -EAGAIN;
1035    }
1036    sc->got_irq = 1;
1037
1038    /* Assert Terminal Active */
1039    sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1040    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1041
1042    /*
1043     * reset to last state.
1044     */
1045    sc->lmc_media->set_status (sc, NULL);
1046
1047    /* setup default bits to be used in tulip_desc_t transmit descriptor
1048     * -baz */
1049    sc->TxDescriptControlInit = (
1050                                 LMC_TDES_INTERRUPT_ON_COMPLETION
1051                                 | LMC_TDES_FIRST_SEGMENT
1052                                 | LMC_TDES_LAST_SEGMENT
1053                                 | LMC_TDES_SECOND_ADDR_CHAINED
1054                                 | LMC_TDES_DISABLE_PADDING
1055                                );
1056
1057    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1058        /* disable 32 bit CRC generated by ASIC */
1059        sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1060    }
1061    sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1062    /* Acknoledge the Terminal Active and light LEDs */
1063
1064    /* dev->flags |= IFF_UP; */
1065
1066    if ((err = lmc_proto_open(sc)) != 0)
1067	    return err;
1068
1069    netif_start_queue(dev);
1070    sc->extra_stats.tx_tbusy0++;
1071
1072    /*
1073     * select what interrupts we want to get
1074     */
1075    sc->lmc_intrmask = 0;
1076    /* Should be using the default interrupt mask defined in the .h file. */
1077    sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1078                         | TULIP_STS_RXINTR
1079                         | TULIP_STS_TXINTR
1080                         | TULIP_STS_ABNRMLINTR
1081                         | TULIP_STS_SYSERROR
1082                         | TULIP_STS_TXSTOPPED
1083                         | TULIP_STS_TXUNDERFLOW
1084                         | TULIP_STS_RXSTOPPED
1085		         | TULIP_STS_RXNOBUF
1086                        );
1087    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1088
1089    sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1090    sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1091    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1092
1093    sc->lmc_ok = 1; /* Run watchdog */
1094
1095    /*
1096     * Set the if up now - pfb
1097     */
1098
1099    sc->last_link_status = 1;
1100
1101    /*
1102     * Setup a timer for the watchdog on probe, and start it running.
1103     * Since lmc_ok == 0, it will be a NOP for now.
1104     */
1105    init_timer (&sc->timer);
1106    sc->timer.expires = jiffies + HZ;
1107    sc->timer.data = (unsigned long) dev;
1108    sc->timer.function = lmc_watchdog;
1109    add_timer (&sc->timer);
1110
1111    lmc_trace(dev, "lmc_open out");
1112
1113    return 0;
1114}
1115
1116/* Total reset to compensate for the AdTran DSU doing bad things
1117 *  under heavy load
1118 */
1119
1120static void lmc_running_reset (struct net_device *dev) /*fold00*/
1121{
1122    lmc_softc_t *sc = dev_to_sc(dev);
1123
1124    lmc_trace(dev, "lmc_runnig_reset in");
1125
1126    /* stop interrupts */
1127    /* Clear the interrupt mask */
1128    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1129
1130    lmc_dec_reset (sc);
1131    lmc_reset (sc);
1132    lmc_softreset (sc);
1133    /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1134    sc->lmc_media->set_link_status (sc, 1);
1135    sc->lmc_media->set_status (sc, NULL);
1136
1137    netif_wake_queue(dev);
1138
1139    sc->lmc_txfull = 0;
1140    sc->extra_stats.tx_tbusy0++;
1141
1142    sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1143    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1144
1145    sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1146    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1147
1148    lmc_trace(dev, "lmc_runnin_reset_out");
1149}
1150
1151
1152/* This is what is called when you ifconfig down a device.
1153 * This disables the timer for the watchdog and keepalives,
1154 * and disables the irq for dev.
1155 */
1156static int lmc_close(struct net_device *dev)
1157{
1158    /* not calling release_region() as we should */
1159    lmc_softc_t *sc = dev_to_sc(dev);
1160
1161    lmc_trace(dev, "lmc_close in");
1162
1163    sc->lmc_ok = 0;
1164    sc->lmc_media->set_link_status (sc, 0);
1165    del_timer (&sc->timer);
1166    lmc_proto_close(sc);
1167    lmc_ifdown (dev);
1168
1169    lmc_trace(dev, "lmc_close out");
1170
1171    return 0;
1172}
1173
1174/* Ends the transfer of packets */
1175/* When the interface goes down, this is called */
1176static int lmc_ifdown (struct net_device *dev) /*fold00*/
1177{
1178    lmc_softc_t *sc = dev_to_sc(dev);
1179    u32 csr6;
1180    int i;
1181
1182    lmc_trace(dev, "lmc_ifdown in");
1183
1184    /* Don't let anything else go on right now */
1185    //    dev->start = 0;
1186    netif_stop_queue(dev);
1187    sc->extra_stats.tx_tbusy1++;
1188
1189    /* stop interrupts */
1190    /* Clear the interrupt mask */
1191    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1192
1193    /* Stop Tx and Rx on the chip */
1194    csr6 = LMC_CSR_READ (sc, csr_command);
1195    csr6 &= ~LMC_DEC_ST;		/* Turn off the Transmission bit */
1196    csr6 &= ~LMC_DEC_SR;		/* Turn off the Receive bit */
1197    LMC_CSR_WRITE (sc, csr_command, csr6);
1198
1199    sc->lmc_device->stats.rx_missed_errors +=
1200	    LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1201
1202    /* release the interrupt */
1203    if(sc->got_irq == 1){
1204        free_irq (dev->irq, dev);
1205        sc->got_irq = 0;
1206    }
1207
1208    /* free skbuffs in the Rx queue */
1209    for (i = 0; i < LMC_RXDESCS; i++)
1210    {
1211        struct sk_buff *skb = sc->lmc_rxq[i];
1212        sc->lmc_rxq[i] = NULL;
1213        sc->lmc_rxring[i].status = 0;
1214        sc->lmc_rxring[i].length = 0;
1215        sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1216        if (skb != NULL)
1217            dev_kfree_skb(skb);
1218        sc->lmc_rxq[i] = NULL;
1219    }
1220
1221    for (i = 0; i < LMC_TXDESCS; i++)
1222    {
1223        if (sc->lmc_txq[i] != NULL)
1224            dev_kfree_skb(sc->lmc_txq[i]);
1225        sc->lmc_txq[i] = NULL;
1226    }
1227
1228    lmc_led_off (sc, LMC_MII16_LED_ALL);
1229
1230    netif_wake_queue(dev);
1231    sc->extra_stats.tx_tbusy0++;
1232
1233    lmc_trace(dev, "lmc_ifdown out");
1234
1235    return 0;
1236}
1237
1238/* Interrupt handling routine.  This will take an incoming packet, or clean
1239 * up after a trasmit.
1240 */
1241static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1242{
1243    struct net_device *dev = (struct net_device *) dev_instance;
1244    lmc_softc_t *sc = dev_to_sc(dev);
1245    u32 csr;
1246    int i;
1247    s32 stat;
1248    unsigned int badtx;
1249    u32 firstcsr;
1250    int max_work = LMC_RXDESCS;
1251    int handled = 0;
1252
1253    lmc_trace(dev, "lmc_interrupt in");
1254
1255    spin_lock(&sc->lmc_lock);
1256
1257    /*
1258     * Read the csr to find what interrupts we have (if any)
1259     */
1260    csr = LMC_CSR_READ (sc, csr_status);
1261
1262    /*
1263     * Make sure this is our interrupt
1264     */
1265    if ( ! (csr & sc->lmc_intrmask)) {
1266        goto lmc_int_fail_out;
1267    }
1268
1269    firstcsr = csr;
1270
1271    /* always go through this loop at least once */
1272    while (csr & sc->lmc_intrmask) {
1273	handled = 1;
1274
1275        /*
1276         * Clear interrupt bits, we handle all case below
1277         */
1278        LMC_CSR_WRITE (sc, csr_status, csr);
1279
1280        /*
1281         * One of
1282         *  - Transmit process timed out CSR5<1>
1283         *  - Transmit jabber timeout    CSR5<3>
1284         *  - Transmit underflow         CSR5<5>
1285         *  - Transmit Receiver buffer unavailable CSR5<7>
1286         *  - Receive process stopped    CSR5<8>
1287         *  - Receive watchdog timeout   CSR5<9>
1288         *  - Early transmit interrupt   CSR5<10>
1289         *
1290         * Is this really right? Should we do a running reset for jabber?
1291         * (being a WAN card and all)
1292         */
1293        if (csr & TULIP_STS_ABNRMLINTR){
1294            lmc_running_reset (dev);
1295            break;
1296        }
1297        
1298        if (csr & TULIP_STS_RXINTR){
1299            lmc_trace(dev, "rx interrupt");
1300            lmc_rx (dev);
1301            
1302        }
1303        if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1304
1305	    int		n_compl = 0 ;
1306            /* reset the transmit timeout detection flag -baz */
1307	    sc->extra_stats.tx_NoCompleteCnt = 0;
1308
1309            badtx = sc->lmc_taint_tx;
1310            i = badtx % LMC_TXDESCS;
1311
1312            while ((badtx < sc->lmc_next_tx)) {
1313                stat = sc->lmc_txring[i].status;
1314
1315                LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1316						 sc->lmc_txring[i].length);
1317                /*
1318                 * If bit 31 is 1 the tulip owns it break out of the loop
1319                 */
1320                if (stat & 0x80000000)
1321                    break;
1322
1323		n_compl++ ;		/* i.e., have an empty slot in ring */
1324                /*
1325                 * If we have no skbuff or have cleared it
1326                 * Already continue to the next buffer
1327                 */
1328                if (sc->lmc_txq[i] == NULL)
1329                    continue;
1330
1331		/*
1332		 * Check the total error summary to look for any errors
1333		 */
1334		if (stat & 0x8000) {
1335			sc->lmc_device->stats.tx_errors++;
1336			if (stat & 0x4104)
1337				sc->lmc_device->stats.tx_aborted_errors++;
1338			if (stat & 0x0C00)
1339				sc->lmc_device->stats.tx_carrier_errors++;
1340			if (stat & 0x0200)
1341				sc->lmc_device->stats.tx_window_errors++;
1342			if (stat & 0x0002)
1343				sc->lmc_device->stats.tx_fifo_errors++;
1344		} else {
1345			sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1346
1347			sc->lmc_device->stats.tx_packets++;
1348                }
1349
1350                //                dev_kfree_skb(sc->lmc_txq[i]);
1351                dev_kfree_skb_irq(sc->lmc_txq[i]);
1352                sc->lmc_txq[i] = NULL;
1353
1354                badtx++;
1355                i = badtx % LMC_TXDESCS;
1356            }
1357
1358            if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1359            {
1360                printk ("%s: out of sync pointer\n", dev->name);
1361                badtx += LMC_TXDESCS;
1362            }
1363            LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1364            sc->lmc_txfull = 0;
1365            netif_wake_queue(dev);
1366	    sc->extra_stats.tx_tbusy0++;
1367
1368
1369#ifdef DEBUG
1370	    sc->extra_stats.dirtyTx = badtx;
1371	    sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1372	    sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1373#endif
1374            sc->lmc_taint_tx = badtx;
1375
1376            /*
1377             * Why was there a break here???
1378             */
1379        }			/* end handle transmit interrupt */
1380
1381        if (csr & TULIP_STS_SYSERROR) {
1382            u32 error;
1383            printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1384            error = csr>>23 & 0x7;
1385            switch(error){
1386            case 0x000:
1387                printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1388                break;
1389            case 0x001:
1390                printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1391                break;
1392            case 0x010:
1393                printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1394                break;
1395            default:
1396                printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1397            }
1398            lmc_dec_reset (sc);
1399            lmc_reset (sc);
1400            LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1401            LMC_EVENT_LOG(LMC_EVENT_RESET2,
1402                          lmc_mii_readreg (sc, 0, 16),
1403                          lmc_mii_readreg (sc, 0, 17));
1404
1405        }
1406
1407        
1408        if(max_work-- <= 0)
1409            break;
1410        
1411        /*
1412         * Get current csr status to make sure
1413         * we've cleared all interrupts
1414         */
1415        csr = LMC_CSR_READ (sc, csr_status);
1416    }				/* end interrupt loop */
1417    LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1418
1419lmc_int_fail_out:
1420
1421    spin_unlock(&sc->lmc_lock);
1422
1423    lmc_trace(dev, "lmc_interrupt out");
1424    return IRQ_RETVAL(handled);
1425}
1426
1427static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1428					struct net_device *dev)
1429{
1430    lmc_softc_t *sc = dev_to_sc(dev);
1431    u32 flag;
1432    int entry;
1433    unsigned long flags;
1434
1435    lmc_trace(dev, "lmc_start_xmit in");
1436
1437    spin_lock_irqsave(&sc->lmc_lock, flags);
1438
1439    /* normal path, tbusy known to be zero */
1440
1441    entry = sc->lmc_next_tx % LMC_TXDESCS;
1442
1443    sc->lmc_txq[entry] = skb;
1444    sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1445
1446    LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1447
1448#ifndef GCOM
1449    /* If the queue is less than half full, don't interrupt */
1450    if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1451    {
1452        /* Do not interrupt on completion of this packet */
1453        flag = 0x60000000;
1454        netif_wake_queue(dev);
1455    }
1456    else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1457    {
1458        /* This generates an interrupt on completion of this packet */
1459        flag = 0xe0000000;
1460        netif_wake_queue(dev);
1461    }
1462    else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1463    {
1464        /* Do not interrupt on completion of this packet */
1465        flag = 0x60000000;
1466        netif_wake_queue(dev);
1467    }
1468    else
1469    {
1470        /* This generates an interrupt on completion of this packet */
1471        flag = 0xe0000000;
1472        sc->lmc_txfull = 1;
1473        netif_stop_queue(dev);
1474    }
1475#else
1476    flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1477
1478    if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1479    {				/* ring full, go busy */
1480        sc->lmc_txfull = 1;
1481	netif_stop_queue(dev);
1482	sc->extra_stats.tx_tbusy1++;
1483        LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1484    }
1485#endif
1486
1487
1488    if (entry == LMC_TXDESCS - 1)	/* last descriptor in ring */
1489	flag |= LMC_TDES_END_OF_RING;	/* flag as such for Tulip */
1490
1491    /* don't pad small packets either */
1492    flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1493						sc->TxDescriptControlInit;
1494
1495    /* set the transmit timeout flag to be checked in
1496     * the watchdog timer handler. -baz
1497     */
1498
1499    sc->extra_stats.tx_NoCompleteCnt++;
1500    sc->lmc_next_tx++;
1501
1502    /* give ownership to the chip */
1503    LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1504    sc->lmc_txring[entry].status = 0x80000000;
1505
1506    /* send now! */
1507    LMC_CSR_WRITE (sc, csr_txpoll, 0);
1508
1509    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1510
1511    lmc_trace(dev, "lmc_start_xmit_out");
1512    return NETDEV_TX_OK;
1513}
1514
1515
1516static int lmc_rx(struct net_device *dev)
1517{
1518    lmc_softc_t *sc = dev_to_sc(dev);
1519    int i;
1520    int rx_work_limit = LMC_RXDESCS;
1521    unsigned int next_rx;
1522    int rxIntLoopCnt;		/* debug -baz */
1523    int localLengthErrCnt = 0;
1524    long stat;
1525    struct sk_buff *skb, *nsb;
1526    u16 len;
1527
1528    lmc_trace(dev, "lmc_rx in");
1529
1530    lmc_led_on(sc, LMC_DS3_LED3);
1531
1532    rxIntLoopCnt = 0;		/* debug -baz */
1533
1534    i = sc->lmc_next_rx % LMC_RXDESCS;
1535    next_rx = sc->lmc_next_rx;
1536
1537    while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1538    {
1539        rxIntLoopCnt++;		/* debug -baz */
1540        len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1541        if ((stat & 0x0300) != 0x0300) {  /* Check first segment and last segment */
1542		if ((stat & 0x0000ffff) != 0x7fff) {
1543			/* Oversized frame */
1544			sc->lmc_device->stats.rx_length_errors++;
1545			goto skip_packet;
1546		}
1547	}
1548
1549	if (stat & 0x00000008) { /* Catch a dribbling bit error */
1550		sc->lmc_device->stats.rx_errors++;
1551		sc->lmc_device->stats.rx_frame_errors++;
1552		goto skip_packet;
1553	}
1554
1555
1556	if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1557		sc->lmc_device->stats.rx_errors++;
1558		sc->lmc_device->stats.rx_crc_errors++;
1559		goto skip_packet;
1560	}
1561
1562	if (len > LMC_PKT_BUF_SZ) {
1563		sc->lmc_device->stats.rx_length_errors++;
1564		localLengthErrCnt++;
1565		goto skip_packet;
1566	}
1567
1568	if (len < sc->lmc_crcSize + 2) {
1569		sc->lmc_device->stats.rx_length_errors++;
1570		sc->extra_stats.rx_SmallPktCnt++;
1571		localLengthErrCnt++;
1572		goto skip_packet;
1573	}
1574
1575        if(stat & 0x00004000){
1576            printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1577        }
1578
1579        len -= sc->lmc_crcSize;
1580
1581        skb = sc->lmc_rxq[i];
1582
1583        /*
1584         * We ran out of memory at some point
1585         * just allocate an skb buff and continue.
1586         */
1587        
1588        if (!skb) {
1589            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1590            if (nsb) {
1591                sc->lmc_rxq[i] = nsb;
1592                nsb->dev = dev;
1593                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1594            }
1595            sc->failed_recv_alloc = 1;
1596            goto skip_packet;
1597        }
1598        
1599	sc->lmc_device->stats.rx_packets++;
1600	sc->lmc_device->stats.rx_bytes += len;
1601
1602        LMC_CONSOLE_LOG("recv", skb->data, len);
1603
1604        /*
1605         * I'm not sure of the sanity of this
1606         * Packets could be arriving at a constant
1607         * 44.210mbits/sec and we're going to copy
1608         * them into a new buffer??
1609         */
1610        
1611        if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1612            /*
1613             * If it's a large packet don't copy it just hand it up
1614             */
1615        give_it_anyways:
1616
1617            sc->lmc_rxq[i] = NULL;
1618            sc->lmc_rxring[i].buffer1 = 0x0;
1619
1620            skb_put (skb, len);
1621            skb->protocol = lmc_proto_type(sc, skb);
1622            skb_reset_mac_header(skb);
1623            /* skb_reset_network_header(skb); */
1624            skb->dev = dev;
1625            lmc_proto_netif(sc, skb);
1626
1627            /*
1628             * This skb will be destroyed by the upper layers, make a new one
1629             */
1630            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1631            if (nsb) {
1632                sc->lmc_rxq[i] = nsb;
1633                nsb->dev = dev;
1634                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1635                /* Transferred to 21140 below */
1636            }
1637            else {
1638                /*
1639                 * We've run out of memory, stop trying to allocate
1640                 * memory and exit the interrupt handler
1641                 *
1642                 * The chip may run out of receivers and stop
1643                 * in which care we'll try to allocate the buffer
1644                 * again.  (once a second)
1645                 */
1646		sc->extra_stats.rx_BuffAllocErr++;
1647                LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1648                sc->failed_recv_alloc = 1;
1649                goto skip_out_of_mem;
1650            }
1651        }
1652        else {
1653            nsb = dev_alloc_skb(len);
1654            if(!nsb) {
1655                goto give_it_anyways;
1656            }
1657            skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1658            
1659            nsb->protocol = lmc_proto_type(sc, nsb);
1660            skb_reset_mac_header(nsb);
1661            /* skb_reset_network_header(nsb); */
1662            nsb->dev = dev;
1663            lmc_proto_netif(sc, nsb);
1664        }
1665
1666    skip_packet:
1667        LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1668        sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1669
1670        sc->lmc_next_rx++;
1671        i = sc->lmc_next_rx % LMC_RXDESCS;
1672        rx_work_limit--;
1673        if (rx_work_limit < 0)
1674            break;
1675    }
1676
1677    /* detect condition for LMC1000 where DSU cable attaches and fills
1678     * descriptors with bogus packets
1679     *
1680    if (localLengthErrCnt > LMC_RXDESCS - 3) {
1681	sc->extra_stats.rx_BadPktSurgeCnt++;
1682	LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1683		      sc->extra_stats.rx_BadPktSurgeCnt);
1684    } */
1685
1686    /* save max count of receive descriptors serviced */
1687    if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1688	    sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1689
1690#ifdef DEBUG
1691    if (rxIntLoopCnt == 0)
1692    {
1693        for (i = 0; i < LMC_RXDESCS; i++)
1694        {
1695            if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1696                != DESC_OWNED_BY_DC21X4)
1697            {
1698                rxIntLoopCnt++;
1699            }
1700        }
1701        LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1702    }
1703#endif
1704
1705
1706    lmc_led_off(sc, LMC_DS3_LED3);
1707
1708skip_out_of_mem:
1709
1710    lmc_trace(dev, "lmc_rx out");
1711
1712    return 0;
1713}
1714
1715static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1716{
1717    lmc_softc_t *sc = dev_to_sc(dev);
1718    unsigned long flags;
1719
1720    lmc_trace(dev, "lmc_get_stats in");
1721
1722    spin_lock_irqsave(&sc->lmc_lock, flags);
1723
1724    sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1725
1726    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1727
1728    lmc_trace(dev, "lmc_get_stats out");
1729
1730    return &sc->lmc_device->stats;
1731}
1732
1733static struct pci_driver lmc_driver = {
1734	.name		= "lmc",
1735	.id_table	= lmc_pci_tbl,
1736	.probe		= lmc_init_one,
1737	.remove		= __devexit_p(lmc_remove_one),
1738};
1739
1740static int __init init_lmc(void)
1741{
1742    return pci_register_driver(&lmc_driver);
1743}
1744
1745static void __exit exit_lmc(void)
1746{
1747    pci_unregister_driver(&lmc_driver);
1748}
1749
1750module_init(init_lmc);
1751module_exit(exit_lmc);
1752
1753unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1754{
1755    int i;
1756    int command = (0xf6 << 10) | (devaddr << 5) | regno;
1757    int retval = 0;
1758
1759    lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1760
1761    LMC_MII_SYNC (sc);
1762
1763    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1764
1765    for (i = 15; i >= 0; i--)
1766    {
1767        int dataval = (command & (1 << i)) ? 0x20000 : 0;
1768
1769        LMC_CSR_WRITE (sc, csr_9, dataval);
1770        lmc_delay ();
1771        /* __SLOW_DOWN_IO; */
1772        LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1773        lmc_delay ();
1774        /* __SLOW_DOWN_IO; */
1775    }
1776
1777    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1778
1779    for (i = 19; i > 0; i--)
1780    {
1781        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1782        lmc_delay ();
1783        /* __SLOW_DOWN_IO; */
1784        retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1785        LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1786        lmc_delay ();
1787        /* __SLOW_DOWN_IO; */
1788    }
1789
1790    lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1791
1792    return (retval >> 1) & 0xffff;
1793}
1794
1795void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1796{
1797    int i = 32;
1798    int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1799
1800    lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1801
1802    LMC_MII_SYNC (sc);
1803
1804    i = 31;
1805    while (i >= 0)
1806    {
1807        int datav;
1808
1809        if (command & (1 << i))
1810            datav = 0x20000;
1811        else
1812            datav = 0x00000;
1813
1814        LMC_CSR_WRITE (sc, csr_9, datav);
1815        lmc_delay ();
1816        /* __SLOW_DOWN_IO; */
1817        LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1818        lmc_delay ();
1819        /* __SLOW_DOWN_IO; */
1820        i--;
1821    }
1822
1823    i = 2;
1824    while (i > 0)
1825    {
1826        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1827        lmc_delay ();
1828        /* __SLOW_DOWN_IO; */
1829        LMC_CSR_WRITE (sc, csr_9, 0x50000);
1830        lmc_delay ();
1831        /* __SLOW_DOWN_IO; */
1832        i--;
1833    }
1834
1835    lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1836}
1837
1838static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1839{
1840    int i;
1841
1842    lmc_trace(sc->lmc_device, "lmc_softreset in");
1843
1844    /* Initialize the receive rings and buffers. */
1845    sc->lmc_txfull = 0;
1846    sc->lmc_next_rx = 0;
1847    sc->lmc_next_tx = 0;
1848    sc->lmc_taint_rx = 0;
1849    sc->lmc_taint_tx = 0;
1850
1851    /*
1852     * Setup each one of the receiver buffers
1853     * allocate an skbuff for each one, setup the descriptor table
1854     * and point each buffer at the next one
1855     */
1856
1857    for (i = 0; i < LMC_RXDESCS; i++)
1858    {
1859        struct sk_buff *skb;
1860
1861        if (sc->lmc_rxq[i] == NULL)
1862        {
1863            skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1864            if(skb == NULL){
1865                printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1866                sc->failed_ring = 1;
1867                break;
1868            }
1869            else{
1870                sc->lmc_rxq[i] = skb;
1871            }
1872        }
1873        else
1874        {
1875            skb = sc->lmc_rxq[i];
1876        }
1877
1878        skb->dev = sc->lmc_device;
1879
1880        /* owned by 21140 */
1881        sc->lmc_rxring[i].status = 0x80000000;
1882
1883        /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1884        sc->lmc_rxring[i].length = skb_tailroom(skb);
1885
1886        /* use to be tail which is dumb since you're thinking why write
1887         * to the end of the packj,et but since there's nothing there tail == data
1888         */
1889        sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1890
1891        /* This is fair since the structure is static and we have the next address */
1892        sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1893
1894    }
1895
1896    /*
1897     * Sets end of ring
1898     */
1899    if (i != 0) {
1900        sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1901        sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1902    }
1903    LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1904
1905    /* Initialize the transmit rings and buffers */
1906    for (i = 0; i < LMC_TXDESCS; i++)
1907    {
1908        if (sc->lmc_txq[i] != NULL){		/* have buffer */
1909            dev_kfree_skb(sc->lmc_txq[i]);	/* free it */
1910	    sc->lmc_device->stats.tx_dropped++;	/* We just dropped a packet */
1911        }
1912        sc->lmc_txq[i] = NULL;
1913        sc->lmc_txring[i].status = 0x00000000;
1914        sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1915    }
1916    sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1917    LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1918
1919    lmc_trace(sc->lmc_device, "lmc_softreset out");
1920}
1921
1922void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1923{
1924    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1925    sc->lmc_gpio_io &= ~bits;
1926    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1927    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1928}
1929
1930void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1931{
1932    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1933    sc->lmc_gpio_io |= bits;
1934    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1935    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1936}
1937
1938void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1939{
1940    lmc_trace(sc->lmc_device, "lmc_led_on in");
1941    if((~sc->lmc_miireg16) & led){ /* Already on! */
1942        lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1943        return;
1944    }
1945    
1946    sc->lmc_miireg16 &= ~led;
1947    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1948    lmc_trace(sc->lmc_device, "lmc_led_on out");
1949}
1950
1951void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1952{
1953    lmc_trace(sc->lmc_device, "lmc_led_off in");
1954    if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
1955        lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
1956        return;
1957    }
1958    
1959    sc->lmc_miireg16 |= led;
1960    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1961    lmc_trace(sc->lmc_device, "lmc_led_off out");
1962}
1963
1964static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1965{
1966    lmc_trace(sc->lmc_device, "lmc_reset in");
1967    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1968    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1969
1970    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1971    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1972
1973    /*
1974     * make some of the GPIO pins be outputs
1975     */
1976    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1977
1978    /*
1979     * RESET low to force state reset.  This also forces
1980     * the transmitter clock to be internal, but we expect to reset
1981     * that later anyway.
1982     */
1983    sc->lmc_gpio &= ~(LMC_GEP_RESET);
1984    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1985
1986    /*
1987     * hold for more than 10 microseconds
1988     */
1989    udelay(50);
1990
1991    /*
1992     * stop driving Xilinx-related signals
1993     */
1994    lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1995
1996    /*
1997     * Call media specific init routine
1998     */
1999    sc->lmc_media->init(sc);
2000
2001    sc->extra_stats.resetCount++;
2002    lmc_trace(sc->lmc_device, "lmc_reset out");
2003}
2004
2005static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
2006{
2007    u32 val;
2008    lmc_trace(sc->lmc_device, "lmc_dec_reset in");
2009
2010    /*
2011     * disable all interrupts
2012     */
2013    sc->lmc_intrmask = 0;
2014    LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
2015
2016    /*
2017     * Reset the chip with a software reset command.
2018     * Wait 10 microseconds (actually 50 PCI cycles but at
2019     * 33MHz that comes to two microseconds but wait a
2020     * bit longer anyways)
2021     */
2022    LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
2023    udelay(25);
2024#ifdef __sparc__
2025    sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
2026    sc->lmc_busmode = 0x00100000;
2027    sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
2028    LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2029#endif
2030    sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2031
2032    /*
2033     * We want:
2034     *   no ethernet address in frames we write
2035     *   disable padding (txdesc, padding disable)
2036     *   ignore runt frames (rdes0 bit 15)
2037     *   no receiver watchdog or transmitter jabber timer
2038     *       (csr15 bit 0,14 == 1)
2039     *   if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2040     */
2041
2042    sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2043                         | TULIP_CMD_FULLDUPLEX
2044                         | TULIP_CMD_PASSBADPKT
2045                         | TULIP_CMD_NOHEARTBEAT
2046                         | TULIP_CMD_PORTSELECT
2047                         | TULIP_CMD_RECEIVEALL
2048                         | TULIP_CMD_MUSTBEONE
2049                       );
2050    sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2051                          | TULIP_CMD_THRESHOLDCTL
2052                          | TULIP_CMD_STOREFWD
2053                          | TULIP_CMD_TXTHRSHLDCTL
2054                        );
2055
2056    LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2057
2058    /*
2059     * disable receiver watchdog and transmit jabber
2060     */
2061    val = LMC_CSR_READ(sc, csr_sia_general);
2062    val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2063    LMC_CSR_WRITE(sc, csr_sia_general, val);
2064
2065    lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2066}
2067
2068static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2069                         size_t csr_size)
2070{
2071    lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2072    sc->lmc_csrs.csr_busmode	        = csr_base +  0 * csr_size;
2073    sc->lmc_csrs.csr_txpoll		= csr_base +  1 * csr_size;
2074    sc->lmc_csrs.csr_rxpoll		= csr_base +  2 * csr_size;
2075    sc->lmc_csrs.csr_rxlist		= csr_base +  3 * csr_size;
2076    sc->lmc_csrs.csr_txlist		= csr_base +  4 * csr_size;
2077    sc->lmc_csrs.csr_status		= csr_base +  5 * csr_size;
2078    sc->lmc_csrs.csr_command	        = csr_base +  6 * csr_size;
2079    sc->lmc_csrs.csr_intr		= csr_base +  7 * csr_size;
2080    sc->lmc_csrs.csr_missed_frames	= csr_base +  8 * csr_size;
2081    sc->lmc_csrs.csr_9		        = csr_base +  9 * csr_size;
2082    sc->lmc_csrs.csr_10		        = csr_base + 10 * csr_size;
2083    sc->lmc_csrs.csr_11		        = csr_base + 11 * csr_size;
2084    sc->lmc_csrs.csr_12		        = csr_base + 12 * csr_size;
2085    sc->lmc_csrs.csr_13		        = csr_base + 13 * csr_size;
2086    sc->lmc_csrs.csr_14		        = csr_base + 14 * csr_size;
2087    sc->lmc_csrs.csr_15		        = csr_base + 15 * csr_size;
2088    lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2089}
2090
2091static void lmc_driver_timeout(struct net_device *dev)
2092{
2093    lmc_softc_t *sc = dev_to_sc(dev);
2094    u32 csr6;
2095    unsigned long flags;
2096
2097    lmc_trace(dev, "lmc_driver_timeout in");
2098
2099    spin_lock_irqsave(&sc->lmc_lock, flags);
2100
2101    printk("%s: Xmitter busy|\n", dev->name);
2102
2103    sc->extra_stats.tx_tbusy_calls++;
2104    if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
2105	    goto bug_out;
2106
2107    /*
2108     * Chip seems to have locked up
2109     * Reset it
2110     * This whips out all our decriptor
2111     * table and starts from scartch
2112     */
2113
2114    LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2115                  LMC_CSR_READ (sc, csr_status),
2116		  sc->extra_stats.tx_ProcTimeout);
2117
2118    lmc_running_reset (dev);
2119
2120    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2121    LMC_EVENT_LOG(LMC_EVENT_RESET2,
2122                  lmc_mii_readreg (sc, 0, 16),
2123                  lmc_mii_readreg (sc, 0, 17));
2124
2125    /* restart the tx processes */
2126    csr6 = LMC_CSR_READ (sc, csr_command);
2127    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2128    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2129
2130    /* immediate transmit */
2131    LMC_CSR_WRITE (sc, csr_txpoll, 0);
2132
2133    sc->lmc_device->stats.tx_errors++;
2134    sc->extra_stats.tx_ProcTimeout++; /* -baz */
2135
2136    dev->trans_start = jiffies; /* prevent tx timeout */
2137
2138bug_out:
2139
2140    spin_unlock_irqrestore(&sc->lmc_lock, flags);
2141
2142    lmc_trace(dev, "lmc_driver_timout out");
2143
2144
2145}
v5.14.15
   1// SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   4  * All rights reserved.  www.lanmedia.com
   5  * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
   6  *
   7  * This code is written by:
   8  * Andrew Stanley-Jones (asj@cban.com)
   9  * Rob Braun (bbraun@vix.com),
  10  * Michael Graff (explorer@vix.com) and
  11  * Matt Thomas (matt@3am-software.com).
  12  *
  13  * With Help By:
  14  * David Boggs
  15  * Ron Crane
  16  * Alan Cox
  17  *
 
 
 
  18  * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  19  *
  20  * To control link specific options lmcctl is required.
  21  * It can be obtained from ftp.lanmedia.com.
  22  *
  23  * Linux driver notes:
  24  * Linux uses the device struct lmc_private to pass private information
  25  * around.
  26  *
  27  * The initialization portion of this driver (the lmc_reset() and the
  28  * lmc_dec_reset() functions, as well as the led controls and the
  29  * lmc_initcsrs() functions.
  30  *
  31  * The watchdog function runs every second and checks to see if
  32  * we still have link, and that the timing source is what we expected
  33  * it to be.  If link is lost, the interface is marked down, and
  34  * we no longer can transmit.
 
  35  */
  36
  37#include <linux/kernel.h>
  38#include <linux/module.h>
  39#include <linux/string.h>
  40#include <linux/timer.h>
  41#include <linux/ptrace.h>
  42#include <linux/errno.h>
  43#include <linux/ioport.h>
  44#include <linux/slab.h>
  45#include <linux/interrupt.h>
  46#include <linux/pci.h>
  47#include <linux/delay.h>
  48#include <linux/hdlc.h>
 
  49#include <linux/in.h>
  50#include <linux/if_arp.h>
  51#include <linux/netdevice.h>
  52#include <linux/etherdevice.h>
  53#include <linux/skbuff.h>
  54#include <linux/inet.h>
  55#include <linux/bitops.h>
  56#include <asm/processor.h>             /* Processor type for cache alignment. */
  57#include <asm/io.h>
  58#include <asm/dma.h>
  59#include <linux/uaccess.h>
  60//#include <asm/spinlock.h>
  61
  62#define DRIVER_MAJOR_VERSION     1
  63#define DRIVER_MINOR_VERSION    34
  64#define DRIVER_SUB_VERSION       0
  65
  66#define DRIVER_VERSION  ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  67
  68#include "lmc.h"
  69#include "lmc_var.h"
  70#include "lmc_ioctl.h"
  71#include "lmc_debug.h"
  72#include "lmc_proto.h"
  73
  74static int LMC_PKT_BUF_SZ = 1542;
  75
  76static const struct pci_device_id lmc_pci_tbl[] = {
  77	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  78	  PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  79	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  80	  PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  81	{ 0 }
  82};
  83
  84MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  85MODULE_LICENSE("GPL v2");
  86
  87
  88static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
  89					struct net_device *dev);
  90static int lmc_rx (struct net_device *dev);
  91static int lmc_open(struct net_device *dev);
  92static int lmc_close(struct net_device *dev);
  93static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  94static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  95static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
  96static void lmc_softreset(lmc_softc_t * const);
  97static void lmc_running_reset(struct net_device *dev);
  98static int lmc_ifdown(struct net_device * const);
  99static void lmc_watchdog(struct timer_list *t);
 100static void lmc_reset(lmc_softc_t * const sc);
 101static void lmc_dec_reset(lmc_softc_t * const sc);
 102static void lmc_driver_timeout(struct net_device *dev, unsigned int txqueue);
 103
 104/*
 105 * linux reserves 16 device specific IOCTLs.  We call them
 106 * LMCIOC* to control various bits of our world.
 107 */
 108int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 109{
 110    lmc_softc_t *sc = dev_to_sc(dev);
 111    lmc_ctl_t ctl;
 112    int ret = -EOPNOTSUPP;
 113    u16 regVal;
 114    unsigned long flags;
 115
 
 
 116    /*
 117     * Most functions mess with the structure
 118     * Disable interrupts while we do the polling
 119     */
 120
 121    switch (cmd) {
 122        /*
 123         * Return current driver state.  Since we keep this up
 124         * To date internally, just copy this out to the user.
 125         */
 126    case LMCIOCGINFO: /*fold01*/
 127	if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
 128		ret = -EFAULT;
 129	else
 130		ret = 0;
 131        break;
 132
 133    case LMCIOCSINFO: /*fold01*/
 134        if (!capable(CAP_NET_ADMIN)) {
 135            ret = -EPERM;
 136            break;
 137        }
 138
 139        if(dev->flags & IFF_UP){
 140            ret = -EBUSY;
 141            break;
 142        }
 143
 144	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 145		ret = -EFAULT;
 146		break;
 147	}
 148
 149	spin_lock_irqsave(&sc->lmc_lock, flags);
 150        sc->lmc_media->set_status (sc, &ctl);
 151
 152        if(ctl.crc_length != sc->ictl.crc_length) {
 153            sc->lmc_media->set_crc_length(sc, ctl.crc_length);
 154	    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
 155		sc->TxDescriptControlInit |=  LMC_TDES_ADD_CRC_DISABLE;
 156	    else
 157		sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
 158        }
 159	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 160
 161        ret = 0;
 162        break;
 163
 164    case LMCIOCIFTYPE: /*fold01*/
 165        {
 166	    u16 old_type = sc->if_type;
 167	    u16	new_type;
 168
 169	    if (!capable(CAP_NET_ADMIN)) {
 170		ret = -EPERM;
 171		break;
 172	    }
 173
 174	    if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
 175		ret = -EFAULT;
 176		break;
 177	    }
 178
 179            
 180	    if (new_type == old_type)
 181	    {
 182		ret = 0 ;
 183		break;				/* no change */
 184            }
 185            
 186	    spin_lock_irqsave(&sc->lmc_lock, flags);
 187            lmc_proto_close(sc);
 188
 189            sc->if_type = new_type;
 190            lmc_proto_attach(sc);
 191	    ret = lmc_proto_open(sc);
 192	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 193	    break;
 194	}
 195
 196    case LMCIOCGETXINFO: /*fold01*/
 197	spin_lock_irqsave(&sc->lmc_lock, flags);
 198        sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
 199
 200        sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
 201        sc->lmc_xinfo.PciSlotNumber = 0;
 202        sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
 203        sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
 204        sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
 205        sc->lmc_xinfo.XilinxRevisionNumber =
 206            lmc_mii_readreg (sc, 0, 3) & 0xf;
 207        sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
 208        sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
 209        sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
 210	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 211
 212        sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
 213
 214        if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
 215			 sizeof(struct lmc_xinfo)))
 216		ret = -EFAULT;
 217	else
 218		ret = 0;
 219
 220        break;
 221
 222    case LMCIOCGETLMCSTATS:
 223	    spin_lock_irqsave(&sc->lmc_lock, flags);
 224	    if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
 225		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
 226		    sc->extra_stats.framingBitErrorCount +=
 227			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 228		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
 229		    sc->extra_stats.framingBitErrorCount +=
 230			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 231		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
 232		    sc->extra_stats.lineCodeViolationCount +=
 233			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 234		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
 235		    sc->extra_stats.lineCodeViolationCount +=
 236			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 237		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
 238		    regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
 239
 240		    sc->extra_stats.lossOfFrameCount +=
 241			    (regVal & T1FRAMER_LOF_MASK) >> 4;
 242		    sc->extra_stats.changeOfFrameAlignmentCount +=
 243			    (regVal & T1FRAMER_COFA_MASK) >> 2;
 244		    sc->extra_stats.severelyErroredFrameCount +=
 245			    regVal & T1FRAMER_SEF_MASK;
 246	    }
 247	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 248	    if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
 249			     sizeof(sc->lmc_device->stats)) ||
 250		copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
 251			     &sc->extra_stats, sizeof(sc->extra_stats)))
 252		    ret = -EFAULT;
 253	    else
 254		    ret = 0;
 255	    break;
 256
 257    case LMCIOCCLEARLMCSTATS:
 258	    if (!capable(CAP_NET_ADMIN)) {
 259		    ret = -EPERM;
 260		    break;
 261	    }
 262
 263	    spin_lock_irqsave(&sc->lmc_lock, flags);
 264	    memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
 265	    memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
 266	    sc->extra_stats.check = STATCHECK;
 267	    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 268		    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 269	    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 270	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 271	    ret = 0;
 272	    break;
 273
 274    case LMCIOCSETCIRCUIT: /*fold01*/
 275        if (!capable(CAP_NET_ADMIN)){
 276            ret = -EPERM;
 277            break;
 278        }
 279
 280        if(dev->flags & IFF_UP){
 281            ret = -EBUSY;
 282            break;
 283        }
 284
 285	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 286		ret = -EFAULT;
 287		break;
 288	}
 289	spin_lock_irqsave(&sc->lmc_lock, flags);
 290        sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
 291        sc->ictl.circuit_type = ctl.circuit_type;
 292	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 293        ret = 0;
 294
 295        break;
 296
 297    case LMCIOCRESET: /*fold01*/
 298        if (!capable(CAP_NET_ADMIN)){
 299            ret = -EPERM;
 300            break;
 301        }
 302
 303	spin_lock_irqsave(&sc->lmc_lock, flags);
 304        /* Reset driver and bring back to current state */
 305        printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 306        lmc_running_reset (dev);
 307        printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 308
 309        LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 310	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 311
 312        ret = 0;
 313        break;
 314
 315#ifdef DEBUG
 316    case LMCIOCDUMPEVENTLOG:
 317	if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
 318		ret = -EFAULT;
 319		break;
 320	}
 321	if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
 322			 sizeof(lmcEventLogBuf)))
 323		ret = -EFAULT;
 324	else
 325		ret = 0;
 326
 327        break;
 328#endif /* end ifdef _DBG_EVENTLOG */
 329    case LMCIOCT1CONTROL: /*fold01*/
 330        if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
 331            ret = -EOPNOTSUPP;
 332            break;
 333        }
 334        break;
 335    case LMCIOCXILINX: /*fold01*/
 336        {
 337            struct lmc_xilinx_control xc; /*fold02*/
 338
 339            if (!capable(CAP_NET_ADMIN)){
 340                ret = -EPERM;
 341                break;
 342            }
 343
 344            /*
 345             * Stop the xwitter whlie we restart the hardware
 346             */
 347            netif_stop_queue(dev);
 348
 349	    if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
 350		ret = -EFAULT;
 351		break;
 352	    }
 353            switch(xc.command){
 354            case lmc_xilinx_reset: /*fold02*/
 355                {
 
 356		    spin_lock_irqsave(&sc->lmc_lock, flags);
 357                    lmc_mii_readreg (sc, 0, 16);
 358
 359                    /*
 360                     * Make all of them 0 and make input
 361                     */
 362                    lmc_gpio_mkinput(sc, 0xff);
 363
 364                    /*
 365                     * make the reset output
 366                     */
 367                    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
 368
 369                    /*
 370                     * RESET low to force configuration.  This also forces
 371                     * the transmitter clock to be internal, but we expect to reset
 372                     * that later anyway.
 373                     */
 374
 375                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 376                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 377
 378
 379                    /*
 380                     * hold for more than 10 microseconds
 381                     */
 382                    udelay(50);
 383
 384                    sc->lmc_gpio |= LMC_GEP_RESET;
 385                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 386
 387
 388                    /*
 389                     * stop driving Xilinx-related signals
 390                     */
 391                    lmc_gpio_mkinput(sc, 0xff);
 392
 393                    /* Reset the frammer hardware */
 394                    sc->lmc_media->set_link_status (sc, 1);
 395                    sc->lmc_media->set_status (sc, NULL);
 396//                    lmc_softreset(sc);
 397
 398                    {
 399                        int i;
 400                        for(i = 0; i < 5; i++){
 401                            lmc_led_on(sc, LMC_DS3_LED0);
 402                            mdelay(100);
 403                            lmc_led_off(sc, LMC_DS3_LED0);
 404                            lmc_led_on(sc, LMC_DS3_LED1);
 405                            mdelay(100);
 406                            lmc_led_off(sc, LMC_DS3_LED1);
 407                            lmc_led_on(sc, LMC_DS3_LED3);
 408                            mdelay(100);
 409                            lmc_led_off(sc, LMC_DS3_LED3);
 410                            lmc_led_on(sc, LMC_DS3_LED2);
 411                            mdelay(100);
 412                            lmc_led_off(sc, LMC_DS3_LED2);
 413                        }
 414                    }
 415		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 416                    
 417                    
 418
 419                    ret = 0x0;
 420
 421                }
 422
 423                break;
 424            case lmc_xilinx_load_prom: /*fold02*/
 425                {
 
 426                    int timeout = 500000;
 427		    spin_lock_irqsave(&sc->lmc_lock, flags);
 428                    lmc_mii_readreg (sc, 0, 16);
 429
 430                    /*
 431                     * Make all of them 0 and make input
 432                     */
 433                    lmc_gpio_mkinput(sc, 0xff);
 434
 435                    /*
 436                     * make the reset output
 437                     */
 438                    lmc_gpio_mkoutput(sc,  LMC_GEP_DP | LMC_GEP_RESET);
 439
 440                    /*
 441                     * RESET low to force configuration.  This also forces
 442                     * the transmitter clock to be internal, but we expect to reset
 443                     * that later anyway.
 444                     */
 445
 446                    sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
 447                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 448
 449
 450                    /*
 451                     * hold for more than 10 microseconds
 452                     */
 453                    udelay(50);
 454
 455                    sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
 456                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 457
 458                    /*
 459                     * busy wait for the chip to reset
 460                     */
 461                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 462                           (timeout-- > 0))
 463                        cpu_relax();
 464
 465
 466                    /*
 467                     * stop driving Xilinx-related signals
 468                     */
 469                    lmc_gpio_mkinput(sc, 0xff);
 470		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 471
 472                    ret = 0x0;
 473                    
 474
 475                    break;
 476
 477                }
 478
 479            case lmc_xilinx_load: /*fold02*/
 480                {
 481                    char *data;
 482                    int pos;
 483                    int timeout = 500000;
 484
 485                    if (!xc.data) {
 486                            ret = -EINVAL;
 487                            break;
 488                    }
 489
 490                    data = memdup_user(xc.data, xc.len);
 491                    if (IS_ERR(data)) {
 492                            ret = PTR_ERR(data);
 
 493                            break;
 494                    }
 
 
 
 
 
 
 
 495
 496                    printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
 497
 498		    spin_lock_irqsave(&sc->lmc_lock, flags);
 499                    lmc_gpio_mkinput(sc, 0xff);
 500
 501                    /*
 502                     * Clear the Xilinx and start prgramming from the DEC
 503                     */
 504
 505                    /*
 506                     * Set ouput as:
 507                     * Reset: 0 (active)
 508                     * DP:    0 (active)
 509                     * Mode:  1
 510                     *
 511                     */
 512                    sc->lmc_gpio = 0x00;
 513                    sc->lmc_gpio &= ~LMC_GEP_DP;
 514                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 515                    sc->lmc_gpio |=  LMC_GEP_MODE;
 516                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 517
 518                    lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
 519
 520                    /*
 521                     * Wait at least 10 us 20 to be safe
 522                     */
 523                    udelay(50);
 524
 525                    /*
 526                     * Clear reset and activate programming lines
 527                     * Reset: Input
 528                     * DP:    Input
 529                     * Clock: Output
 530                     * Data:  Output
 531                     * Mode:  Output
 532                     */
 533                    lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
 534
 535                    /*
 536                     * Set LOAD, DATA, Clock to 1
 537                     */
 538                    sc->lmc_gpio = 0x00;
 539                    sc->lmc_gpio |= LMC_GEP_MODE;
 540                    sc->lmc_gpio |= LMC_GEP_DATA;
 541                    sc->lmc_gpio |= LMC_GEP_CLK;
 542                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 543                    
 544                    lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
 545
 546                    /*
 547                     * busy wait for the chip to reset
 548                     */
 549                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 550                           (timeout-- > 0))
 551                        cpu_relax();
 552
 553                    printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
 554
 555                    for(pos = 0; pos < xc.len; pos++){
 556                        switch(data[pos]){
 557                        case 0:
 558                            sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
 559                            break;
 560                        case 1:
 561                            sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
 562                            break;
 563                        default:
 564                            printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
 565                            sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
 566                        }
 567                        sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
 568                        sc->lmc_gpio |= LMC_GEP_MODE;
 569                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 570                        udelay(1);
 571                        
 572                        sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
 573                        sc->lmc_gpio |= LMC_GEP_MODE;
 574                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 575                        udelay(1);
 576                    }
 577                    if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
 578                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
 579                    }
 580                    else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
 581                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
 582                    }
 583                    else {
 584                        printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
 585                    }
 586
 587                    lmc_gpio_mkinput(sc, 0xff);
 588                    
 589                    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
 590                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 591
 592                    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
 593                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 594		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 595
 596                    kfree(data);
 597                    
 598                    ret = 0;
 599                    
 600                    break;
 601                }
 602            default: /*fold02*/
 603                ret = -EBADE;
 604                break;
 605            }
 606
 607            netif_wake_queue(dev);
 608            sc->lmc_txfull = 0;
 609
 610        }
 611        break;
 612    default: /*fold01*/
 613        /* If we don't know what to do, give the protocol a shot. */
 614        ret = lmc_proto_ioctl (sc, ifr, cmd);
 615        break;
 616    }
 617
 
 
 618    return ret;
 619}
 620
 621
 622/* the watchdog process that cruises around */
 623static void lmc_watchdog(struct timer_list *t) /*fold00*/
 624{
 625    lmc_softc_t *sc = from_timer(sc, t, timer);
 626    struct net_device *dev = sc->lmc_device;
 627    int link_status;
 628    u32 ticks;
 629    unsigned long flags;
 630
 
 
 631    spin_lock_irqsave(&sc->lmc_lock, flags);
 632
 633    if(sc->check != 0xBEAFCAFE){
 634        printk("LMC: Corrupt net_device struct, breaking out\n");
 635	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 636        return;
 637    }
 638
 639
 640    /* Make sure the tx jabber and rx watchdog are off,
 641     * and the transmit and receive processes are running.
 642     */
 643
 644    LMC_CSR_WRITE (sc, csr_15, 0x00000011);
 645    sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
 646    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
 647
 648    if (sc->lmc_ok == 0)
 649        goto kick_timer;
 650
 651    LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 652
 653    /* --- begin time out check -----------------------------------
 654     * check for a transmit interrupt timeout
 655     * Has the packet xmt vs xmt serviced threshold been exceeded */
 656    if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 657	sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 658	sc->tx_TimeoutInd == 0)
 659    {
 660
 661        /* wait for the watchdog to come around again */
 662        sc->tx_TimeoutInd = 1;
 663    }
 664    else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 665	     sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 666	     sc->tx_TimeoutInd)
 667    {
 668
 669        LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
 670
 671        sc->tx_TimeoutDisplay = 1;
 672	sc->extra_stats.tx_TimeoutCnt++;
 673
 674        /* DEC chip is stuck, hit it with a RESET!!!! */
 675        lmc_running_reset (dev);
 676
 677
 678        /* look at receive & transmit process state to make sure they are running */
 679        LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
 680
 681        /* look at: DSR - 02  for Reg 16
 682         *                  CTS - 08
 683         *                  DCD - 10
 684         *                  RI  - 20
 685         * for Reg 17
 686         */
 687        LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
 688
 689        /* reset the transmit timeout detection flag */
 690        sc->tx_TimeoutInd = 0;
 691        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 692	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 693    } else {
 694        sc->tx_TimeoutInd = 0;
 695        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 696	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 697    }
 698
 699    /* --- end time out check ----------------------------------- */
 700
 701
 702    link_status = sc->lmc_media->get_link_status (sc);
 703
 704    /*
 705     * hardware level link lost, but the interface is marked as up.
 706     * Mark it as down.
 707     */
 708    if ((link_status == 0) && (sc->last_link_status != 0)) {
 709        printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
 710        sc->last_link_status = 0;
 711        /* lmc_reset (sc); Why reset??? The link can go down ok */
 712
 713        /* Inform the world that link has been lost */
 714	netif_carrier_off(dev);
 715    }
 716
 717    /*
 718     * hardware link is up, but the interface is marked as down.
 719     * Bring it back up again.
 720     */
 721     if (link_status != 0 && sc->last_link_status == 0) {
 722         printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
 723         sc->last_link_status = 1;
 724         /* lmc_reset (sc); Again why reset??? */
 725
 726	 netif_carrier_on(dev);
 727     }
 728
 729    /* Call media specific watchdog functions */
 730    sc->lmc_media->watchdog(sc);
 731
 732    /*
 733     * Poke the transmitter to make sure it
 734     * never stops, even if we run out of mem
 735     */
 736    LMC_CSR_WRITE(sc, csr_rxpoll, 0);
 737
 738    /*
 739     * Check for code that failed
 740     * and try and fix it as appropriate
 741     */
 742    if(sc->failed_ring == 1){
 743        /*
 744         * Failed to setup the recv/xmit rin
 745         * Try again
 746         */
 747        sc->failed_ring = 0;
 748        lmc_softreset(sc);
 749    }
 750    if(sc->failed_recv_alloc == 1){
 751        /*
 752         * We failed to alloc mem in the
 753         * interrupt handler, go through the rings
 754         * and rebuild them
 755         */
 756        sc->failed_recv_alloc = 0;
 757        lmc_softreset(sc);
 758    }
 759
 760
 761    /*
 762     * remember the timer value
 763     */
 764kick_timer:
 765
 766    ticks = LMC_CSR_READ (sc, csr_gp_timer);
 767    LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
 768    sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
 769
 770    /*
 771     * restart this timer.
 772     */
 773    sc->timer.expires = jiffies + (HZ);
 774    add_timer (&sc->timer);
 775
 776    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 
 
 
 777}
 778
 779static int lmc_attach(struct net_device *dev, unsigned short encoding,
 780		      unsigned short parity)
 781{
 782	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
 783		return 0;
 784	return -EINVAL;
 785}
 786
 787static const struct net_device_ops lmc_ops = {
 788	.ndo_open       = lmc_open,
 789	.ndo_stop       = lmc_close,
 
 790	.ndo_start_xmit = hdlc_start_xmit,
 791	.ndo_do_ioctl   = lmc_ioctl,
 792	.ndo_tx_timeout = lmc_driver_timeout,
 793	.ndo_get_stats  = lmc_get_stats,
 794};
 795
 796static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 
 797{
 798	lmc_softc_t *sc;
 799	struct net_device *dev;
 800	u16 subdevice;
 801	u16 AdapModelNum;
 802	int err;
 803	static int cards_found;
 804
 805	err = pcim_enable_device(pdev);
 
 
 806	if (err) {
 807		printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
 808		return err;
 809	}
 810
 811	err = pci_request_regions(pdev, "lmc");
 812	if (err) {
 813		printk(KERN_ERR "lmc: pci_request_region failed\n");
 814		return err;
 815	}
 816
 817	/*
 818	 * Allocate our own device structure
 819	 */
 820	sc = devm_kzalloc(&pdev->dev, sizeof(lmc_softc_t), GFP_KERNEL);
 821	if (!sc)
 822		return -ENOMEM;
 
 
 823
 824	dev = alloc_hdlcdev(sc);
 825	if (!dev) {
 826		printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
 827		return -ENOMEM;
 828	}
 829
 830
 831	dev->type = ARPHRD_HDLC;
 832	dev_to_hdlc(dev)->xmit = lmc_start_xmit;
 833	dev_to_hdlc(dev)->attach = lmc_attach;
 834	dev->netdev_ops = &lmc_ops;
 835	dev->watchdog_timeo = HZ; /* 1 second */
 836	dev->tx_queue_len = 100;
 837	sc->lmc_device = dev;
 838	sc->name = dev->name;
 839	sc->if_type = LMC_PPP;
 840	sc->check = 0xBEAFCAFE;
 841	dev->base_addr = pci_resource_start(pdev, 0);
 842	dev->irq = pdev->irq;
 843	pci_set_drvdata(pdev, dev);
 844	SET_NETDEV_DEV(dev, &pdev->dev);
 845
 846	/*
 847	 * This will get the protocol layer ready and do any 1 time init's
 848	 * Must have a valid sc and dev structure
 849	 */
 850	lmc_proto_attach(sc);
 851
 852	/* Init the spin lock so can call it latter */
 853
 854	spin_lock_init(&sc->lmc_lock);
 855	pci_set_master(pdev);
 856
 857	printk(KERN_INFO "hdlc: detected at %lx, irq %d\n",
 858	       dev->base_addr, dev->irq);
 859
 860	err = register_hdlc_device(dev);
 861	if (err) {
 862		printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
 863		free_netdev(dev);
 864		return err;
 865	}
 866
 867    sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
 868    sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 869
 870    /*
 871     *
 872     * Check either the subvendor or the subdevice, some systems reverse
 873     * the setting in the bois, seems to be version and arch dependent?
 874     * Fix the error, exchange the two values 
 875     */
 876    if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
 877	    subdevice = pdev->subsystem_vendor;
 878
 879    switch (subdevice) {
 880    case PCI_DEVICE_ID_LMC_HSSI:
 881	printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
 882        sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
 883        sc->lmc_media = &lmc_hssi_media;
 884        break;
 885    case PCI_DEVICE_ID_LMC_DS3:
 886	printk(KERN_INFO "%s: LMC DS3\n", dev->name);
 887        sc->lmc_cardtype = LMC_CARDTYPE_DS3;
 888        sc->lmc_media = &lmc_ds3_media;
 889        break;
 890    case PCI_DEVICE_ID_LMC_SSI:
 891	printk(KERN_INFO "%s: LMC SSI\n", dev->name);
 892        sc->lmc_cardtype = LMC_CARDTYPE_SSI;
 893        sc->lmc_media = &lmc_ssi_media;
 894        break;
 895    case PCI_DEVICE_ID_LMC_T1:
 896	printk(KERN_INFO "%s: LMC T1\n", dev->name);
 897        sc->lmc_cardtype = LMC_CARDTYPE_T1;
 898        sc->lmc_media = &lmc_t1_media;
 899        break;
 900    default:
 901	printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
 902	unregister_hdlc_device(dev);
 903	return -EIO;
 904        break;
 905    }
 906
 907    lmc_initcsrs (sc, dev->base_addr, 8);
 908
 909    lmc_gpio_mkinput (sc, 0xff);
 910    sc->lmc_gpio = 0;		/* drive no signals yet */
 911
 912    sc->lmc_media->defaults (sc);
 913
 914    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
 915
 916    /* verify that the PCI Sub System ID matches the Adapter Model number
 917     * from the MII register
 918     */
 919    AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
 920
 921    if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
 922	 subdevice != PCI_DEVICE_ID_LMC_T1) &&
 923	(AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
 924	 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
 925	(AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
 926	 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
 927	(AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
 928	 subdevice != PCI_DEVICE_ID_LMC_HSSI))
 929	    printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
 930		   " Subsystem ID = 0x%04x\n",
 931		   dev->name, AdapModelNum, subdevice);
 932
 933    /*
 934     * reset clock
 935     */
 936    LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
 937
 938    sc->board_idx = cards_found++;
 939    sc->extra_stats.check = STATCHECK;
 940    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 941	    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 942    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 943
 944    sc->lmc_ok = 0;
 945    sc->last_link_status = 0;
 946
 
 947    return 0;
 
 
 
 
 
 
 
 
 
 948}
 949
 950/*
 951 * Called from pci when removing module.
 952 */
 953static void lmc_remove_one(struct pci_dev *pdev)
 954{
 955	struct net_device *dev = pci_get_drvdata(pdev);
 956
 957	if (dev) {
 958		printk(KERN_DEBUG "%s: removing...\n", dev->name);
 959		unregister_hdlc_device(dev);
 960		free_netdev(dev);
 
 
 
 961	}
 962}
 963
 964/* After this is called, packets can be sent.
 965 * Does not initialize the addresses
 966 */
 967static int lmc_open(struct net_device *dev)
 968{
 969    lmc_softc_t *sc = dev_to_sc(dev);
 970    int err;
 971
 
 
 972    lmc_led_on(sc, LMC_DS3_LED0);
 973
 974    lmc_dec_reset(sc);
 975    lmc_reset(sc);
 976
 977    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
 978    LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
 979		  lmc_mii_readreg(sc, 0, 17));
 980
 981    if (sc->lmc_ok)
 
 982        return 0;
 
 983
 984    lmc_softreset (sc);
 985
 986    /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
 987    if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
 988        printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
 
 989        return -EAGAIN;
 990    }
 991    sc->got_irq = 1;
 992
 993    /* Assert Terminal Active */
 994    sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
 995    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
 996
 997    /*
 998     * reset to last state.
 999     */
1000    sc->lmc_media->set_status (sc, NULL);
1001
1002    /* setup default bits to be used in tulip_desc_t transmit descriptor
1003     * -baz */
1004    sc->TxDescriptControlInit = (
1005                                 LMC_TDES_INTERRUPT_ON_COMPLETION
1006                                 | LMC_TDES_FIRST_SEGMENT
1007                                 | LMC_TDES_LAST_SEGMENT
1008                                 | LMC_TDES_SECOND_ADDR_CHAINED
1009                                 | LMC_TDES_DISABLE_PADDING
1010                                );
1011
1012    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1013        /* disable 32 bit CRC generated by ASIC */
1014        sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1015    }
1016    sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1017    /* Acknoledge the Terminal Active and light LEDs */
1018
1019    /* dev->flags |= IFF_UP; */
1020
1021    if ((err = lmc_proto_open(sc)) != 0)
1022	    return err;
1023
1024    netif_start_queue(dev);
1025    sc->extra_stats.tx_tbusy0++;
1026
1027    /*
1028     * select what interrupts we want to get
1029     */
1030    sc->lmc_intrmask = 0;
1031    /* Should be using the default interrupt mask defined in the .h file. */
1032    sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1033                         | TULIP_STS_RXINTR
1034                         | TULIP_STS_TXINTR
1035                         | TULIP_STS_ABNRMLINTR
1036                         | TULIP_STS_SYSERROR
1037                         | TULIP_STS_TXSTOPPED
1038                         | TULIP_STS_TXUNDERFLOW
1039                         | TULIP_STS_RXSTOPPED
1040		         | TULIP_STS_RXNOBUF
1041                        );
1042    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1043
1044    sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1045    sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1046    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1047
1048    sc->lmc_ok = 1; /* Run watchdog */
1049
1050    /*
1051     * Set the if up now - pfb
1052     */
1053
1054    sc->last_link_status = 1;
1055
1056    /*
1057     * Setup a timer for the watchdog on probe, and start it running.
1058     * Since lmc_ok == 0, it will be a NOP for now.
1059     */
1060    timer_setup(&sc->timer, lmc_watchdog, 0);
1061    sc->timer.expires = jiffies + HZ;
 
 
1062    add_timer (&sc->timer);
1063
 
 
1064    return 0;
1065}
1066
1067/* Total reset to compensate for the AdTran DSU doing bad things
1068 *  under heavy load
1069 */
1070
1071static void lmc_running_reset (struct net_device *dev) /*fold00*/
1072{
1073    lmc_softc_t *sc = dev_to_sc(dev);
1074
 
 
1075    /* stop interrupts */
1076    /* Clear the interrupt mask */
1077    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1078
1079    lmc_dec_reset (sc);
1080    lmc_reset (sc);
1081    lmc_softreset (sc);
1082    /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1083    sc->lmc_media->set_link_status (sc, 1);
1084    sc->lmc_media->set_status (sc, NULL);
1085
1086    netif_wake_queue(dev);
1087
1088    sc->lmc_txfull = 0;
1089    sc->extra_stats.tx_tbusy0++;
1090
1091    sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1092    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1093
1094    sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1095    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
 
 
1096}
1097
1098
1099/* This is what is called when you ifconfig down a device.
1100 * This disables the timer for the watchdog and keepalives,
1101 * and disables the irq for dev.
1102 */
1103static int lmc_close(struct net_device *dev)
1104{
1105    /* not calling release_region() as we should */
1106    lmc_softc_t *sc = dev_to_sc(dev);
1107
 
 
1108    sc->lmc_ok = 0;
1109    sc->lmc_media->set_link_status (sc, 0);
1110    del_timer (&sc->timer);
1111    lmc_proto_close(sc);
1112    lmc_ifdown (dev);
1113
 
 
1114    return 0;
1115}
1116
1117/* Ends the transfer of packets */
1118/* When the interface goes down, this is called */
1119static int lmc_ifdown (struct net_device *dev) /*fold00*/
1120{
1121    lmc_softc_t *sc = dev_to_sc(dev);
1122    u32 csr6;
1123    int i;
1124
 
 
1125    /* Don't let anything else go on right now */
1126    //    dev->start = 0;
1127    netif_stop_queue(dev);
1128    sc->extra_stats.tx_tbusy1++;
1129
1130    /* stop interrupts */
1131    /* Clear the interrupt mask */
1132    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1133
1134    /* Stop Tx and Rx on the chip */
1135    csr6 = LMC_CSR_READ (sc, csr_command);
1136    csr6 &= ~LMC_DEC_ST;		/* Turn off the Transmission bit */
1137    csr6 &= ~LMC_DEC_SR;		/* Turn off the Receive bit */
1138    LMC_CSR_WRITE (sc, csr_command, csr6);
1139
1140    sc->lmc_device->stats.rx_missed_errors +=
1141	    LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1142
1143    /* release the interrupt */
1144    if(sc->got_irq == 1){
1145        free_irq (dev->irq, dev);
1146        sc->got_irq = 0;
1147    }
1148
1149    /* free skbuffs in the Rx queue */
1150    for (i = 0; i < LMC_RXDESCS; i++)
1151    {
1152        struct sk_buff *skb = sc->lmc_rxq[i];
1153        sc->lmc_rxq[i] = NULL;
1154        sc->lmc_rxring[i].status = 0;
1155        sc->lmc_rxring[i].length = 0;
1156        sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1157        if (skb != NULL)
1158            dev_kfree_skb(skb);
1159        sc->lmc_rxq[i] = NULL;
1160    }
1161
1162    for (i = 0; i < LMC_TXDESCS; i++)
1163    {
1164        if (sc->lmc_txq[i] != NULL)
1165            dev_kfree_skb(sc->lmc_txq[i]);
1166        sc->lmc_txq[i] = NULL;
1167    }
1168
1169    lmc_led_off (sc, LMC_MII16_LED_ALL);
1170
1171    netif_wake_queue(dev);
1172    sc->extra_stats.tx_tbusy0++;
1173
 
 
1174    return 0;
1175}
1176
1177/* Interrupt handling routine.  This will take an incoming packet, or clean
1178 * up after a trasmit.
1179 */
1180static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1181{
1182    struct net_device *dev = (struct net_device *) dev_instance;
1183    lmc_softc_t *sc = dev_to_sc(dev);
1184    u32 csr;
1185    int i;
1186    s32 stat;
1187    unsigned int badtx;
 
1188    int max_work = LMC_RXDESCS;
1189    int handled = 0;
1190
 
 
1191    spin_lock(&sc->lmc_lock);
1192
1193    /*
1194     * Read the csr to find what interrupts we have (if any)
1195     */
1196    csr = LMC_CSR_READ (sc, csr_status);
1197
1198    /*
1199     * Make sure this is our interrupt
1200     */
1201    if ( ! (csr & sc->lmc_intrmask)) {
1202        goto lmc_int_fail_out;
1203    }
1204
 
 
1205    /* always go through this loop at least once */
1206    while (csr & sc->lmc_intrmask) {
1207	handled = 1;
1208
1209        /*
1210         * Clear interrupt bits, we handle all case below
1211         */
1212        LMC_CSR_WRITE (sc, csr_status, csr);
1213
1214        /*
1215         * One of
1216         *  - Transmit process timed out CSR5<1>
1217         *  - Transmit jabber timeout    CSR5<3>
1218         *  - Transmit underflow         CSR5<5>
1219         *  - Transmit Receiver buffer unavailable CSR5<7>
1220         *  - Receive process stopped    CSR5<8>
1221         *  - Receive watchdog timeout   CSR5<9>
1222         *  - Early transmit interrupt   CSR5<10>
1223         *
1224         * Is this really right? Should we do a running reset for jabber?
1225         * (being a WAN card and all)
1226         */
1227        if (csr & TULIP_STS_ABNRMLINTR){
1228            lmc_running_reset (dev);
1229            break;
1230        }
1231
1232        if (csr & TULIP_STS_RXINTR)
 
1233            lmc_rx (dev);
1234
 
1235        if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1236
1237	    int		n_compl = 0 ;
1238            /* reset the transmit timeout detection flag -baz */
1239	    sc->extra_stats.tx_NoCompleteCnt = 0;
1240
1241            badtx = sc->lmc_taint_tx;
1242            i = badtx % LMC_TXDESCS;
1243
1244            while ((badtx < sc->lmc_next_tx)) {
1245                stat = sc->lmc_txring[i].status;
1246
1247                LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1248						 sc->lmc_txring[i].length);
1249                /*
1250                 * If bit 31 is 1 the tulip owns it break out of the loop
1251                 */
1252                if (stat & 0x80000000)
1253                    break;
1254
1255		n_compl++ ;		/* i.e., have an empty slot in ring */
1256                /*
1257                 * If we have no skbuff or have cleared it
1258                 * Already continue to the next buffer
1259                 */
1260                if (sc->lmc_txq[i] == NULL)
1261                    continue;
1262
1263		/*
1264		 * Check the total error summary to look for any errors
1265		 */
1266		if (stat & 0x8000) {
1267			sc->lmc_device->stats.tx_errors++;
1268			if (stat & 0x4104)
1269				sc->lmc_device->stats.tx_aborted_errors++;
1270			if (stat & 0x0C00)
1271				sc->lmc_device->stats.tx_carrier_errors++;
1272			if (stat & 0x0200)
1273				sc->lmc_device->stats.tx_window_errors++;
1274			if (stat & 0x0002)
1275				sc->lmc_device->stats.tx_fifo_errors++;
1276		} else {
1277			sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1278
1279			sc->lmc_device->stats.tx_packets++;
1280                }
1281
1282		dev_consume_skb_irq(sc->lmc_txq[i]);
 
1283                sc->lmc_txq[i] = NULL;
1284
1285                badtx++;
1286                i = badtx % LMC_TXDESCS;
1287            }
1288
1289            if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1290            {
1291                printk ("%s: out of sync pointer\n", dev->name);
1292                badtx += LMC_TXDESCS;
1293            }
1294            LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1295            sc->lmc_txfull = 0;
1296            netif_wake_queue(dev);
1297	    sc->extra_stats.tx_tbusy0++;
1298
1299
1300#ifdef DEBUG
1301	    sc->extra_stats.dirtyTx = badtx;
1302	    sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1303	    sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1304#endif
1305            sc->lmc_taint_tx = badtx;
1306
1307            /*
1308             * Why was there a break here???
1309             */
1310        }			/* end handle transmit interrupt */
1311
1312        if (csr & TULIP_STS_SYSERROR) {
1313            u32 error;
1314            printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1315            error = csr>>23 & 0x7;
1316            switch(error){
1317            case 0x000:
1318                printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1319                break;
1320            case 0x001:
1321                printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1322                break;
1323            case 0x002:
1324                printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1325                break;
1326            default:
1327                printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1328            }
1329            lmc_dec_reset (sc);
1330            lmc_reset (sc);
1331            LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1332            LMC_EVENT_LOG(LMC_EVENT_RESET2,
1333                          lmc_mii_readreg (sc, 0, 16),
1334                          lmc_mii_readreg (sc, 0, 17));
1335
1336        }
1337
1338        
1339        if(max_work-- <= 0)
1340            break;
1341        
1342        /*
1343         * Get current csr status to make sure
1344         * we've cleared all interrupts
1345         */
1346        csr = LMC_CSR_READ (sc, csr_status);
1347    }				/* end interrupt loop */
1348    LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1349
1350lmc_int_fail_out:
1351
1352    spin_unlock(&sc->lmc_lock);
1353
 
1354    return IRQ_RETVAL(handled);
1355}
1356
1357static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1358					struct net_device *dev)
1359{
1360    lmc_softc_t *sc = dev_to_sc(dev);
1361    u32 flag;
1362    int entry;
1363    unsigned long flags;
1364
 
 
1365    spin_lock_irqsave(&sc->lmc_lock, flags);
1366
1367    /* normal path, tbusy known to be zero */
1368
1369    entry = sc->lmc_next_tx % LMC_TXDESCS;
1370
1371    sc->lmc_txq[entry] = skb;
1372    sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1373
1374    LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1375
1376#ifndef GCOM
1377    /* If the queue is less than half full, don't interrupt */
1378    if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1379    {
1380        /* Do not interrupt on completion of this packet */
1381        flag = 0x60000000;
1382        netif_wake_queue(dev);
1383    }
1384    else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1385    {
1386        /* This generates an interrupt on completion of this packet */
1387        flag = 0xe0000000;
1388        netif_wake_queue(dev);
1389    }
1390    else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1391    {
1392        /* Do not interrupt on completion of this packet */
1393        flag = 0x60000000;
1394        netif_wake_queue(dev);
1395    }
1396    else
1397    {
1398        /* This generates an interrupt on completion of this packet */
1399        flag = 0xe0000000;
1400        sc->lmc_txfull = 1;
1401        netif_stop_queue(dev);
1402    }
1403#else
1404    flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1405
1406    if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1407    {				/* ring full, go busy */
1408        sc->lmc_txfull = 1;
1409	netif_stop_queue(dev);
1410	sc->extra_stats.tx_tbusy1++;
1411        LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1412    }
1413#endif
1414
1415
1416    if (entry == LMC_TXDESCS - 1)	/* last descriptor in ring */
1417	flag |= LMC_TDES_END_OF_RING;	/* flag as such for Tulip */
1418
1419    /* don't pad small packets either */
1420    flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1421						sc->TxDescriptControlInit;
1422
1423    /* set the transmit timeout flag to be checked in
1424     * the watchdog timer handler. -baz
1425     */
1426
1427    sc->extra_stats.tx_NoCompleteCnt++;
1428    sc->lmc_next_tx++;
1429
1430    /* give ownership to the chip */
1431    LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1432    sc->lmc_txring[entry].status = 0x80000000;
1433
1434    /* send now! */
1435    LMC_CSR_WRITE (sc, csr_txpoll, 0);
1436
1437    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1438
 
1439    return NETDEV_TX_OK;
1440}
1441
1442
1443static int lmc_rx(struct net_device *dev)
1444{
1445    lmc_softc_t *sc = dev_to_sc(dev);
1446    int i;
1447    int rx_work_limit = LMC_RXDESCS;
 
1448    int rxIntLoopCnt;		/* debug -baz */
1449    int localLengthErrCnt = 0;
1450    long stat;
1451    struct sk_buff *skb, *nsb;
1452    u16 len;
1453
 
 
1454    lmc_led_on(sc, LMC_DS3_LED3);
1455
1456    rxIntLoopCnt = 0;		/* debug -baz */
1457
1458    i = sc->lmc_next_rx % LMC_RXDESCS;
 
1459
1460    while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1461    {
1462        rxIntLoopCnt++;		/* debug -baz */
1463        len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1464        if ((stat & 0x0300) != 0x0300) {  /* Check first segment and last segment */
1465		if ((stat & 0x0000ffff) != 0x7fff) {
1466			/* Oversized frame */
1467			sc->lmc_device->stats.rx_length_errors++;
1468			goto skip_packet;
1469		}
1470	}
1471
1472	if (stat & 0x00000008) { /* Catch a dribbling bit error */
1473		sc->lmc_device->stats.rx_errors++;
1474		sc->lmc_device->stats.rx_frame_errors++;
1475		goto skip_packet;
1476	}
1477
1478
1479	if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1480		sc->lmc_device->stats.rx_errors++;
1481		sc->lmc_device->stats.rx_crc_errors++;
1482		goto skip_packet;
1483	}
1484
1485	if (len > LMC_PKT_BUF_SZ) {
1486		sc->lmc_device->stats.rx_length_errors++;
1487		localLengthErrCnt++;
1488		goto skip_packet;
1489	}
1490
1491	if (len < sc->lmc_crcSize + 2) {
1492		sc->lmc_device->stats.rx_length_errors++;
1493		sc->extra_stats.rx_SmallPktCnt++;
1494		localLengthErrCnt++;
1495		goto skip_packet;
1496	}
1497
1498        if(stat & 0x00004000){
1499            printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1500        }
1501
1502        len -= sc->lmc_crcSize;
1503
1504        skb = sc->lmc_rxq[i];
1505
1506        /*
1507         * We ran out of memory at some point
1508         * just allocate an skb buff and continue.
1509         */
1510        
1511        if (!skb) {
1512            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1513            if (nsb) {
1514                sc->lmc_rxq[i] = nsb;
1515                nsb->dev = dev;
1516                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1517            }
1518            sc->failed_recv_alloc = 1;
1519            goto skip_packet;
1520        }
1521        
1522	sc->lmc_device->stats.rx_packets++;
1523	sc->lmc_device->stats.rx_bytes += len;
1524
1525        LMC_CONSOLE_LOG("recv", skb->data, len);
1526
1527        /*
1528         * I'm not sure of the sanity of this
1529         * Packets could be arriving at a constant
1530         * 44.210mbits/sec and we're going to copy
1531         * them into a new buffer??
1532         */
1533        
1534        if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1535            /*
1536             * If it's a large packet don't copy it just hand it up
1537             */
1538        give_it_anyways:
1539
1540            sc->lmc_rxq[i] = NULL;
1541            sc->lmc_rxring[i].buffer1 = 0x0;
1542
1543            skb_put (skb, len);
1544            skb->protocol = lmc_proto_type(sc, skb);
1545            skb_reset_mac_header(skb);
1546            /* skb_reset_network_header(skb); */
1547            skb->dev = dev;
1548            lmc_proto_netif(sc, skb);
1549
1550            /*
1551             * This skb will be destroyed by the upper layers, make a new one
1552             */
1553            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1554            if (nsb) {
1555                sc->lmc_rxq[i] = nsb;
1556                nsb->dev = dev;
1557                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1558                /* Transferred to 21140 below */
1559            }
1560            else {
1561                /*
1562                 * We've run out of memory, stop trying to allocate
1563                 * memory and exit the interrupt handler
1564                 *
1565                 * The chip may run out of receivers and stop
1566                 * in which care we'll try to allocate the buffer
1567                 * again.  (once a second)
1568                 */
1569		sc->extra_stats.rx_BuffAllocErr++;
1570                LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1571                sc->failed_recv_alloc = 1;
1572                goto skip_out_of_mem;
1573            }
1574        }
1575        else {
1576            nsb = dev_alloc_skb(len);
1577            if(!nsb) {
1578                goto give_it_anyways;
1579            }
1580            skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1581            
1582            nsb->protocol = lmc_proto_type(sc, nsb);
1583            skb_reset_mac_header(nsb);
1584            /* skb_reset_network_header(nsb); */
1585            nsb->dev = dev;
1586            lmc_proto_netif(sc, nsb);
1587        }
1588
1589    skip_packet:
1590        LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1591        sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1592
1593        sc->lmc_next_rx++;
1594        i = sc->lmc_next_rx % LMC_RXDESCS;
1595        rx_work_limit--;
1596        if (rx_work_limit < 0)
1597            break;
1598    }
1599
1600    /* detect condition for LMC1000 where DSU cable attaches and fills
1601     * descriptors with bogus packets
1602     *
1603    if (localLengthErrCnt > LMC_RXDESCS - 3) {
1604	sc->extra_stats.rx_BadPktSurgeCnt++;
1605	LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1606		      sc->extra_stats.rx_BadPktSurgeCnt);
1607    } */
1608
1609    /* save max count of receive descriptors serviced */
1610    if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1611	    sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1612
1613#ifdef DEBUG
1614    if (rxIntLoopCnt == 0)
1615    {
1616        for (i = 0; i < LMC_RXDESCS; i++)
1617        {
1618            if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1619                != DESC_OWNED_BY_DC21X4)
1620            {
1621                rxIntLoopCnt++;
1622            }
1623        }
1624        LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1625    }
1626#endif
1627
1628
1629    lmc_led_off(sc, LMC_DS3_LED3);
1630
1631skip_out_of_mem:
 
 
 
1632    return 0;
1633}
1634
1635static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1636{
1637    lmc_softc_t *sc = dev_to_sc(dev);
1638    unsigned long flags;
1639
 
 
1640    spin_lock_irqsave(&sc->lmc_lock, flags);
1641
1642    sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1643
1644    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1645
 
 
1646    return &sc->lmc_device->stats;
1647}
1648
1649static struct pci_driver lmc_driver = {
1650	.name		= "lmc",
1651	.id_table	= lmc_pci_tbl,
1652	.probe		= lmc_init_one,
1653	.remove		= lmc_remove_one,
1654};
1655
1656module_pci_driver(lmc_driver);
 
 
 
 
 
 
 
 
 
 
 
1657
1658unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1659{
1660    int i;
1661    int command = (0xf6 << 10) | (devaddr << 5) | regno;
1662    int retval = 0;
1663
 
 
1664    LMC_MII_SYNC (sc);
1665
 
 
1666    for (i = 15; i >= 0; i--)
1667    {
1668        int dataval = (command & (1 << i)) ? 0x20000 : 0;
1669
1670        LMC_CSR_WRITE (sc, csr_9, dataval);
1671        lmc_delay ();
1672        /* __SLOW_DOWN_IO; */
1673        LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1674        lmc_delay ();
1675        /* __SLOW_DOWN_IO; */
1676    }
1677
 
 
1678    for (i = 19; i > 0; i--)
1679    {
1680        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1681        lmc_delay ();
1682        /* __SLOW_DOWN_IO; */
1683        retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1684        LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1685        lmc_delay ();
1686        /* __SLOW_DOWN_IO; */
1687    }
1688
 
 
1689    return (retval >> 1) & 0xffff;
1690}
1691
1692void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1693{
1694    int i = 32;
1695    int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1696
 
 
1697    LMC_MII_SYNC (sc);
1698
1699    i = 31;
1700    while (i >= 0)
1701    {
1702        int datav;
1703
1704        if (command & (1 << i))
1705            datav = 0x20000;
1706        else
1707            datav = 0x00000;
1708
1709        LMC_CSR_WRITE (sc, csr_9, datav);
1710        lmc_delay ();
1711        /* __SLOW_DOWN_IO; */
1712        LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1713        lmc_delay ();
1714        /* __SLOW_DOWN_IO; */
1715        i--;
1716    }
1717
1718    i = 2;
1719    while (i > 0)
1720    {
1721        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1722        lmc_delay ();
1723        /* __SLOW_DOWN_IO; */
1724        LMC_CSR_WRITE (sc, csr_9, 0x50000);
1725        lmc_delay ();
1726        /* __SLOW_DOWN_IO; */
1727        i--;
1728    }
 
 
1729}
1730
1731static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1732{
1733    int i;
1734
 
 
1735    /* Initialize the receive rings and buffers. */
1736    sc->lmc_txfull = 0;
1737    sc->lmc_next_rx = 0;
1738    sc->lmc_next_tx = 0;
1739    sc->lmc_taint_rx = 0;
1740    sc->lmc_taint_tx = 0;
1741
1742    /*
1743     * Setup each one of the receiver buffers
1744     * allocate an skbuff for each one, setup the descriptor table
1745     * and point each buffer at the next one
1746     */
1747
1748    for (i = 0; i < LMC_RXDESCS; i++)
1749    {
1750        struct sk_buff *skb;
1751
1752        if (sc->lmc_rxq[i] == NULL)
1753        {
1754            skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1755            if(skb == NULL){
1756                printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1757                sc->failed_ring = 1;
1758                break;
1759            }
1760            else{
1761                sc->lmc_rxq[i] = skb;
1762            }
1763        }
1764        else
1765        {
1766            skb = sc->lmc_rxq[i];
1767        }
1768
1769        skb->dev = sc->lmc_device;
1770
1771        /* owned by 21140 */
1772        sc->lmc_rxring[i].status = 0x80000000;
1773
1774        /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1775        sc->lmc_rxring[i].length = skb_tailroom(skb);
1776
1777        /* use to be tail which is dumb since you're thinking why write
1778         * to the end of the packj,et but since there's nothing there tail == data
1779         */
1780        sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1781
1782        /* This is fair since the structure is static and we have the next address */
1783        sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1784
1785    }
1786
1787    /*
1788     * Sets end of ring
1789     */
1790    if (i != 0) {
1791        sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1792        sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1793    }
1794    LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1795
1796    /* Initialize the transmit rings and buffers */
1797    for (i = 0; i < LMC_TXDESCS; i++)
1798    {
1799        if (sc->lmc_txq[i] != NULL){		/* have buffer */
1800            dev_kfree_skb(sc->lmc_txq[i]);	/* free it */
1801	    sc->lmc_device->stats.tx_dropped++;	/* We just dropped a packet */
1802        }
1803        sc->lmc_txq[i] = NULL;
1804        sc->lmc_txring[i].status = 0x00000000;
1805        sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1806    }
1807    sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1808    LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
 
 
1809}
1810
1811void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1812{
 
1813    sc->lmc_gpio_io &= ~bits;
1814    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
 
1815}
1816
1817void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1818{
 
1819    sc->lmc_gpio_io |= bits;
1820    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
 
1821}
1822
1823void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1824{
1825    if ((~sc->lmc_miireg16) & led) /* Already on! */
 
 
1826        return;
1827
 
1828    sc->lmc_miireg16 &= ~led;
1829    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 
1830}
1831
1832void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1833{
1834    if (sc->lmc_miireg16 & led) /* Already set don't do anything */
 
 
1835        return;
1836
 
1837    sc->lmc_miireg16 |= led;
1838    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 
1839}
1840
1841static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1842{
 
1843    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1844    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1845
1846    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1847    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1848
1849    /*
1850     * make some of the GPIO pins be outputs
1851     */
1852    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1853
1854    /*
1855     * RESET low to force state reset.  This also forces
1856     * the transmitter clock to be internal, but we expect to reset
1857     * that later anyway.
1858     */
1859    sc->lmc_gpio &= ~(LMC_GEP_RESET);
1860    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1861
1862    /*
1863     * hold for more than 10 microseconds
1864     */
1865    udelay(50);
1866
1867    /*
1868     * stop driving Xilinx-related signals
1869     */
1870    lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1871
1872    /*
1873     * Call media specific init routine
1874     */
1875    sc->lmc_media->init(sc);
1876
1877    sc->extra_stats.resetCount++;
 
1878}
1879
1880static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1881{
1882    u32 val;
 
1883
1884    /*
1885     * disable all interrupts
1886     */
1887    sc->lmc_intrmask = 0;
1888    LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
1889
1890    /*
1891     * Reset the chip with a software reset command.
1892     * Wait 10 microseconds (actually 50 PCI cycles but at
1893     * 33MHz that comes to two microseconds but wait a
1894     * bit longer anyways)
1895     */
1896    LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
1897    udelay(25);
1898#ifdef __sparc__
1899    sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
1900    sc->lmc_busmode = 0x00100000;
1901    sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
1902    LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
1903#endif
1904    sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
1905
1906    /*
1907     * We want:
1908     *   no ethernet address in frames we write
1909     *   disable padding (txdesc, padding disable)
1910     *   ignore runt frames (rdes0 bit 15)
1911     *   no receiver watchdog or transmitter jabber timer
1912     *       (csr15 bit 0,14 == 1)
1913     *   if using 16-bit CRC, turn off CRC (trans desc, crc disable)
1914     */
1915
1916    sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
1917                         | TULIP_CMD_FULLDUPLEX
1918                         | TULIP_CMD_PASSBADPKT
1919                         | TULIP_CMD_NOHEARTBEAT
1920                         | TULIP_CMD_PORTSELECT
1921                         | TULIP_CMD_RECEIVEALL
1922                         | TULIP_CMD_MUSTBEONE
1923                       );
1924    sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
1925                          | TULIP_CMD_THRESHOLDCTL
1926                          | TULIP_CMD_STOREFWD
1927                          | TULIP_CMD_TXTHRSHLDCTL
1928                        );
1929
1930    LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
1931
1932    /*
1933     * disable receiver watchdog and transmit jabber
1934     */
1935    val = LMC_CSR_READ(sc, csr_sia_general);
1936    val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
1937    LMC_CSR_WRITE(sc, csr_sia_general, val);
 
 
1938}
1939
1940static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
1941                         size_t csr_size)
1942{
 
1943    sc->lmc_csrs.csr_busmode	        = csr_base +  0 * csr_size;
1944    sc->lmc_csrs.csr_txpoll		= csr_base +  1 * csr_size;
1945    sc->lmc_csrs.csr_rxpoll		= csr_base +  2 * csr_size;
1946    sc->lmc_csrs.csr_rxlist		= csr_base +  3 * csr_size;
1947    sc->lmc_csrs.csr_txlist		= csr_base +  4 * csr_size;
1948    sc->lmc_csrs.csr_status		= csr_base +  5 * csr_size;
1949    sc->lmc_csrs.csr_command	        = csr_base +  6 * csr_size;
1950    sc->lmc_csrs.csr_intr		= csr_base +  7 * csr_size;
1951    sc->lmc_csrs.csr_missed_frames	= csr_base +  8 * csr_size;
1952    sc->lmc_csrs.csr_9		        = csr_base +  9 * csr_size;
1953    sc->lmc_csrs.csr_10		        = csr_base + 10 * csr_size;
1954    sc->lmc_csrs.csr_11		        = csr_base + 11 * csr_size;
1955    sc->lmc_csrs.csr_12		        = csr_base + 12 * csr_size;
1956    sc->lmc_csrs.csr_13		        = csr_base + 13 * csr_size;
1957    sc->lmc_csrs.csr_14		        = csr_base + 14 * csr_size;
1958    sc->lmc_csrs.csr_15		        = csr_base + 15 * csr_size;
 
1959}
1960
1961static void lmc_driver_timeout(struct net_device *dev, unsigned int txqueue)
1962{
1963    lmc_softc_t *sc = dev_to_sc(dev);
1964    u32 csr6;
1965    unsigned long flags;
1966
 
 
1967    spin_lock_irqsave(&sc->lmc_lock, flags);
1968
1969    printk("%s: Xmitter busy|\n", dev->name);
1970
1971    sc->extra_stats.tx_tbusy_calls++;
1972    if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
1973	    goto bug_out;
1974
1975    /*
1976     * Chip seems to have locked up
1977     * Reset it
1978     * This whips out all our descriptor
1979     * table and starts from scartch
1980     */
1981
1982    LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
1983                  LMC_CSR_READ (sc, csr_status),
1984		  sc->extra_stats.tx_ProcTimeout);
1985
1986    lmc_running_reset (dev);
1987
1988    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1989    LMC_EVENT_LOG(LMC_EVENT_RESET2,
1990                  lmc_mii_readreg (sc, 0, 16),
1991                  lmc_mii_readreg (sc, 0, 17));
1992
1993    /* restart the tx processes */
1994    csr6 = LMC_CSR_READ (sc, csr_command);
1995    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
1996    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
1997
1998    /* immediate transmit */
1999    LMC_CSR_WRITE (sc, csr_txpoll, 0);
2000
2001    sc->lmc_device->stats.tx_errors++;
2002    sc->extra_stats.tx_ProcTimeout++; /* -baz */
2003
2004    netif_trans_update(dev); /* prevent tx timeout */
2005
2006bug_out:
2007
2008    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 
 
 
 
2009}