1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * PTP 1588 clock using the IXP46X
  4 *
  5 * Copyright (C) 2010 OMICRON electronics GmbH
  6 */
  7#include <linux/device.h>
  8#include <linux/err.h>
  9#include <linux/gpio.h>
 10#include <linux/init.h>
 11#include <linux/interrupt.h>
 12#include <linux/io.h>
 13#include <linux/irq.h>
 14#include <linux/kernel.h>
 15#include <linux/ptp_clock_kernel.h>
 16#include <linux/soc/ixp4xx/cpu.h>
 17#include <linux/module.h>
 18#include <mach/ixp4xx-regs.h>
 19
 20#include "ixp46x_ts.h"
 21
 22#define DRIVER		"ptp_ixp46x"
 23#define N_EXT_TS	2
 24#define MASTER_GPIO	8
 25#define MASTER_IRQ	25
 26#define SLAVE_GPIO	7
 27#define SLAVE_IRQ	24
 28
 29struct ixp_clock {
 30	struct ixp46x_ts_regs *regs;
 31	struct ptp_clock *ptp_clock;
 32	struct ptp_clock_info caps;
 33	int exts0_enabled;
 34	int exts1_enabled;
 35};
 36
 37DEFINE_SPINLOCK(register_lock);
 38
 39/*
 40 * Register access functions
 41 */
 42
 43static u64 ixp_systime_read(struct ixp46x_ts_regs *regs)
 44{
 45	u64 ns;
 46	u32 lo, hi;
 47
 48	lo = __raw_readl(&regs->systime_lo);
 49	hi = __raw_readl(&regs->systime_hi);
 50
 51	ns = ((u64) hi) << 32;
 52	ns |= lo;
 53	ns <<= TICKS_NS_SHIFT;
 54
 55	return ns;
 56}
 57
 58static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns)
 59{
 60	u32 hi, lo;
 61
 62	ns >>= TICKS_NS_SHIFT;
 63	hi = ns >> 32;
 64	lo = ns & 0xffffffff;
 65
 66	__raw_writel(lo, &regs->systime_lo);
 67	__raw_writel(hi, &regs->systime_hi);
 68}
 69
 70/*
 71 * Interrupt service routine
 72 */
 73
 74static irqreturn_t isr(int irq, void *priv)
 75{
 76	struct ixp_clock *ixp_clock = priv;
 77	struct ixp46x_ts_regs *regs = ixp_clock->regs;
 78	struct ptp_clock_event event;
 79	u32 ack = 0, lo, hi, val;
 80
 81	val = __raw_readl(&regs->event);
 82
 83	if (val & TSER_SNS) {
 84		ack |= TSER_SNS;
 85		if (ixp_clock->exts0_enabled) {
 86			hi = __raw_readl(&regs->asms_hi);
 87			lo = __raw_readl(&regs->asms_lo);
 88			event.type = PTP_CLOCK_EXTTS;
 89			event.index = 0;
 90			event.timestamp = ((u64) hi) << 32;
 91			event.timestamp |= lo;
 92			event.timestamp <<= TICKS_NS_SHIFT;
 93			ptp_clock_event(ixp_clock->ptp_clock, &event);
 94		}
 95	}
 96
 97	if (val & TSER_SNM) {
 98		ack |= TSER_SNM;
 99		if (ixp_clock->exts1_enabled) {
100			hi = __raw_readl(&regs->amms_hi);
101			lo = __raw_readl(&regs->amms_lo);
102			event.type = PTP_CLOCK_EXTTS;
103			event.index = 1;
104			event.timestamp = ((u64) hi) << 32;
105			event.timestamp |= lo;
106			event.timestamp <<= TICKS_NS_SHIFT;
107			ptp_clock_event(ixp_clock->ptp_clock, &event);
108		}
109	}
110
111	if (val & TTIPEND)
112		ack |= TTIPEND; /* this bit seems to be always set */
113
114	if (ack) {
115		__raw_writel(ack, &regs->event);
116		return IRQ_HANDLED;
117	} else
118		return IRQ_NONE;
119}
120
121/*
122 * PTP clock operations
123 */
124
125static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
126{
127	u64 adj;
128	u32 diff, addend;
129	int neg_adj = 0;
130	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
131	struct ixp46x_ts_regs *regs = ixp_clock->regs;
132
133	if (ppb < 0) {
134		neg_adj = 1;
135		ppb = -ppb;
136	}
137	addend = DEFAULT_ADDEND;
138	adj = addend;
139	adj *= ppb;
140	diff = div_u64(adj, 1000000000ULL);
141
142	addend = neg_adj ? addend - diff : addend + diff;
143
144	__raw_writel(addend, &regs->addend);
145
146	return 0;
147}
148
149static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta)
150{
151	s64 now;
152	unsigned long flags;
153	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
154	struct ixp46x_ts_regs *regs = ixp_clock->regs;
155
156	spin_lock_irqsave(&register_lock, flags);
157
158	now = ixp_systime_read(regs);
159	now += delta;
160	ixp_systime_write(regs, now);
161
162	spin_unlock_irqrestore(&register_lock, flags);
163
164	return 0;
165}
166
167static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
168{
169	u64 ns;
170	unsigned long flags;
171	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
172	struct ixp46x_ts_regs *regs = ixp_clock->regs;
173
174	spin_lock_irqsave(&register_lock, flags);
175
176	ns = ixp_systime_read(regs);
177
178	spin_unlock_irqrestore(&register_lock, flags);
179
180	*ts = ns_to_timespec64(ns);
181	return 0;
182}
183
184static int ptp_ixp_settime(struct ptp_clock_info *ptp,
185			   const struct timespec64 *ts)
186{
187	u64 ns;
188	unsigned long flags;
189	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
190	struct ixp46x_ts_regs *regs = ixp_clock->regs;
191
192	ns = timespec64_to_ns(ts);
193
194	spin_lock_irqsave(&register_lock, flags);
195
196	ixp_systime_write(regs, ns);
197
198	spin_unlock_irqrestore(&register_lock, flags);
199
200	return 0;
201}
202
203static int ptp_ixp_enable(struct ptp_clock_info *ptp,
204			  struct ptp_clock_request *rq, int on)
205{
206	struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
207
208	switch (rq->type) {
209	case PTP_CLK_REQ_EXTTS:
210		switch (rq->extts.index) {
211		case 0:
212			ixp_clock->exts0_enabled = on ? 1 : 0;
213			break;
214		case 1:
215			ixp_clock->exts1_enabled = on ? 1 : 0;
216			break;
217		default:
218			return -EINVAL;
219		}
220		return 0;
221	default:
222		break;
223	}
224
225	return -EOPNOTSUPP;
226}
227
228static const struct ptp_clock_info ptp_ixp_caps = {
229	.owner		= THIS_MODULE,
230	.name		= "IXP46X timer",
231	.max_adj	= 66666655,
232	.n_ext_ts	= N_EXT_TS,
233	.n_pins		= 0,
234	.pps		= 0,
235	.adjfreq	= ptp_ixp_adjfreq,
236	.adjtime	= ptp_ixp_adjtime,
237	.gettime64	= ptp_ixp_gettime,
238	.settime64	= ptp_ixp_settime,
239	.enable		= ptp_ixp_enable,
240};
241
242/* module operations */
243
244static struct ixp_clock ixp_clock;
245
246static int setup_interrupt(int gpio)
247{
248	int irq;
249	int err;
250
251	err = gpio_request(gpio, "ixp4-ptp");
252	if (err)
253		return err;
254
255	err = gpio_direction_input(gpio);
256	if (err)
257		return err;
258
259	irq = gpio_to_irq(gpio);
260	if (irq < 0)
261		return irq;
262
263	err = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
264	if (err) {
265		pr_err("cannot set trigger type for irq %d\n", irq);
266		return err;
267	}
268
269	err = request_irq(irq, isr, 0, DRIVER, &ixp_clock);
270	if (err) {
271		pr_err("request_irq failed for irq %d\n", irq);
272		return err;
273	}
274
275	return irq;
276}
277
278static void __exit ptp_ixp_exit(void)
279{
280	free_irq(MASTER_IRQ, &ixp_clock);
281	free_irq(SLAVE_IRQ, &ixp_clock);
282	ixp46x_phc_index = -1;
283	ptp_clock_unregister(ixp_clock.ptp_clock);
284}
285
286static int __init ptp_ixp_init(void)
287{
288	if (!cpu_is_ixp46x())
289		return -ENODEV;
290
291	ixp_clock.regs =
292		(struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
293
294	ixp_clock.caps = ptp_ixp_caps;
295
296	ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL);
297
298	if (IS_ERR(ixp_clock.ptp_clock))
299		return PTR_ERR(ixp_clock.ptp_clock);
300
301	ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock);
302
303	__raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
304	__raw_writel(1, &ixp_clock.regs->trgt_lo);
305	__raw_writel(0, &ixp_clock.regs->trgt_hi);
306	__raw_writel(TTIPEND, &ixp_clock.regs->event);
307
308	if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) {
309		pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO);
310		goto no_master;
311	}
312	if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) {
313		pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO);
314		goto no_slave;
315	}
316
317	return 0;
318no_slave:
319	free_irq(MASTER_IRQ, &ixp_clock);
320no_master:
321	ptp_clock_unregister(ixp_clock.ptp_clock);
322	return -ENODEV;
323}
324
325module_init(ptp_ixp_init);
326module_exit(ptp_ixp_exit);
327
328MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
329MODULE_DESCRIPTION("PTP clock using the IXP46X timer");
330MODULE_LICENSE("GPL");