1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Tegra host1x Channel
  4 *
  5 * Copyright (c) 2010-2013, NVIDIA Corporation.
  6 */
  7
  8#include <linux/host1x.h>
  9#include <linux/iommu.h>
 10#include <linux/slab.h>
 11
 12#include <trace/events/host1x.h>
 13
 14#include "../channel.h"
 15#include "../dev.h"
 16#include "../intr.h"
 17#include "../job.h"
 18
 19#define TRACE_MAX_LENGTH 128U
 20
 21static void trace_write_gather(struct host1x_cdma *cdma, struct host1x_bo *bo,
 22			       u32 offset, u32 words)
 23{
 24	struct device *dev = cdma_to_channel(cdma)->dev;
 25	void *mem = NULL;
 26
 27	if (host1x_debug_trace_cmdbuf)
 28		mem = host1x_bo_mmap(bo);
 29
 30	if (mem) {
 31		u32 i;
 32		/*
 33		 * Write in batches of 128 as there seems to be a limit
 34		 * of how much you can output to ftrace at once.
 35		 */
 36		for (i = 0; i < words; i += TRACE_MAX_LENGTH) {
 37			u32 num_words = min(words - i, TRACE_MAX_LENGTH);
 38
 39			offset += i * sizeof(u32);
 40
 41			trace_host1x_cdma_push_gather(dev_name(dev), bo,
 42						      num_words, offset,
 43						      mem);
 44		}
 45
 46		host1x_bo_munmap(bo, mem);
 47	}
 48}
 49
 50static void submit_gathers(struct host1x_job *job)
 51{
 52	struct host1x_cdma *cdma = &job->channel->cdma;
 53#if HOST1X_HW < 6
 54	struct device *dev = job->channel->dev;
 55#endif
 56	unsigned int i;
 57
 58	for (i = 0; i < job->num_gathers; i++) {
 59		struct host1x_job_gather *g = &job->gathers[i];
 60		dma_addr_t addr = g->base + g->offset;
 61		u32 op2, op3;
 62
 63		op2 = lower_32_bits(addr);
 64		op3 = upper_32_bits(addr);
 65
 66		trace_write_gather(cdma, g->bo, g->offset, g->words);
 67
 68		if (op3 != 0) {
 69#if HOST1X_HW >= 6
 70			u32 op1 = host1x_opcode_gather_wide(g->words);
 71			u32 op4 = HOST1X_OPCODE_NOP;
 72
 73			host1x_cdma_push_wide(cdma, op1, op2, op3, op4);
 74#else
 75			dev_err(dev, "invalid gather for push buffer %pad\n",
 76				&addr);
 77			continue;
 78#endif
 79		} else {
 80			u32 op1 = host1x_opcode_gather(g->words);
 81
 82			host1x_cdma_push(cdma, op1, op2);
 83		}
 84	}
 85}
 86
 87static inline void synchronize_syncpt_base(struct host1x_job *job)
 88{
 89	struct host1x_syncpt *sp = job->syncpt;
 90	unsigned int id;
 91	u32 value;
 92
 93	value = host1x_syncpt_read_max(sp);
 94	id = sp->base->id;
 95
 96	host1x_cdma_push(&job->channel->cdma,
 97			 host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
 98				HOST1X_UCLASS_LOAD_SYNCPT_BASE, 1),
 99			 HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(id) |
100			 HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(value));
101}
102
103static void host1x_channel_set_streamid(struct host1x_channel *channel)
104{
105#if HOST1X_HW >= 6
106	u32 sid = 0x7f;
107#ifdef CONFIG_IOMMU_API
108	struct iommu_fwspec *spec = dev_iommu_fwspec_get(channel->dev->parent);
109	if (spec)
110		sid = spec->ids[0] & 0xffff;
111#endif
112
113	host1x_ch_writel(channel, sid, HOST1X_CHANNEL_SMMU_STREAMID);
114#endif
115}
116
117static int channel_submit(struct host1x_job *job)
118{
119	struct host1x_channel *ch = job->channel;
120	struct host1x_syncpt *sp = job->syncpt;
121	u32 user_syncpt_incrs = job->syncpt_incrs;
122	u32 prev_max = 0;
123	u32 syncval;
124	int err;
125	struct host1x_waitlist *completed_waiter = NULL;
126	struct host1x *host = dev_get_drvdata(ch->dev->parent);
127
128	trace_host1x_channel_submit(dev_name(ch->dev),
129				    job->num_gathers, job->num_relocs,
130				    job->syncpt->id, job->syncpt_incrs);
131
132	/* before error checks, return current max */
133	prev_max = job->syncpt_end = host1x_syncpt_read_max(sp);
134
135	/* get submit lock */
136	err = mutex_lock_interruptible(&ch->submitlock);
137	if (err)
138		goto error;
139
140	completed_waiter = kzalloc(sizeof(*completed_waiter), GFP_KERNEL);
141	if (!completed_waiter) {
142		mutex_unlock(&ch->submitlock);
143		err = -ENOMEM;
144		goto error;
145	}
146
147	host1x_channel_set_streamid(ch);
148
149	/* begin a CDMA submit */
150	err = host1x_cdma_begin(&ch->cdma, job);
151	if (err) {
152		mutex_unlock(&ch->submitlock);
153		goto error;
154	}
155
156	if (job->serialize) {
157		/*
158		 * Force serialization by inserting a host wait for the
159		 * previous job to finish before this one can commence.
160		 */
161		host1x_cdma_push(&ch->cdma,
162				 host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
163					host1x_uclass_wait_syncpt_r(), 1),
164				 host1x_class_host_wait_syncpt(job->syncpt->id,
165					host1x_syncpt_read_max(sp)));
166	}
167
168	/* Synchronize base register to allow using it for relative waiting */
169	if (sp->base)
170		synchronize_syncpt_base(job);
171
172	syncval = host1x_syncpt_incr_max(sp, user_syncpt_incrs);
173
174	host1x_hw_syncpt_assign_to_channel(host, sp, ch);
175
176	job->syncpt_end = syncval;
177
178	/* add a setclass for modules that require it */
179	if (job->class)
180		host1x_cdma_push(&ch->cdma,
181				 host1x_opcode_setclass(job->class, 0, 0),
182				 HOST1X_OPCODE_NOP);
183
184	submit_gathers(job);
185
186	/* end CDMA submit & stash pinned hMems into sync queue */
187	host1x_cdma_end(&ch->cdma, job);
188
189	trace_host1x_channel_submitted(dev_name(ch->dev), prev_max, syncval);
190
191	/* schedule a submit complete interrupt */
192	err = host1x_intr_add_action(host, sp, syncval,
193				     HOST1X_INTR_ACTION_SUBMIT_COMPLETE, ch,
194				     completed_waiter, NULL);
195	completed_waiter = NULL;
196	WARN(err, "Failed to set submit complete interrupt");
197
198	mutex_unlock(&ch->submitlock);
199
200	return 0;
201
202error:
203	kfree(completed_waiter);
204	return err;
205}
206
207static void enable_gather_filter(struct host1x *host,
208				 struct host1x_channel *ch)
209{
210#if HOST1X_HW >= 6
211	u32 val;
212
213	if (!host->hv_regs)
214		return;
215
216	val = host1x_hypervisor_readl(
217		host, HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(ch->id / 32));
218	val |= BIT(ch->id % 32);
219	host1x_hypervisor_writel(
220		host, val, HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(ch->id / 32));
221#elif HOST1X_HW >= 4
222	host1x_ch_writel(ch,
223			 HOST1X_CHANNEL_CHANNELCTRL_KERNEL_FILTER_GBUFFER(1),
224			 HOST1X_CHANNEL_CHANNELCTRL);
225#endif
226}
227
228static int host1x_channel_init(struct host1x_channel *ch, struct host1x *dev,
229			       unsigned int index)
230{
231#if HOST1X_HW < 6
232	ch->regs = dev->regs + index * 0x4000;
233#else
234	ch->regs = dev->regs + index * 0x100;
235#endif
236	enable_gather_filter(dev, ch);
237	return 0;
238}
239
240static const struct host1x_channel_ops host1x_channel_ops = {
241	.init = host1x_channel_init,
242	.submit = channel_submit,
243};