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1// SPDX-License-Identifier: GPL-2.0+
2// Copyright 2018 IBM Corporation
3
4#include <linux/clk.h>
5#include <linux/dma-mapping.h>
6#include <linux/irq.h>
7#include <linux/mfd/syscon.h>
8#include <linux/module.h>
9#include <linux/of.h>
10#include <linux/of_device.h>
11#include <linux/of_reserved_mem.h>
12#include <linux/platform_device.h>
13#include <linux/regmap.h>
14#include <linux/reset.h>
15
16#include <drm/drm_atomic_helper.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_device.h>
19#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_fb_helper.h>
21#include <drm/drm_gem_cma_helper.h>
22#include <drm/drm_gem_framebuffer_helper.h>
23#include <drm/drm_probe_helper.h>
24#include <drm/drm_simple_kms_helper.h>
25#include <drm/drm_vblank.h>
26#include <drm/drm_drv.h>
27
28#include "aspeed_gfx.h"
29
30/**
31 * DOC: ASPEED GFX Driver
32 *
33 * This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called
34 * the 'SOC Display Controller' in the datasheet. This driver runs on the ARM
35 * based BMC systems, unlike the ast driver which runs on a host CPU and is for
36 * a PCIe graphics device.
37 *
38 * The AST2500 supports a total of 3 output paths:
39 *
40 * 1. VGA output, the output target can choose either or both to the DAC
41 * or DVO interface.
42 *
43 * 2. Graphics CRT output, the output target can choose either or both to
44 * the DAC or DVO interface.
45 *
46 * 3. Video input from DVO, the video input can be used for video engine
47 * capture or DAC display output.
48 *
49 * Output options are selected in SCU2C.
50 *
51 * The "VGA mode" device is the PCI attached controller. The "Graphics CRT"
52 * is the ARM's internal display controller.
53 *
54 * The driver only supports a simple configuration consisting of a 40MHz
55 * pixel clock, fixed by hardware limitations, and the VGA output path.
56 *
57 * The driver was written with the 'AST2500 Software Programming Guide' v17,
58 * which is available under NDA from ASPEED.
59 */
60
61struct aspeed_gfx_config {
62 u32 dac_reg; /* DAC register in SCU */
63 u32 vga_scratch_reg; /* VGA scratch register in SCU */
64 u32 throd_val; /* Default Threshold Seting */
65 u32 scan_line_max; /* Max memory size of one scan line */
66};
67
68static const struct aspeed_gfx_config ast2400_config = {
69 .dac_reg = 0x2c,
70 .vga_scratch_reg = 0x50,
71 .throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),
72 .scan_line_max = 64,
73};
74
75static const struct aspeed_gfx_config ast2500_config = {
76 .dac_reg = 0x2c,
77 .vga_scratch_reg = 0x50,
78 .throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),
79 .scan_line_max = 128,
80};
81
82static const struct of_device_id aspeed_gfx_match[] = {
83 { .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },
84 { .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },
85 { },
86};
87MODULE_DEVICE_TABLE(of, aspeed_gfx_match);
88
89static const struct drm_mode_config_funcs aspeed_gfx_mode_config_funcs = {
90 .fb_create = drm_gem_fb_create,
91 .atomic_check = drm_atomic_helper_check,
92 .atomic_commit = drm_atomic_helper_commit,
93};
94
95static int aspeed_gfx_setup_mode_config(struct drm_device *drm)
96{
97 int ret;
98
99 ret = drmm_mode_config_init(drm);
100 if (ret)
101 return ret;
102
103 drm->mode_config.min_width = 0;
104 drm->mode_config.min_height = 0;
105 drm->mode_config.max_width = 800;
106 drm->mode_config.max_height = 600;
107 drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;
108
109 return ret;
110}
111
112static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
113{
114 struct drm_device *drm = data;
115 struct aspeed_gfx *priv = to_aspeed_gfx(drm);
116 u32 reg;
117
118 reg = readl(priv->base + CRT_CTRL1);
119
120 if (reg & CRT_CTRL_VERTICAL_INTR_STS) {
121 drm_crtc_handle_vblank(&priv->pipe.crtc);
122 writel(reg, priv->base + CRT_CTRL1);
123 return IRQ_HANDLED;
124 }
125
126 return IRQ_NONE;
127}
128
129static int aspeed_gfx_load(struct drm_device *drm)
130{
131 struct platform_device *pdev = to_platform_device(drm->dev);
132 struct aspeed_gfx *priv = to_aspeed_gfx(drm);
133 struct device_node *np = pdev->dev.of_node;
134 const struct aspeed_gfx_config *config;
135 const struct of_device_id *match;
136 struct resource *res;
137 int ret;
138
139 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
140 priv->base = devm_ioremap_resource(drm->dev, res);
141 if (IS_ERR(priv->base))
142 return PTR_ERR(priv->base);
143
144 match = of_match_device(aspeed_gfx_match, &pdev->dev);
145 if (!match)
146 return -EINVAL;
147 config = match->data;
148
149 priv->dac_reg = config->dac_reg;
150 priv->vga_scratch_reg = config->vga_scratch_reg;
151 priv->throd_val = config->throd_val;
152 priv->scan_line_max = config->scan_line_max;
153
154 priv->scu = syscon_regmap_lookup_by_phandle(np, "syscon");
155 if (IS_ERR(priv->scu)) {
156 priv->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu");
157 if (IS_ERR(priv->scu)) {
158 dev_err(&pdev->dev, "failed to find SCU regmap\n");
159 return PTR_ERR(priv->scu);
160 }
161 }
162
163 ret = of_reserved_mem_device_init(drm->dev);
164 if (ret) {
165 dev_err(&pdev->dev,
166 "failed to initialize reserved mem: %d\n", ret);
167 return ret;
168 }
169
170 ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
171 if (ret) {
172 dev_err(&pdev->dev, "failed to set DMA mask: %d\n", ret);
173 return ret;
174 }
175
176 priv->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
177 if (IS_ERR(priv->rst)) {
178 dev_err(&pdev->dev,
179 "missing or invalid reset controller device tree entry");
180 return PTR_ERR(priv->rst);
181 }
182 reset_control_deassert(priv->rst);
183
184 priv->clk = devm_clk_get(drm->dev, NULL);
185 if (IS_ERR(priv->clk)) {
186 dev_err(&pdev->dev,
187 "missing or invalid clk device tree entry");
188 return PTR_ERR(priv->clk);
189 }
190 clk_prepare_enable(priv->clk);
191
192 /* Sanitize control registers */
193 writel(0, priv->base + CRT_CTRL1);
194 writel(0, priv->base + CRT_CTRL2);
195
196 ret = aspeed_gfx_setup_mode_config(drm);
197 if (ret < 0)
198 return ret;
199
200 ret = drm_vblank_init(drm, 1);
201 if (ret < 0) {
202 dev_err(drm->dev, "Failed to initialise vblank\n");
203 return ret;
204 }
205
206 ret = aspeed_gfx_create_output(drm);
207 if (ret < 0) {
208 dev_err(drm->dev, "Failed to create outputs\n");
209 return ret;
210 }
211
212 ret = aspeed_gfx_create_pipe(drm);
213 if (ret < 0) {
214 dev_err(drm->dev, "Cannot setup simple display pipe\n");
215 return ret;
216 }
217
218 ret = devm_request_irq(drm->dev, platform_get_irq(pdev, 0),
219 aspeed_gfx_irq_handler, 0, "aspeed gfx", drm);
220 if (ret < 0) {
221 dev_err(drm->dev, "Failed to install IRQ handler\n");
222 return ret;
223 }
224
225 drm_mode_config_reset(drm);
226
227 return 0;
228}
229
230static void aspeed_gfx_unload(struct drm_device *drm)
231{
232 drm_kms_helper_poll_fini(drm);
233}
234
235DEFINE_DRM_GEM_CMA_FOPS(fops);
236
237static const struct drm_driver aspeed_gfx_driver = {
238 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
239 DRM_GEM_CMA_DRIVER_OPS,
240 .fops = &fops,
241 .name = "aspeed-gfx-drm",
242 .desc = "ASPEED GFX DRM",
243 .date = "20180319",
244 .major = 1,
245 .minor = 0,
246};
247
248static ssize_t dac_mux_store(struct device *dev, struct device_attribute *attr,
249 const char *buf, size_t count)
250{
251 struct aspeed_gfx *priv = dev_get_drvdata(dev);
252 u32 val;
253 int rc;
254
255 rc = kstrtou32(buf, 0, &val);
256 if (rc)
257 return rc;
258
259 if (val > 3)
260 return -EINVAL;
261
262 rc = regmap_update_bits(priv->scu, priv->dac_reg, 0x30000, val << 16);
263 if (rc < 0)
264 return 0;
265
266 return count;
267}
268
269static ssize_t dac_mux_show(struct device *dev, struct device_attribute *attr, char *buf)
270{
271 struct aspeed_gfx *priv = dev_get_drvdata(dev);
272 u32 reg;
273 int rc;
274
275 rc = regmap_read(priv->scu, priv->dac_reg, ®);
276 if (rc)
277 return rc;
278
279 return sprintf(buf, "%u\n", (reg >> 16) & 0x3);
280}
281static DEVICE_ATTR_RW(dac_mux);
282
283static ssize_t
284vga_pw_show(struct device *dev, struct device_attribute *attr, char *buf)
285{
286 struct aspeed_gfx *priv = dev_get_drvdata(dev);
287 u32 reg;
288 int rc;
289
290 rc = regmap_read(priv->scu, priv->vga_scratch_reg, ®);
291 if (rc)
292 return rc;
293
294 return sprintf(buf, "%u\n", reg & 1);
295}
296static DEVICE_ATTR_RO(vga_pw);
297
298static struct attribute *aspeed_sysfs_entries[] = {
299 &dev_attr_vga_pw.attr,
300 &dev_attr_dac_mux.attr,
301 NULL,
302};
303
304static struct attribute_group aspeed_sysfs_attr_group = {
305 .attrs = aspeed_sysfs_entries,
306};
307
308static int aspeed_gfx_probe(struct platform_device *pdev)
309{
310 struct aspeed_gfx *priv;
311 int ret;
312
313 priv = devm_drm_dev_alloc(&pdev->dev, &aspeed_gfx_driver,
314 struct aspeed_gfx, drm);
315 if (IS_ERR(priv))
316 return PTR_ERR(priv);
317
318 ret = aspeed_gfx_load(&priv->drm);
319 if (ret)
320 return ret;
321
322 platform_set_drvdata(pdev, priv);
323
324 ret = sysfs_create_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
325 if (ret)
326 return ret;
327
328 ret = drm_dev_register(&priv->drm, 0);
329 if (ret)
330 goto err_unload;
331
332 drm_fbdev_generic_setup(&priv->drm, 32);
333 return 0;
334
335err_unload:
336 sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
337 aspeed_gfx_unload(&priv->drm);
338
339 return ret;
340}
341
342static int aspeed_gfx_remove(struct platform_device *pdev)
343{
344 struct drm_device *drm = platform_get_drvdata(pdev);
345
346 sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
347 drm_dev_unregister(drm);
348 aspeed_gfx_unload(drm);
349
350 return 0;
351}
352
353static struct platform_driver aspeed_gfx_platform_driver = {
354 .probe = aspeed_gfx_probe,
355 .remove = aspeed_gfx_remove,
356 .driver = {
357 .name = "aspeed_gfx",
358 .of_match_table = aspeed_gfx_match,
359 },
360};
361
362module_platform_driver(aspeed_gfx_platform_driver);
363
364MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
365MODULE_DESCRIPTION("ASPEED BMC DRM/KMS driver");
366MODULE_LICENSE("GPL");