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v3.1
  1/*
  2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
  3 *
  4 *  For licencing details see kernel-base/COPYING
  5 */
  6#include <linux/init.h>
  7#include <linux/ioport.h>
  8#include <linux/module.h>
  9#include <linux/pci.h>
 10
 
 11#include <asm/bios_ebda.h>
 12#include <asm/paravirt.h>
 13#include <asm/pci_x86.h>
 14#include <asm/pci.h>
 15#include <asm/mpspec.h>
 16#include <asm/setup.h>
 17#include <asm/apic.h>
 18#include <asm/e820.h>
 19#include <asm/time.h>
 20#include <asm/irq.h>
 21#include <asm/pat.h>
 
 
 22#include <asm/tsc.h>
 23#include <asm/iommu.h>
 
 
 24
 25void __cpuinit x86_init_noop(void) { }
 26void __init x86_init_uint_noop(unsigned int unused) { }
 27void __init x86_init_pgd_noop(pgd_t *unused) { }
 28int __init iommu_init_noop(void) { return 0; }
 29void iommu_shutdown_noop(void) { }
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 30
 31/*
 32 * The platform setup functions are preset with the default functions
 33 * for standard PC hardware.
 34 */
 35struct x86_init_ops x86_init __initdata = {
 36
 37	.resources = {
 38		.probe_roms		= probe_roms,
 39		.reserve_resources	= reserve_standard_io_resources,
 40		.memory_setup		= default_machine_specific_memory_setup,
 41	},
 42
 43	.mpparse = {
 44		.mpc_record		= x86_init_uint_noop,
 45		.setup_ioapic_ids	= x86_init_noop,
 46		.mpc_apic_id		= default_mpc_apic_id,
 47		.smp_read_mpc_oem	= default_smp_read_mpc_oem,
 48		.mpc_oem_bus_info	= default_mpc_oem_bus_info,
 49		.find_smp_config	= default_find_smp_config,
 50		.get_smp_config		= default_get_smp_config,
 51	},
 52
 53	.irqs = {
 54		.pre_vector_init	= init_ISA_irqs,
 55		.intr_init		= native_init_IRQ,
 56		.trap_init		= x86_init_noop,
 
 
 57	},
 58
 59	.oem = {
 60		.arch_setup		= x86_init_noop,
 61		.banner			= default_banner,
 62	},
 63
 64	.mapping = {
 65		.pagetable_reserve		= native_pagetable_reserve,
 66	},
 67
 68	.paging = {
 69		.pagetable_setup_start	= native_pagetable_setup_start,
 70		.pagetable_setup_done	= native_pagetable_setup_done,
 71	},
 72
 73	.timers = {
 74		.setup_percpu_clockev	= setup_boot_APIC_clock,
 75		.tsc_pre_init		= x86_init_noop,
 76		.timer_init		= hpet_time_init,
 77		.wallclock_init		= x86_init_noop,
 78	},
 79
 80	.iommu = {
 81		.iommu_init		= iommu_init_noop,
 82	},
 83
 84	.pci = {
 85		.init			= x86_default_pci_init,
 86		.init_irq		= x86_default_pci_init_irq,
 87		.fixup_irqs		= x86_default_pci_fixup_irqs,
 88	},
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 89};
 90
 91struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
 
 92	.setup_percpu_clockev		= setup_secondary_APIC_clock,
 93};
 94
 95static void default_nmi_init(void) { };
 96static int default_i8042_detect(void) { return 1; };
 97
 98struct x86_platform_ops x86_platform = {
 
 99	.calibrate_tsc			= native_calibrate_tsc,
100	.get_wallclock			= mach_get_cmos_time,
101	.set_wallclock			= mach_set_rtc_mmss,
102	.iommu_shutdown			= iommu_shutdown_noop,
103	.is_untracked_pat_range		= is_ISA_range,
104	.nmi_init			= default_nmi_init,
105	.i8042_detect			= default_i8042_detect
 
 
 
106};
107
108EXPORT_SYMBOL_GPL(x86_platform);
109struct x86_msi_ops x86_msi = {
110	.setup_msi_irqs = native_setup_msi_irqs,
111	.teardown_msi_irq = native_teardown_msi_irq,
112	.teardown_msi_irqs = default_teardown_msi_irqs,
 
 
 
 
 
 
 
 
 
 
 
 
113};
v5.14.15
  1/*
  2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
  3 *
  4 *  For licencing details see kernel-base/COPYING
  5 */
  6#include <linux/init.h>
  7#include <linux/ioport.h>
  8#include <linux/export.h>
  9#include <linux/pci.h>
 10
 11#include <asm/acpi.h>
 12#include <asm/bios_ebda.h>
 13#include <asm/paravirt.h>
 14#include <asm/pci_x86.h>
 
 15#include <asm/mpspec.h>
 16#include <asm/setup.h>
 17#include <asm/apic.h>
 18#include <asm/e820/api.h>
 19#include <asm/time.h>
 20#include <asm/irq.h>
 21#include <asm/io_apic.h>
 22#include <asm/hpet.h>
 23#include <asm/memtype.h>
 24#include <asm/tsc.h>
 25#include <asm/iommu.h>
 26#include <asm/mach_traps.h>
 27#include <asm/irqdomain.h>
 28
 29void x86_init_noop(void) { }
 30void __init x86_init_uint_noop(unsigned int unused) { }
 31static int __init iommu_init_noop(void) { return 0; }
 32static void iommu_shutdown_noop(void) { }
 33bool __init bool_x86_init_noop(void) { return false; }
 34void x86_op_int_noop(int cpu) { }
 35static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
 36static __init void get_rtc_noop(struct timespec64 *now) { }
 37
 38static __initconst const struct of_device_id of_cmos_match[] = {
 39	{ .compatible = "motorola,mc146818" },
 40	{}
 41};
 42
 43/*
 44 * Allow devicetree configured systems to disable the RTC by setting the
 45 * corresponding DT node's status property to disabled. Code is optimized
 46 * out for CONFIG_OF=n builds.
 47 */
 48static __init void x86_wallclock_init(void)
 49{
 50	struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
 51
 52	if (node && !of_device_is_available(node)) {
 53		x86_platform.get_wallclock = get_rtc_noop;
 54		x86_platform.set_wallclock = set_rtc_noop;
 55	}
 56}
 57
 58/*
 59 * The platform setup functions are preset with the default functions
 60 * for standard PC hardware.
 61 */
 62struct x86_init_ops x86_init __initdata = {
 63
 64	.resources = {
 65		.probe_roms		= probe_roms,
 66		.reserve_resources	= reserve_standard_io_resources,
 67		.memory_setup		= e820__memory_setup_default,
 68	},
 69
 70	.mpparse = {
 
 71		.setup_ioapic_ids	= x86_init_noop,
 
 
 
 72		.find_smp_config	= default_find_smp_config,
 73		.get_smp_config		= default_get_smp_config,
 74	},
 75
 76	.irqs = {
 77		.pre_vector_init	= init_ISA_irqs,
 78		.intr_init		= native_init_IRQ,
 79		.intr_mode_select	= apic_intr_mode_select,
 80		.intr_mode_init		= apic_intr_mode_init,
 81		.create_pci_msi_domain	= native_create_pci_msi_domain,
 82	},
 83
 84	.oem = {
 85		.arch_setup		= x86_init_noop,
 86		.banner			= default_banner,
 87	},
 88
 
 
 
 
 89	.paging = {
 90		.pagetable_init		= native_pagetable_init,
 
 91	},
 92
 93	.timers = {
 94		.setup_percpu_clockev	= setup_boot_APIC_clock,
 
 95		.timer_init		= hpet_time_init,
 96		.wallclock_init		= x86_wallclock_init,
 97	},
 98
 99	.iommu = {
100		.iommu_init		= iommu_init_noop,
101	},
102
103	.pci = {
104		.init			= x86_default_pci_init,
105		.init_irq		= x86_default_pci_init_irq,
106		.fixup_irqs		= x86_default_pci_fixup_irqs,
107	},
108
109	.hyper = {
110		.init_platform		= x86_init_noop,
111		.guest_late_init	= x86_init_noop,
112		.x2apic_available	= bool_x86_init_noop,
113		.msi_ext_dest_id	= bool_x86_init_noop,
114		.init_mem_mapping	= x86_init_noop,
115		.init_after_bootmem	= x86_init_noop,
116	},
117
118	.acpi = {
119		.set_root_pointer	= x86_default_set_root_pointer,
120		.get_root_pointer	= x86_default_get_root_pointer,
121		.reduced_hw_early_init	= acpi_generic_reduced_hw_init,
122	},
123};
124
125struct x86_cpuinit_ops x86_cpuinit = {
126	.early_percpu_clock_init	= x86_init_noop,
127	.setup_percpu_clockev		= setup_secondary_APIC_clock,
128};
129
130static void default_nmi_init(void) { };
 
131
132struct x86_platform_ops x86_platform __ro_after_init = {
133	.calibrate_cpu			= native_calibrate_cpu_early,
134	.calibrate_tsc			= native_calibrate_tsc,
135	.get_wallclock			= mach_get_cmos_time,
136	.set_wallclock			= mach_set_rtc_mmss,
137	.iommu_shutdown			= iommu_shutdown_noop,
138	.is_untracked_pat_range		= is_ISA_range,
139	.nmi_init			= default_nmi_init,
140	.get_nmi_reason			= default_get_nmi_reason,
141	.save_sched_clock_state 	= tsc_save_sched_clock_state,
142	.restore_sched_clock_state 	= tsc_restore_sched_clock_state,
143	.hyper.pin_vcpu			= x86_op_int_noop,
144};
145
146EXPORT_SYMBOL_GPL(x86_platform);
147
148#if defined(CONFIG_PCI_MSI)
149struct x86_msi_ops x86_msi __ro_after_init = {
150	.restore_msi_irqs	= default_restore_msi_irqs,
151};
152
153/* MSI arch specific hooks */
154void arch_restore_msi_irqs(struct pci_dev *dev)
155{
156	x86_msi.restore_msi_irqs(dev);
157}
158#endif
159
160struct x86_apic_ops x86_apic_ops __ro_after_init = {
161	.io_apic_read	= native_io_apic_read,
162	.restore	= native_restore_boot_irq_mode,
163};