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1/*
2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#ifndef __BFI_H__
19#define __BFI_H__
20
21#include "bfa_defs.h"
22#include "bfa_defs_svc.h"
23
24#pragma pack(1)
25
26/* Per dma segment max size */
27#define BFI_MEM_DMA_SEG_SZ (131072)
28
29/* Get number of dma segments required */
30#define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
31 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
32 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
33
34/* Get num dma reqs - that fit in a segment */
35#define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
36
37/* Get segment num from tag */
38#define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
39
40/* Get dma req offset in a segment */
41#define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
42 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
43
44/*
45 * BFI FW image type
46 */
47#define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
48#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
49
50/*
51 * Msg header common to all msgs
52 */
53struct bfi_mhdr_s {
54 u8 msg_class; /* @ref bfi_mclass_t */
55 u8 msg_id; /* msg opcode with in the class */
56 union {
57 struct {
58 u8 qid;
59 u8 fn_lpu; /* msg destination */
60 } h2i;
61 u16 i2htok; /* token in msgs to host */
62 } mtag;
63};
64
65#define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
66#define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
67
68#define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
69 (_mh).msg_class = (_mc); \
70 (_mh).msg_id = (_op); \
71 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
72} while (0)
73
74#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
75 (_mh).msg_class = (_mc); \
76 (_mh).msg_id = (_op); \
77 (_mh).mtag.i2htok = (_i2htok); \
78} while (0)
79
80/*
81 * Message opcodes: 0-127 to firmware, 128-255 to host
82 */
83#define BFI_I2H_OPCODE_BASE 128
84#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
85
86/*
87 ****************************************************************************
88 *
89 * Scatter Gather Element and Page definition
90 *
91 ****************************************************************************
92 */
93
94#define BFI_SGE_INLINE 1
95#define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
96
97/*
98 * SG Flags
99 */
100enum {
101 BFI_SGE_DATA = 0, /* data address, not last */
102 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
103 BFI_SGE_DATA_LAST = 3, /* data address, last */
104 BFI_SGE_LINK = 2, /* link address */
105 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
106};
107
108/*
109 * DMA addresses
110 */
111union bfi_addr_u {
112 struct {
113 __be32 addr_lo;
114 __be32 addr_hi;
115 } a32;
116};
117
118/*
119 * Scatter Gather Element used for fast-path IO requests
120 */
121struct bfi_sge_s {
122#ifdef __BIG_ENDIAN
123 u32 flags:2,
124 rsvd:2,
125 sg_len:28;
126#else
127 u32 sg_len:28,
128 rsvd:2,
129 flags:2;
130#endif
131 union bfi_addr_u sga;
132};
133
134/**
135 * Generic DMA addr-len pair.
136 */
137struct bfi_alen_s {
138 union bfi_addr_u al_addr; /* DMA addr of buffer */
139 u32 al_len; /* length of buffer */
140};
141
142/*
143 * Scatter Gather Page
144 */
145#define BFI_SGPG_DATA_SGES 7
146#define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
147#define BFI_SGPG_RSVD_WD_LEN 8
148struct bfi_sgpg_s {
149 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
150 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
151};
152
153/* FCP module definitions */
154#define BFI_IO_MAX (2000)
155#define BFI_IOIM_SNSLEN (256)
156#define BFI_IOIM_SNSBUF_SEGS \
157 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
158
159/*
160 * Large Message structure - 128 Bytes size Msgs
161 */
162#define BFI_LMSG_SZ 128
163#define BFI_LMSG_PL_WSZ \
164 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
165
166struct bfi_msg_s {
167 struct bfi_mhdr_s mhdr;
168 u32 pl[BFI_LMSG_PL_WSZ];
169};
170
171/*
172 * Mailbox message structure
173 */
174#define BFI_MBMSG_SZ 7
175struct bfi_mbmsg_s {
176 struct bfi_mhdr_s mh;
177 u32 pl[BFI_MBMSG_SZ];
178};
179
180/*
181 * Supported PCI function class codes (personality)
182 */
183enum bfi_pcifn_class {
184 BFI_PCIFN_CLASS_FC = 0x0c04,
185 BFI_PCIFN_CLASS_ETH = 0x0200,
186};
187
188/*
189 * Message Classes
190 */
191enum bfi_mclass {
192 BFI_MC_IOC = 1, /* IO Controller (IOC) */
193 BFI_MC_DIAG = 2, /* Diagnostic Msgs */
194 BFI_MC_FLASH = 3, /* Flash message class */
195 BFI_MC_CEE = 4, /* CEE */
196 BFI_MC_FCPORT = 5, /* FC port */
197 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
198 BFI_MC_ABLK = 7, /* ASIC block configuration */
199 BFI_MC_UF = 8, /* Unsolicited frame receive */
200 BFI_MC_FCXP = 9, /* FC Transport */
201 BFI_MC_LPS = 10, /* lport fc login services */
202 BFI_MC_RPORT = 11, /* Remote port */
203 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
204 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
205 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
206 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
207 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
208 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
209 BFI_MC_TSKIM = 18, /* Initiator Task management */
210 BFI_MC_PORT = 21, /* Physical port */
211 BFI_MC_SFP = 22, /* SFP module */
212 BFI_MC_PHY = 25, /* External PHY message class */
213 BFI_MC_MAX = 32
214};
215
216#define BFI_IOC_MAX_CQS 4
217#define BFI_IOC_MAX_CQS_ASIC 8
218#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
219
220/*
221 *----------------------------------------------------------------------
222 * IOC
223 *----------------------------------------------------------------------
224 */
225
226/*
227 * Different asic generations
228 */
229enum bfi_asic_gen {
230 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
231 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
232 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
233};
234
235enum bfi_asic_mode {
236 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
237 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
238 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
239 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
240};
241
242enum bfi_ioc_h2i_msgs {
243 BFI_IOC_H2I_ENABLE_REQ = 1,
244 BFI_IOC_H2I_DISABLE_REQ = 2,
245 BFI_IOC_H2I_GETATTR_REQ = 3,
246 BFI_IOC_H2I_DBG_SYNC = 4,
247 BFI_IOC_H2I_DBG_DUMP = 5,
248};
249
250enum bfi_ioc_i2h_msgs {
251 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
252 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
253 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
254 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
255 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
256};
257
258/*
259 * BFI_IOC_H2I_GETATTR_REQ message
260 */
261struct bfi_ioc_getattr_req_s {
262 struct bfi_mhdr_s mh;
263 union bfi_addr_u attr_addr;
264};
265
266struct bfi_ioc_attr_s {
267 wwn_t mfg_pwwn; /* Mfg port wwn */
268 wwn_t mfg_nwwn; /* Mfg node wwn */
269 mac_t mfg_mac; /* Mfg mac */
270 u8 port_mode; /* bfi_port_mode */
271 u8 rsvd_a;
272 wwn_t pwwn;
273 wwn_t nwwn;
274 mac_t mac; /* PBC or Mfg mac */
275 u16 rsvd_b;
276 mac_t fcoe_mac;
277 u16 rsvd_c;
278 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
279 u8 pcie_gen;
280 u8 pcie_lanes_orig;
281 u8 pcie_lanes;
282 u8 rx_bbcredit; /* receive buffer credits */
283 u32 adapter_prop; /* adapter properties */
284 u16 maxfrsize; /* max receive frame size */
285 char asic_rev;
286 u8 rsvd_d;
287 char fw_version[BFA_VERSION_LEN];
288 char optrom_version[BFA_VERSION_LEN];
289 struct bfa_mfg_vpd_s vpd;
290 u32 card_type; /* card type */
291};
292
293/*
294 * BFI_IOC_I2H_GETATTR_REPLY message
295 */
296struct bfi_ioc_getattr_reply_s {
297 struct bfi_mhdr_s mh; /* Common msg header */
298 u8 status; /* cfg reply status */
299 u8 rsvd[3];
300};
301
302/*
303 * Firmware memory page offsets
304 */
305#define BFI_IOC_SMEM_PG0_CB (0x40)
306#define BFI_IOC_SMEM_PG0_CT (0x180)
307
308/*
309 * Firmware statistic offset
310 */
311#define BFI_IOC_FWSTATS_OFF (0x6B40)
312#define BFI_IOC_FWSTATS_SZ (4096)
313
314/*
315 * Firmware trace offset
316 */
317#define BFI_IOC_TRC_OFF (0x4b00)
318#define BFI_IOC_TRC_ENTS 256
319
320#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
321#define BFI_IOC_MD5SUM_SZ 4
322struct bfi_ioc_image_hdr_s {
323 u32 signature; /* constant signature */
324 u8 asic_gen; /* asic generation */
325 u8 asic_mode;
326 u8 port0_mode; /* device mode for port 0 */
327 u8 port1_mode; /* device mode for port 1 */
328 u32 exec; /* exec vector */
329 u32 bootenv; /* fimware boot env */
330 u32 rsvd_b[4];
331 u32 md5sum[BFI_IOC_MD5SUM_SZ];
332};
333
334#define BFI_FWBOOT_DEVMODE_OFF 4
335#define BFI_FWBOOT_TYPE_OFF 8
336#define BFI_FWBOOT_ENV_OFF 12
337#define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
338 (((u32)(__asic_gen)) << 24 | \
339 ((u32)(__asic_mode)) << 16 | \
340 ((u32)(__p0_mode)) << 8 | \
341 ((u32)(__p1_mode)))
342
343#define BFI_FWBOOT_TYPE_NORMAL 0
344#define BFI_FWBOOT_TYPE_MEMTEST 2
345#define BFI_FWBOOT_ENV_OS 0
346
347enum bfi_port_mode {
348 BFI_PORT_MODE_FC = 1,
349 BFI_PORT_MODE_ETH = 2,
350};
351
352struct bfi_ioc_hbeat_s {
353 struct bfi_mhdr_s mh; /* common msg header */
354 u32 hb_count; /* current heart beat count */
355};
356
357/*
358 * IOC hardware/firmware state
359 */
360enum bfi_ioc_state {
361 BFI_IOC_UNINIT = 0, /* not initialized */
362 BFI_IOC_INITING = 1, /* h/w is being initialized */
363 BFI_IOC_HWINIT = 2, /* h/w is initialized */
364 BFI_IOC_CFG = 3, /* IOC configuration in progress */
365 BFI_IOC_OP = 4, /* IOC is operational */
366 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
367 BFI_IOC_DISABLED = 6, /* IOC is disabled */
368 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
369 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
370 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
371};
372
373#define BFI_IOC_ENDIAN_SIG 0x12345678
374
375enum {
376 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
377 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
378 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
379 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
380 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
381 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
382 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
383 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
384 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
385 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
386};
387
388#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
389 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
390 BFI_ADAPTER_ ## __prop ## _SH)
391#define BFI_ADAPTER_SETP(__prop, __val) \
392 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
393#define BFI_ADAPTER_IS_PROTO(__adap_type) \
394 ((__adap_type) & BFI_ADAPTER_PROTO)
395#define BFI_ADAPTER_IS_TTV(__adap_type) \
396 ((__adap_type) & BFI_ADAPTER_TTV)
397#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
398 ((__adap_type) & BFI_ADAPTER_UNSUPP)
399#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
400 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
401 BFI_ADAPTER_UNSUPP))
402
403/*
404 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
405 */
406struct bfi_ioc_ctrl_req_s {
407 struct bfi_mhdr_s mh;
408 u16 clscode;
409 u16 rsvd;
410 u32 tv_sec;
411};
412#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
413#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
414
415/*
416 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
417 */
418struct bfi_ioc_ctrl_reply_s {
419 struct bfi_mhdr_s mh; /* Common msg header */
420 u8 status; /* enable/disable status */
421 u8 port_mode; /* bfa_mode_s */
422 u8 cap_bm; /* capability bit mask */
423 u8 rsvd;
424};
425#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
426#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
427
428#define BFI_IOC_MSGSZ 8
429/*
430 * H2I Messages
431 */
432union bfi_ioc_h2i_msg_u {
433 struct bfi_mhdr_s mh;
434 struct bfi_ioc_ctrl_req_s enable_req;
435 struct bfi_ioc_ctrl_req_s disable_req;
436 struct bfi_ioc_getattr_req_s getattr_req;
437 u32 mboxmsg[BFI_IOC_MSGSZ];
438};
439
440/*
441 * I2H Messages
442 */
443union bfi_ioc_i2h_msg_u {
444 struct bfi_mhdr_s mh;
445 struct bfi_ioc_ctrl_reply_s fw_event;
446 u32 mboxmsg[BFI_IOC_MSGSZ];
447};
448
449
450/*
451 *----------------------------------------------------------------------
452 * PBC
453 *----------------------------------------------------------------------
454 */
455
456#define BFI_PBC_MAX_BLUNS 8
457#define BFI_PBC_MAX_VPORTS 16
458#define BFI_PBC_PORT_DISABLED 2
459
460/*
461 * PBC boot lun configuration
462 */
463struct bfi_pbc_blun_s {
464 wwn_t tgt_pwwn;
465 struct scsi_lun tgt_lun;
466};
467
468/*
469 * PBC virtual port configuration
470 */
471struct bfi_pbc_vport_s {
472 wwn_t vp_pwwn;
473 wwn_t vp_nwwn;
474};
475
476/*
477 * BFI pre-boot configuration information
478 */
479struct bfi_pbc_s {
480 u8 port_enabled;
481 u8 boot_enabled;
482 u8 nbluns;
483 u8 nvports;
484 u8 port_speed;
485 u8 rsvd_a;
486 u16 hss;
487 wwn_t pbc_pwwn;
488 wwn_t pbc_nwwn;
489 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
490 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
491};
492
493/*
494 *----------------------------------------------------------------------
495 * MSGQ
496 *----------------------------------------------------------------------
497 */
498#define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
499#define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
500#define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
501#define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
502
503/* q_depth must be power of 2 */
504#define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
505
506enum bfi_msgq_h2i_msgs_e {
507 BFI_MSGQ_H2I_INIT_REQ = 1,
508 BFI_MSGQ_H2I_DOORBELL = 2,
509 BFI_MSGQ_H2I_SHUTDOWN = 3,
510};
511
512enum bfi_msgq_i2h_msgs_e {
513 BFI_MSGQ_I2H_INIT_RSP = 1,
514 BFI_MSGQ_I2H_DOORBELL = 2,
515};
516
517
518/* Messages(commands/responsed/AENS will have the following header */
519struct bfi_msgq_mhdr_s {
520 u8 msg_class;
521 u8 msg_id;
522 u16 msg_token;
523 u16 num_entries;
524 u8 enet_id;
525 u8 rsvd[1];
526};
527
528#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
529 (_mh).msg_class = (_mc); \
530 (_mh).msg_id = (_mid); \
531 (_mh).msg_token = (_tok); \
532 (_mh).enet_id = (_enet_id); \
533} while (0)
534
535/*
536 * Mailbox for messaging interface
537 *
538*/
539#define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
540#define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
541#define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
542
543struct bfi_msgq_s {
544 union bfi_addr_u addr;
545 u16 q_depth; /* Total num of entries in the queue */
546 u8 rsvd[2];
547};
548
549/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
550struct bfi_msgq_cfg_req_s {
551 struct bfi_mhdr_s mh;
552 struct bfi_msgq_s cmdq;
553 struct bfi_msgq_s rspq;
554};
555
556/* BFI_ENET_MSGQ_CFG_RSP */
557struct bfi_msgq_cfg_rsp_s {
558 struct bfi_mhdr_s mh;
559 u8 cmd_status;
560 u8 rsvd[3];
561};
562
563
564/* BFI_MSGQ_H2I_DOORBELL */
565struct bfi_msgq_h2i_db_s {
566 struct bfi_mhdr_s mh;
567 u16 cmdq_pi;
568 u16 rspq_ci;
569};
570
571/* BFI_MSGQ_I2H_DOORBELL */
572struct bfi_msgq_i2h_db_s {
573 struct bfi_mhdr_s mh;
574 u16 rspq_pi;
575 u16 cmdq_ci;
576};
577
578#pragma pack()
579
580/* BFI port specific */
581#pragma pack(1)
582
583enum bfi_port_h2i {
584 BFI_PORT_H2I_ENABLE_REQ = (1),
585 BFI_PORT_H2I_DISABLE_REQ = (2),
586 BFI_PORT_H2I_GET_STATS_REQ = (3),
587 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
588};
589
590enum bfi_port_i2h {
591 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
592 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
593 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
594 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
595};
596
597/*
598 * Generic REQ type
599 */
600struct bfi_port_generic_req_s {
601 struct bfi_mhdr_s mh; /* msg header */
602 u32 msgtag; /* msgtag for reply */
603 u32 rsvd;
604};
605
606/*
607 * Generic RSP type
608 */
609struct bfi_port_generic_rsp_s {
610 struct bfi_mhdr_s mh; /* common msg header */
611 u8 status; /* port enable status */
612 u8 rsvd[3];
613 u32 msgtag; /* msgtag for reply */
614};
615
616/*
617 * BFI_PORT_H2I_GET_STATS_REQ
618 */
619struct bfi_port_get_stats_req_s {
620 struct bfi_mhdr_s mh; /* common msg header */
621 union bfi_addr_u dma_addr;
622};
623
624union bfi_port_h2i_msg_u {
625 struct bfi_mhdr_s mh;
626 struct bfi_port_generic_req_s enable_req;
627 struct bfi_port_generic_req_s disable_req;
628 struct bfi_port_get_stats_req_s getstats_req;
629 struct bfi_port_generic_req_s clearstats_req;
630};
631
632union bfi_port_i2h_msg_u {
633 struct bfi_mhdr_s mh;
634 struct bfi_port_generic_rsp_s enable_rsp;
635 struct bfi_port_generic_rsp_s disable_rsp;
636 struct bfi_port_generic_rsp_s getstats_rsp;
637 struct bfi_port_generic_rsp_s clearstats_rsp;
638};
639
640/*
641 *----------------------------------------------------------------------
642 * ABLK
643 *----------------------------------------------------------------------
644 */
645enum bfi_ablk_h2i_msgs_e {
646 BFI_ABLK_H2I_QUERY = 1,
647 BFI_ABLK_H2I_ADPT_CONFIG = 2,
648 BFI_ABLK_H2I_PORT_CONFIG = 3,
649 BFI_ABLK_H2I_PF_CREATE = 4,
650 BFI_ABLK_H2I_PF_DELETE = 5,
651 BFI_ABLK_H2I_PF_UPDATE = 6,
652 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
653 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
654};
655
656enum bfi_ablk_i2h_msgs_e {
657 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
658 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
659 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
660 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
661 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
662 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
663 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
664 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
665};
666
667/* BFI_ABLK_H2I_QUERY */
668struct bfi_ablk_h2i_query_s {
669 struct bfi_mhdr_s mh;
670 union bfi_addr_u addr;
671};
672
673/* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
674struct bfi_ablk_h2i_cfg_req_s {
675 struct bfi_mhdr_s mh;
676 u8 mode;
677 u8 port;
678 u8 max_pf;
679 u8 max_vf;
680};
681
682/*
683 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
684 */
685struct bfi_ablk_h2i_pf_req_s {
686 struct bfi_mhdr_s mh;
687 u8 pcifn;
688 u8 port;
689 u16 pers;
690 u32 bw;
691};
692
693/* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
694struct bfi_ablk_h2i_optrom_s {
695 struct bfi_mhdr_s mh;
696};
697
698/*
699 * BFI_ABLK_I2H_QUERY
700 * BFI_ABLK_I2H_PORT_CONFIG
701 * BFI_ABLK_I2H_PF_CREATE
702 * BFI_ABLK_I2H_PF_DELETE
703 * BFI_ABLK_I2H_PF_UPDATE
704 * BFI_ABLK_I2H_OPTROM_ENABLE
705 * BFI_ABLK_I2H_OPTROM_DISABLE
706 */
707struct bfi_ablk_i2h_rsp_s {
708 struct bfi_mhdr_s mh;
709 u8 status;
710 u8 pcifn;
711 u8 port_mode;
712};
713
714
715/*
716 * CEE module specific messages
717 */
718
719/* Mailbox commands from host to firmware */
720enum bfi_cee_h2i_msgs_e {
721 BFI_CEE_H2I_GET_CFG_REQ = 1,
722 BFI_CEE_H2I_RESET_STATS = 2,
723 BFI_CEE_H2I_GET_STATS_REQ = 3,
724};
725
726enum bfi_cee_i2h_msgs_e {
727 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
728 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
729 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
730};
731
732/*
733 * H2I command structure for resetting the stats
734 */
735struct bfi_cee_reset_stats_s {
736 struct bfi_mhdr_s mh;
737};
738
739/*
740 * Get configuration command from host
741 */
742struct bfi_cee_get_req_s {
743 struct bfi_mhdr_s mh;
744 union bfi_addr_u dma_addr;
745};
746
747/*
748 * Reply message from firmware
749 */
750struct bfi_cee_get_rsp_s {
751 struct bfi_mhdr_s mh;
752 u8 cmd_status;
753 u8 rsvd[3];
754};
755
756/*
757 * Reply message from firmware
758 */
759struct bfi_cee_stats_rsp_s {
760 struct bfi_mhdr_s mh;
761 u8 cmd_status;
762 u8 rsvd[3];
763};
764
765/* Mailbox message structures from firmware to host */
766union bfi_cee_i2h_msg_u {
767 struct bfi_mhdr_s mh;
768 struct bfi_cee_get_rsp_s get_rsp;
769 struct bfi_cee_stats_rsp_s stats_rsp;
770};
771
772/*
773 * SFP related
774 */
775
776enum bfi_sfp_h2i_e {
777 BFI_SFP_H2I_SHOW = 1,
778 BFI_SFP_H2I_SCN = 2,
779};
780
781enum bfi_sfp_i2h_e {
782 BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
783 BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN),
784};
785
786/*
787 * SFP state change notification
788 */
789struct bfi_sfp_scn_s {
790 struct bfi_mhdr_s mhr; /* host msg header */
791 u8 event;
792 u8 sfpid;
793 u8 pomlvl; /* pom level: normal/warning/alarm */
794 u8 is_elb; /* e-loopback */
795};
796
797/*
798 * SFP state
799 */
800enum bfa_sfp_stat_e {
801 BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */
802 BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */
803 BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */
804 BFA_SFP_STATE_VALID = 3, /* SFP is valid */
805 BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */
806 BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */
807};
808
809/*
810 * SFP memory access type
811 */
812enum bfi_sfp_mem_e {
813 BFI_SFP_MEM_ALL = 0x1, /* access all data field */
814 BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */
815};
816
817struct bfi_sfp_req_s {
818 struct bfi_mhdr_s mh;
819 u8 memtype;
820 u8 rsvd[3];
821 struct bfi_alen_s alen;
822};
823
824struct bfi_sfp_rsp_s {
825 struct bfi_mhdr_s mh;
826 u8 status;
827 u8 state;
828 u8 rsvd[2];
829};
830
831/*
832 * FLASH module specific
833 */
834enum bfi_flash_h2i_msgs {
835 BFI_FLASH_H2I_QUERY_REQ = 1,
836 BFI_FLASH_H2I_ERASE_REQ = 2,
837 BFI_FLASH_H2I_WRITE_REQ = 3,
838 BFI_FLASH_H2I_READ_REQ = 4,
839 BFI_FLASH_H2I_BOOT_VER_REQ = 5,
840};
841
842enum bfi_flash_i2h_msgs {
843 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
844 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
845 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
846 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
847 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
848 BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
849};
850
851/*
852 * Flash query request
853 */
854struct bfi_flash_query_req_s {
855 struct bfi_mhdr_s mh; /* Common msg header */
856 struct bfi_alen_s alen;
857};
858
859/*
860 * Flash erase request
861 */
862struct bfi_flash_erase_req_s {
863 struct bfi_mhdr_s mh; /* Common msg header */
864 u32 type; /* partition type */
865 u8 instance; /* partition instance */
866 u8 rsv[3];
867};
868
869/*
870 * Flash write request
871 */
872struct bfi_flash_write_req_s {
873 struct bfi_mhdr_s mh; /* Common msg header */
874 struct bfi_alen_s alen;
875 u32 type; /* partition type */
876 u8 instance; /* partition instance */
877 u8 last;
878 u8 rsv[2];
879 u32 offset;
880 u32 length;
881};
882
883/*
884 * Flash read request
885 */
886struct bfi_flash_read_req_s {
887 struct bfi_mhdr_s mh; /* Common msg header */
888 u32 type; /* partition type */
889 u8 instance; /* partition instance */
890 u8 rsv[3];
891 u32 offset;
892 u32 length;
893 struct bfi_alen_s alen;
894};
895
896/*
897 * Flash query response
898 */
899struct bfi_flash_query_rsp_s {
900 struct bfi_mhdr_s mh; /* Common msg header */
901 u32 status;
902};
903
904/*
905 * Flash read response
906 */
907struct bfi_flash_read_rsp_s {
908 struct bfi_mhdr_s mh; /* Common msg header */
909 u32 type; /* partition type */
910 u8 instance; /* partition instance */
911 u8 rsv[3];
912 u32 status;
913 u32 length;
914};
915
916/*
917 * Flash write response
918 */
919struct bfi_flash_write_rsp_s {
920 struct bfi_mhdr_s mh; /* Common msg header */
921 u32 type; /* partition type */
922 u8 instance; /* partition instance */
923 u8 rsv[3];
924 u32 status;
925 u32 length;
926};
927
928/*
929 * Flash erase response
930 */
931struct bfi_flash_erase_rsp_s {
932 struct bfi_mhdr_s mh; /* Common msg header */
933 u32 type; /* partition type */
934 u8 instance; /* partition instance */
935 u8 rsv[3];
936 u32 status;
937};
938
939/*
940 * Flash event notification
941 */
942struct bfi_flash_event_s {
943 struct bfi_mhdr_s mh; /* Common msg header */
944 bfa_status_t status;
945 u32 param;
946};
947
948/*
949 *----------------------------------------------------------------------
950 * DIAG
951 *----------------------------------------------------------------------
952 */
953enum bfi_diag_h2i {
954 BFI_DIAG_H2I_PORTBEACON = 1,
955 BFI_DIAG_H2I_LOOPBACK = 2,
956 BFI_DIAG_H2I_FWPING = 3,
957 BFI_DIAG_H2I_TEMPSENSOR = 4,
958 BFI_DIAG_H2I_LEDTEST = 5,
959 BFI_DIAG_H2I_QTEST = 6,
960};
961
962enum bfi_diag_i2h {
963 BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
964 BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
965 BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
966 BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
967 BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
968 BFI_DIAG_I2H_QTEST = BFA_I2HM(BFI_DIAG_H2I_QTEST),
969};
970
971#define BFI_DIAG_MAX_SGES 2
972#define BFI_DIAG_DMA_BUF_SZ (2 * 1024)
973#define BFI_BOOT_MEMTEST_RES_ADDR 0x900
974#define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3
975
976struct bfi_diag_lb_req_s {
977 struct bfi_mhdr_s mh;
978 u32 loopcnt;
979 u32 pattern;
980 u8 lb_mode; /*!< bfa_port_opmode_t */
981 u8 speed; /*!< bfa_port_speed_t */
982 u8 rsvd[2];
983};
984
985struct bfi_diag_lb_rsp_s {
986 struct bfi_mhdr_s mh; /* 4 bytes */
987 struct bfa_diag_loopback_result_s res; /* 16 bytes */
988};
989
990struct bfi_diag_fwping_req_s {
991 struct bfi_mhdr_s mh; /* 4 bytes */
992 struct bfi_alen_s alen; /* 12 bytes */
993 u32 data; /* user input data pattern */
994 u32 count; /* user input dma count */
995 u8 qtag; /* track CPE vc */
996 u8 rsv[3];
997};
998
999struct bfi_diag_fwping_rsp_s {
1000 struct bfi_mhdr_s mh; /* 4 bytes */
1001 u32 data; /* user input data pattern */
1002 u8 qtag; /* track CPE vc */
1003 u8 dma_status; /* dma status */
1004 u8 rsv[2];
1005};
1006
1007/*
1008 * Temperature Sensor
1009 */
1010struct bfi_diag_ts_req_s {
1011 struct bfi_mhdr_s mh; /* 4 bytes */
1012 u16 temp; /* 10-bit A/D value */
1013 u16 brd_temp; /* 9-bit board temp */
1014 u8 status;
1015 u8 ts_junc; /* show junction tempsensor */
1016 u8 ts_brd; /* show board tempsensor */
1017 u8 rsv;
1018};
1019#define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1020
1021struct bfi_diag_ledtest_req_s {
1022 struct bfi_mhdr_s mh; /* 4 bytes */
1023 u8 cmd;
1024 u8 color;
1025 u8 portid;
1026 u8 led; /* bitmap of LEDs to be tested */
1027 u16 freq; /* no. of blinks every 10 secs */
1028 u8 rsv[2];
1029};
1030
1031/* notify host led operation is done */
1032struct bfi_diag_ledtest_rsp_s {
1033 struct bfi_mhdr_s mh; /* 4 bytes */
1034};
1035
1036struct bfi_diag_portbeacon_req_s {
1037 struct bfi_mhdr_s mh; /* 4 bytes */
1038 u32 period; /* beaconing period */
1039 u8 beacon; /* 1: beacon on */
1040 u8 rsvd[3];
1041};
1042
1043/* notify host the beacon is off */
1044struct bfi_diag_portbeacon_rsp_s {
1045 struct bfi_mhdr_s mh; /* 4 bytes */
1046};
1047
1048struct bfi_diag_qtest_req_s {
1049 struct bfi_mhdr_s mh; /* 4 bytes */
1050 u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1051};
1052#define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1053
1054/*
1055 * PHY module specific
1056 */
1057enum bfi_phy_h2i_msgs_e {
1058 BFI_PHY_H2I_QUERY_REQ = 1,
1059 BFI_PHY_H2I_STATS_REQ = 2,
1060 BFI_PHY_H2I_WRITE_REQ = 3,
1061 BFI_PHY_H2I_READ_REQ = 4,
1062};
1063
1064enum bfi_phy_i2h_msgs_e {
1065 BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1066 BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1067 BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1068 BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1069};
1070
1071/*
1072 * External PHY query request
1073 */
1074struct bfi_phy_query_req_s {
1075 struct bfi_mhdr_s mh; /* Common msg header */
1076 u8 instance;
1077 u8 rsv[3];
1078 struct bfi_alen_s alen;
1079};
1080
1081/*
1082 * External PHY stats request
1083 */
1084struct bfi_phy_stats_req_s {
1085 struct bfi_mhdr_s mh; /* Common msg header */
1086 u8 instance;
1087 u8 rsv[3];
1088 struct bfi_alen_s alen;
1089};
1090
1091/*
1092 * External PHY write request
1093 */
1094struct bfi_phy_write_req_s {
1095 struct bfi_mhdr_s mh; /* Common msg header */
1096 u8 instance;
1097 u8 last;
1098 u8 rsv[2];
1099 u32 offset;
1100 u32 length;
1101 struct bfi_alen_s alen;
1102};
1103
1104/*
1105 * External PHY read request
1106 */
1107struct bfi_phy_read_req_s {
1108 struct bfi_mhdr_s mh; /* Common msg header */
1109 u8 instance;
1110 u8 rsv[3];
1111 u32 offset;
1112 u32 length;
1113 struct bfi_alen_s alen;
1114};
1115
1116/*
1117 * External PHY query response
1118 */
1119struct bfi_phy_query_rsp_s {
1120 struct bfi_mhdr_s mh; /* Common msg header */
1121 u32 status;
1122};
1123
1124/*
1125 * External PHY stats response
1126 */
1127struct bfi_phy_stats_rsp_s {
1128 struct bfi_mhdr_s mh; /* Common msg header */
1129 u32 status;
1130};
1131
1132/*
1133 * External PHY read response
1134 */
1135struct bfi_phy_read_rsp_s {
1136 struct bfi_mhdr_s mh; /* Common msg header */
1137 u32 status;
1138 u32 length;
1139};
1140
1141/*
1142 * External PHY write response
1143 */
1144struct bfi_phy_write_rsp_s {
1145 struct bfi_mhdr_s mh; /* Common msg header */
1146 u32 status;
1147 u32 length;
1148};
1149
1150#pragma pack()
1151
1152#endif /* __BFI_H__ */
1/*
2 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
3 * Copyright (c) 2014- QLogic Corporation.
4 * All rights reserved
5 * www.qlogic.com
6 *
7 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License (GPL) Version 2 as
11 * published by the Free Software Foundation
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#ifndef __BFI_H__
20#define __BFI_H__
21
22#include "bfa_defs.h"
23#include "bfa_defs_svc.h"
24
25#pragma pack(1)
26
27/* Per dma segment max size */
28#define BFI_MEM_DMA_SEG_SZ (131072)
29
30/* Get number of dma segments required */
31#define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
32 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
33 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
34
35/* Get num dma reqs - that fit in a segment */
36#define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
37
38/* Get segment num from tag */
39#define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
40
41/* Get dma req offset in a segment */
42#define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
43 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
44
45/*
46 * BFI FW image type
47 */
48#define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
49#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
50#define BFI_FLASH_IMAGE_SZ 0x100000
51
52/*
53 * Msg header common to all msgs
54 */
55struct bfi_mhdr_s {
56 u8 msg_class; /* @ref bfi_mclass_t */
57 u8 msg_id; /* msg opcode with in the class */
58 union {
59 struct {
60 u8 qid;
61 u8 fn_lpu; /* msg destination */
62 } h2i;
63 u16 i2htok; /* token in msgs to host */
64 } mtag;
65};
66
67#define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
68#define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
69
70#define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
71 (_mh).msg_class = (_mc); \
72 (_mh).msg_id = (_op); \
73 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
74} while (0)
75
76#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
77 (_mh).msg_class = (_mc); \
78 (_mh).msg_id = (_op); \
79 (_mh).mtag.i2htok = (_i2htok); \
80} while (0)
81
82/*
83 * Message opcodes: 0-127 to firmware, 128-255 to host
84 */
85#define BFI_I2H_OPCODE_BASE 128
86#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
87
88/*
89 ****************************************************************************
90 *
91 * Scatter Gather Element and Page definition
92 *
93 ****************************************************************************
94 */
95
96#define BFI_SGE_INLINE 1
97#define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
98
99/*
100 * SG Flags
101 */
102enum {
103 BFI_SGE_DATA = 0, /* data address, not last */
104 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
105 BFI_SGE_DATA_LAST = 3, /* data address, last */
106 BFI_SGE_LINK = 2, /* link address */
107 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
108};
109
110/*
111 * DMA addresses
112 */
113union bfi_addr_u {
114 struct {
115 __be32 addr_lo;
116 __be32 addr_hi;
117 } a32;
118};
119
120/*
121 * Scatter Gather Element used for fast-path IO requests
122 */
123struct bfi_sge_s {
124#ifdef __BIG_ENDIAN
125 u32 flags:2,
126 rsvd:2,
127 sg_len:28;
128#else
129 u32 sg_len:28,
130 rsvd:2,
131 flags:2;
132#endif
133 union bfi_addr_u sga;
134};
135
136/**
137 * Generic DMA addr-len pair.
138 */
139struct bfi_alen_s {
140 union bfi_addr_u al_addr; /* DMA addr of buffer */
141 u32 al_len; /* length of buffer */
142};
143
144/*
145 * Scatter Gather Page
146 */
147#define BFI_SGPG_DATA_SGES 7
148#define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
149#define BFI_SGPG_RSVD_WD_LEN 8
150struct bfi_sgpg_s {
151 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
152 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
153};
154
155/* FCP module definitions */
156#define BFI_IO_MAX (2000)
157#define BFI_IOIM_SNSLEN (256)
158#define BFI_IOIM_SNSBUF_SEGS \
159 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
160
161/*
162 * Large Message structure - 128 Bytes size Msgs
163 */
164#define BFI_LMSG_SZ 128
165#define BFI_LMSG_PL_WSZ \
166 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
167
168struct bfi_msg_s {
169 struct bfi_mhdr_s mhdr;
170 u32 pl[BFI_LMSG_PL_WSZ];
171};
172
173/*
174 * Mailbox message structure
175 */
176#define BFI_MBMSG_SZ 7
177struct bfi_mbmsg_s {
178 struct bfi_mhdr_s mh;
179 u32 pl[BFI_MBMSG_SZ];
180};
181
182/*
183 * Supported PCI function class codes (personality)
184 */
185enum bfi_pcifn_class {
186 BFI_PCIFN_CLASS_FC = 0x0c04,
187 BFI_PCIFN_CLASS_ETH = 0x0200,
188};
189
190/*
191 * Message Classes
192 */
193enum bfi_mclass {
194 BFI_MC_IOC = 1, /* IO Controller (IOC) */
195 BFI_MC_DIAG = 2, /* Diagnostic Msgs */
196 BFI_MC_FLASH = 3, /* Flash message class */
197 BFI_MC_CEE = 4, /* CEE */
198 BFI_MC_FCPORT = 5, /* FC port */
199 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
200 BFI_MC_ABLK = 7, /* ASIC block configuration */
201 BFI_MC_UF = 8, /* Unsolicited frame receive */
202 BFI_MC_FCXP = 9, /* FC Transport */
203 BFI_MC_LPS = 10, /* lport fc login services */
204 BFI_MC_RPORT = 11, /* Remote port */
205 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
206 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
207 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
208 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
209 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
210 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
211 BFI_MC_TSKIM = 18, /* Initiator Task management */
212 BFI_MC_PORT = 21, /* Physical port */
213 BFI_MC_SFP = 22, /* SFP module */
214 BFI_MC_PHY = 25, /* External PHY message class */
215 BFI_MC_FRU = 34,
216 BFI_MC_MAX = 35
217};
218
219#define BFI_IOC_MAX_CQS 4
220#define BFI_IOC_MAX_CQS_ASIC 8
221#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
222
223/*
224 *----------------------------------------------------------------------
225 * IOC
226 *----------------------------------------------------------------------
227 */
228
229/*
230 * Different asic generations
231 */
232enum bfi_asic_gen {
233 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
234 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
235 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
236};
237
238enum bfi_asic_mode {
239 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
240 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
241 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
242 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
243};
244
245enum bfi_ioc_h2i_msgs {
246 BFI_IOC_H2I_ENABLE_REQ = 1,
247 BFI_IOC_H2I_DISABLE_REQ = 2,
248 BFI_IOC_H2I_GETATTR_REQ = 3,
249 BFI_IOC_H2I_DBG_SYNC = 4,
250 BFI_IOC_H2I_DBG_DUMP = 5,
251};
252
253enum bfi_ioc_i2h_msgs {
254 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
255 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
256 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
257 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
258 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
259};
260
261/*
262 * BFI_IOC_H2I_GETATTR_REQ message
263 */
264struct bfi_ioc_getattr_req_s {
265 struct bfi_mhdr_s mh;
266 union bfi_addr_u attr_addr;
267};
268
269#define BFI_IOC_ATTR_UUID_SZ 16
270struct bfi_ioc_attr_s {
271 wwn_t mfg_pwwn; /* Mfg port wwn */
272 wwn_t mfg_nwwn; /* Mfg node wwn */
273 mac_t mfg_mac; /* Mfg mac */
274 u8 port_mode; /* bfi_port_mode */
275 u8 rsvd_a;
276 wwn_t pwwn;
277 wwn_t nwwn;
278 mac_t mac; /* PBC or Mfg mac */
279 u16 rsvd_b;
280 mac_t fcoe_mac;
281 u16 rsvd_c;
282 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
283 u8 pcie_gen;
284 u8 pcie_lanes_orig;
285 u8 pcie_lanes;
286 u8 rx_bbcredit; /* receive buffer credits */
287 u32 adapter_prop; /* adapter properties */
288 u16 maxfrsize; /* max receive frame size */
289 char asic_rev;
290 u8 rsvd_d;
291 char fw_version[BFA_VERSION_LEN];
292 char optrom_version[BFA_VERSION_LEN];
293 struct bfa_mfg_vpd_s vpd;
294 u32 card_type; /* card type */
295 u8 mfg_day; /* manufacturing day */
296 u8 mfg_month; /* manufacturing month */
297 u16 mfg_year; /* manufacturing year */
298 u8 uuid[BFI_IOC_ATTR_UUID_SZ]; /*!< chinook uuid */
299};
300
301/*
302 * BFI_IOC_I2H_GETATTR_REPLY message
303 */
304struct bfi_ioc_getattr_reply_s {
305 struct bfi_mhdr_s mh; /* Common msg header */
306 u8 status; /* cfg reply status */
307 u8 rsvd[3];
308};
309
310/*
311 * Firmware memory page offsets
312 */
313#define BFI_IOC_SMEM_PG0_CB (0x40)
314#define BFI_IOC_SMEM_PG0_CT (0x180)
315
316/*
317 * Firmware statistic offset
318 */
319#define BFI_IOC_FWSTATS_OFF (0x6B40)
320#define BFI_IOC_FWSTATS_SZ (4096)
321
322/*
323 * Firmware trace offset
324 */
325#define BFI_IOC_TRC_OFF (0x4b00)
326#define BFI_IOC_TRC_ENTS 256
327
328#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
329#define BFA_IOC_FW_INV_SIGN (0xdeaddead)
330#define BFI_IOC_MD5SUM_SZ 4
331
332struct bfi_ioc_fwver_s {
333#ifdef __BIG_ENDIAN
334 uint8_t patch;
335 uint8_t maint;
336 uint8_t minor;
337 uint8_t major;
338 uint8_t rsvd[2];
339 uint8_t build;
340 uint8_t phase;
341#else
342 uint8_t major;
343 uint8_t minor;
344 uint8_t maint;
345 uint8_t patch;
346 uint8_t phase;
347 uint8_t build;
348 uint8_t rsvd[2];
349#endif
350};
351
352struct bfi_ioc_image_hdr_s {
353 u32 signature; /* constant signature */
354 u8 asic_gen; /* asic generation */
355 u8 asic_mode;
356 u8 port0_mode; /* device mode for port 0 */
357 u8 port1_mode; /* device mode for port 1 */
358 u32 exec; /* exec vector */
359 u32 bootenv; /* fimware boot env */
360 u32 rsvd_b[2];
361 struct bfi_ioc_fwver_s fwver;
362 u32 md5sum[BFI_IOC_MD5SUM_SZ];
363};
364
365enum bfi_ioc_img_ver_cmp_e {
366 BFI_IOC_IMG_VER_INCOMP,
367 BFI_IOC_IMG_VER_OLD,
368 BFI_IOC_IMG_VER_SAME,
369 BFI_IOC_IMG_VER_BETTER
370};
371
372#define BFI_FWBOOT_DEVMODE_OFF 4
373#define BFI_FWBOOT_TYPE_OFF 8
374#define BFI_FWBOOT_ENV_OFF 12
375#define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
376 (((u32)(__asic_gen)) << 24 | \
377 ((u32)(__asic_mode)) << 16 | \
378 ((u32)(__p0_mode)) << 8 | \
379 ((u32)(__p1_mode)))
380
381enum bfi_fwboot_type {
382 BFI_FWBOOT_TYPE_NORMAL = 0,
383 BFI_FWBOOT_TYPE_FLASH = 1,
384 BFI_FWBOOT_TYPE_MEMTEST = 2,
385};
386
387#define BFI_FWBOOT_TYPE_NORMAL 0
388#define BFI_FWBOOT_TYPE_MEMTEST 2
389#define BFI_FWBOOT_ENV_OS 0
390
391enum bfi_port_mode {
392 BFI_PORT_MODE_FC = 1,
393 BFI_PORT_MODE_ETH = 2,
394};
395
396struct bfi_ioc_hbeat_s {
397 struct bfi_mhdr_s mh; /* common msg header */
398 u32 hb_count; /* current heart beat count */
399};
400
401/*
402 * IOC hardware/firmware state
403 */
404enum bfi_ioc_state {
405 BFI_IOC_UNINIT = 0, /* not initialized */
406 BFI_IOC_INITING = 1, /* h/w is being initialized */
407 BFI_IOC_HWINIT = 2, /* h/w is initialized */
408 BFI_IOC_CFG = 3, /* IOC configuration in progress */
409 BFI_IOC_OP = 4, /* IOC is operational */
410 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
411 BFI_IOC_DISABLED = 6, /* IOC is disabled */
412 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
413 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
414 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
415};
416
417#define BFA_IOC_CB_JOIN_SH 16
418#define BFA_IOC_CB_FWSTATE_MASK 0x0000ffff
419#define BFA_IOC_CB_JOIN_MASK 0xffff0000
420
421#define BFI_IOC_ENDIAN_SIG 0x12345678
422
423enum {
424 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
425 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
426 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
427 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
428 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
429 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
430 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
431 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
432 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
433 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
434};
435
436#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
437 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
438 BFI_ADAPTER_ ## __prop ## _SH)
439#define BFI_ADAPTER_SETP(__prop, __val) \
440 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
441#define BFI_ADAPTER_IS_PROTO(__adap_type) \
442 ((__adap_type) & BFI_ADAPTER_PROTO)
443#define BFI_ADAPTER_IS_TTV(__adap_type) \
444 ((__adap_type) & BFI_ADAPTER_TTV)
445#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
446 ((__adap_type) & BFI_ADAPTER_UNSUPP)
447#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
448 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
449 BFI_ADAPTER_UNSUPP))
450
451/*
452 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
453 */
454struct bfi_ioc_ctrl_req_s {
455 struct bfi_mhdr_s mh;
456 u16 clscode;
457 u16 rsvd;
458 u32 tv_sec;
459};
460#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
461#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
462
463/*
464 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
465 */
466struct bfi_ioc_ctrl_reply_s {
467 struct bfi_mhdr_s mh; /* Common msg header */
468 u8 status; /* enable/disable status */
469 u8 port_mode; /* bfa_mode_s */
470 u8 cap_bm; /* capability bit mask */
471 u8 rsvd;
472};
473#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
474#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
475
476#define BFI_IOC_MSGSZ 8
477/*
478 * H2I Messages
479 */
480union bfi_ioc_h2i_msg_u {
481 struct bfi_mhdr_s mh;
482 struct bfi_ioc_ctrl_req_s enable_req;
483 struct bfi_ioc_ctrl_req_s disable_req;
484 struct bfi_ioc_getattr_req_s getattr_req;
485 u32 mboxmsg[BFI_IOC_MSGSZ];
486};
487
488/*
489 * I2H Messages
490 */
491union bfi_ioc_i2h_msg_u {
492 struct bfi_mhdr_s mh;
493 struct bfi_ioc_ctrl_reply_s fw_event;
494 u32 mboxmsg[BFI_IOC_MSGSZ];
495};
496
497
498/*
499 *----------------------------------------------------------------------
500 * PBC
501 *----------------------------------------------------------------------
502 */
503
504#define BFI_PBC_MAX_BLUNS 8
505#define BFI_PBC_MAX_VPORTS 16
506#define BFI_PBC_PORT_DISABLED 2
507
508/*
509 * PBC boot lun configuration
510 */
511struct bfi_pbc_blun_s {
512 wwn_t tgt_pwwn;
513 struct scsi_lun tgt_lun;
514};
515
516/*
517 * PBC virtual port configuration
518 */
519struct bfi_pbc_vport_s {
520 wwn_t vp_pwwn;
521 wwn_t vp_nwwn;
522};
523
524/*
525 * BFI pre-boot configuration information
526 */
527struct bfi_pbc_s {
528 u8 port_enabled;
529 u8 boot_enabled;
530 u8 nbluns;
531 u8 nvports;
532 u8 port_speed;
533 u8 rsvd_a;
534 u16 hss;
535 wwn_t pbc_pwwn;
536 wwn_t pbc_nwwn;
537 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
538 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
539};
540
541/*
542 *----------------------------------------------------------------------
543 * MSGQ
544 *----------------------------------------------------------------------
545 */
546#define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
547#define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
548#define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
549#define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
550
551/* q_depth must be power of 2 */
552#define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
553
554enum bfi_msgq_h2i_msgs_e {
555 BFI_MSGQ_H2I_INIT_REQ = 1,
556 BFI_MSGQ_H2I_DOORBELL = 2,
557 BFI_MSGQ_H2I_SHUTDOWN = 3,
558};
559
560enum bfi_msgq_i2h_msgs_e {
561 BFI_MSGQ_I2H_INIT_RSP = 1,
562 BFI_MSGQ_I2H_DOORBELL = 2,
563};
564
565
566/* Messages(commands/responsed/AENS will have the following header */
567struct bfi_msgq_mhdr_s {
568 u8 msg_class;
569 u8 msg_id;
570 u16 msg_token;
571 u16 num_entries;
572 u8 enet_id;
573 u8 rsvd[1];
574};
575
576#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
577 (_mh).msg_class = (_mc); \
578 (_mh).msg_id = (_mid); \
579 (_mh).msg_token = (_tok); \
580 (_mh).enet_id = (_enet_id); \
581} while (0)
582
583/*
584 * Mailbox for messaging interface
585 *
586*/
587#define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
588#define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
589#define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
590
591struct bfi_msgq_s {
592 union bfi_addr_u addr;
593 u16 q_depth; /* Total num of entries in the queue */
594 u8 rsvd[2];
595};
596
597/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
598struct bfi_msgq_cfg_req_s {
599 struct bfi_mhdr_s mh;
600 struct bfi_msgq_s cmdq;
601 struct bfi_msgq_s rspq;
602};
603
604/* BFI_ENET_MSGQ_CFG_RSP */
605struct bfi_msgq_cfg_rsp_s {
606 struct bfi_mhdr_s mh;
607 u8 cmd_status;
608 u8 rsvd[3];
609};
610
611
612/* BFI_MSGQ_H2I_DOORBELL */
613struct bfi_msgq_h2i_db_s {
614 struct bfi_mhdr_s mh;
615 u16 cmdq_pi;
616 u16 rspq_ci;
617};
618
619/* BFI_MSGQ_I2H_DOORBELL */
620struct bfi_msgq_i2h_db_s {
621 struct bfi_mhdr_s mh;
622 u16 rspq_pi;
623 u16 cmdq_ci;
624};
625
626#pragma pack()
627
628/* BFI port specific */
629#pragma pack(1)
630
631enum bfi_port_h2i {
632 BFI_PORT_H2I_ENABLE_REQ = (1),
633 BFI_PORT_H2I_DISABLE_REQ = (2),
634 BFI_PORT_H2I_GET_STATS_REQ = (3),
635 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
636};
637
638enum bfi_port_i2h {
639 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
640 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
641 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
642 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
643};
644
645/*
646 * Generic REQ type
647 */
648struct bfi_port_generic_req_s {
649 struct bfi_mhdr_s mh; /* msg header */
650 u32 msgtag; /* msgtag for reply */
651 u32 rsvd;
652};
653
654/*
655 * Generic RSP type
656 */
657struct bfi_port_generic_rsp_s {
658 struct bfi_mhdr_s mh; /* common msg header */
659 u8 status; /* port enable status */
660 u8 rsvd[3];
661 u32 msgtag; /* msgtag for reply */
662};
663
664/*
665 * BFI_PORT_H2I_GET_STATS_REQ
666 */
667struct bfi_port_get_stats_req_s {
668 struct bfi_mhdr_s mh; /* common msg header */
669 union bfi_addr_u dma_addr;
670};
671
672union bfi_port_h2i_msg_u {
673 struct bfi_mhdr_s mh;
674 struct bfi_port_generic_req_s enable_req;
675 struct bfi_port_generic_req_s disable_req;
676 struct bfi_port_get_stats_req_s getstats_req;
677 struct bfi_port_generic_req_s clearstats_req;
678};
679
680union bfi_port_i2h_msg_u {
681 struct bfi_mhdr_s mh;
682 struct bfi_port_generic_rsp_s enable_rsp;
683 struct bfi_port_generic_rsp_s disable_rsp;
684 struct bfi_port_generic_rsp_s getstats_rsp;
685 struct bfi_port_generic_rsp_s clearstats_rsp;
686};
687
688/*
689 *----------------------------------------------------------------------
690 * ABLK
691 *----------------------------------------------------------------------
692 */
693enum bfi_ablk_h2i_msgs_e {
694 BFI_ABLK_H2I_QUERY = 1,
695 BFI_ABLK_H2I_ADPT_CONFIG = 2,
696 BFI_ABLK_H2I_PORT_CONFIG = 3,
697 BFI_ABLK_H2I_PF_CREATE = 4,
698 BFI_ABLK_H2I_PF_DELETE = 5,
699 BFI_ABLK_H2I_PF_UPDATE = 6,
700 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
701 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
702};
703
704enum bfi_ablk_i2h_msgs_e {
705 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
706 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
707 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
708 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
709 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
710 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
711 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
712 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
713};
714
715/* BFI_ABLK_H2I_QUERY */
716struct bfi_ablk_h2i_query_s {
717 struct bfi_mhdr_s mh;
718 union bfi_addr_u addr;
719};
720
721/* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
722struct bfi_ablk_h2i_cfg_req_s {
723 struct bfi_mhdr_s mh;
724 u8 mode;
725 u8 port;
726 u8 max_pf;
727 u8 max_vf;
728};
729
730/*
731 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
732 */
733struct bfi_ablk_h2i_pf_req_s {
734 struct bfi_mhdr_s mh;
735 u8 pcifn;
736 u8 port;
737 u16 pers;
738 u16 bw_min; /* percent BW @ max speed */
739 u16 bw_max; /* percent BW @ max speed */
740};
741
742/* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
743struct bfi_ablk_h2i_optrom_s {
744 struct bfi_mhdr_s mh;
745};
746
747/*
748 * BFI_ABLK_I2H_QUERY
749 * BFI_ABLK_I2H_PORT_CONFIG
750 * BFI_ABLK_I2H_PF_CREATE
751 * BFI_ABLK_I2H_PF_DELETE
752 * BFI_ABLK_I2H_PF_UPDATE
753 * BFI_ABLK_I2H_OPTROM_ENABLE
754 * BFI_ABLK_I2H_OPTROM_DISABLE
755 */
756struct bfi_ablk_i2h_rsp_s {
757 struct bfi_mhdr_s mh;
758 u8 status;
759 u8 pcifn;
760 u8 port_mode;
761};
762
763
764/*
765 * CEE module specific messages
766 */
767
768/* Mailbox commands from host to firmware */
769enum bfi_cee_h2i_msgs_e {
770 BFI_CEE_H2I_GET_CFG_REQ = 1,
771 BFI_CEE_H2I_RESET_STATS = 2,
772 BFI_CEE_H2I_GET_STATS_REQ = 3,
773};
774
775enum bfi_cee_i2h_msgs_e {
776 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
777 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
778 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
779};
780
781/*
782 * H2I command structure for resetting the stats
783 */
784struct bfi_cee_reset_stats_s {
785 struct bfi_mhdr_s mh;
786};
787
788/*
789 * Get configuration command from host
790 */
791struct bfi_cee_get_req_s {
792 struct bfi_mhdr_s mh;
793 union bfi_addr_u dma_addr;
794};
795
796/*
797 * Reply message from firmware
798 */
799struct bfi_cee_get_rsp_s {
800 struct bfi_mhdr_s mh;
801 u8 cmd_status;
802 u8 rsvd[3];
803};
804
805/*
806 * Reply message from firmware
807 */
808struct bfi_cee_stats_rsp_s {
809 struct bfi_mhdr_s mh;
810 u8 cmd_status;
811 u8 rsvd[3];
812};
813
814/* Mailbox message structures from firmware to host */
815union bfi_cee_i2h_msg_u {
816 struct bfi_mhdr_s mh;
817 struct bfi_cee_get_rsp_s get_rsp;
818 struct bfi_cee_stats_rsp_s stats_rsp;
819};
820
821/*
822 * SFP related
823 */
824
825enum bfi_sfp_h2i_e {
826 BFI_SFP_H2I_SHOW = 1,
827 BFI_SFP_H2I_SCN = 2,
828};
829
830enum bfi_sfp_i2h_e {
831 BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
832 BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN),
833};
834
835/*
836 * SFP state change notification
837 */
838struct bfi_sfp_scn_s {
839 struct bfi_mhdr_s mhr; /* host msg header */
840 u8 event;
841 u8 sfpid;
842 u8 pomlvl; /* pom level: normal/warning/alarm */
843 u8 is_elb; /* e-loopback */
844};
845
846/*
847 * SFP state
848 */
849enum bfa_sfp_stat_e {
850 BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */
851 BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */
852 BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */
853 BFA_SFP_STATE_VALID = 3, /* SFP is valid */
854 BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */
855 BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */
856};
857
858/*
859 * SFP memory access type
860 */
861enum bfi_sfp_mem_e {
862 BFI_SFP_MEM_ALL = 0x1, /* access all data field */
863 BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */
864};
865
866struct bfi_sfp_req_s {
867 struct bfi_mhdr_s mh;
868 u8 memtype;
869 u8 rsvd[3];
870 struct bfi_alen_s alen;
871};
872
873struct bfi_sfp_rsp_s {
874 struct bfi_mhdr_s mh;
875 u8 status;
876 u8 state;
877 u8 rsvd[2];
878};
879
880/*
881 * FLASH module specific
882 */
883enum bfi_flash_h2i_msgs {
884 BFI_FLASH_H2I_QUERY_REQ = 1,
885 BFI_FLASH_H2I_ERASE_REQ = 2,
886 BFI_FLASH_H2I_WRITE_REQ = 3,
887 BFI_FLASH_H2I_READ_REQ = 4,
888 BFI_FLASH_H2I_BOOT_VER_REQ = 5,
889};
890
891enum bfi_flash_i2h_msgs {
892 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
893 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
894 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
895 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
896 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
897 BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
898};
899
900/*
901 * Flash query request
902 */
903struct bfi_flash_query_req_s {
904 struct bfi_mhdr_s mh; /* Common msg header */
905 struct bfi_alen_s alen;
906};
907
908/*
909 * Flash erase request
910 */
911struct bfi_flash_erase_req_s {
912 struct bfi_mhdr_s mh; /* Common msg header */
913 u32 type; /* partition type */
914 u8 instance; /* partition instance */
915 u8 rsv[3];
916};
917
918/*
919 * Flash write request
920 */
921struct bfi_flash_write_req_s {
922 struct bfi_mhdr_s mh; /* Common msg header */
923 struct bfi_alen_s alen;
924 u32 type; /* partition type */
925 u8 instance; /* partition instance */
926 u8 last;
927 u8 rsv[2];
928 u32 offset;
929 u32 length;
930};
931
932/*
933 * Flash read request
934 */
935struct bfi_flash_read_req_s {
936 struct bfi_mhdr_s mh; /* Common msg header */
937 u32 type; /* partition type */
938 u8 instance; /* partition instance */
939 u8 rsv[3];
940 u32 offset;
941 u32 length;
942 struct bfi_alen_s alen;
943};
944
945/*
946 * Flash query response
947 */
948struct bfi_flash_query_rsp_s {
949 struct bfi_mhdr_s mh; /* Common msg header */
950 u32 status;
951};
952
953/*
954 * Flash read response
955 */
956struct bfi_flash_read_rsp_s {
957 struct bfi_mhdr_s mh; /* Common msg header */
958 u32 type; /* partition type */
959 u8 instance; /* partition instance */
960 u8 rsv[3];
961 u32 status;
962 u32 length;
963};
964
965/*
966 * Flash write response
967 */
968struct bfi_flash_write_rsp_s {
969 struct bfi_mhdr_s mh; /* Common msg header */
970 u32 type; /* partition type */
971 u8 instance; /* partition instance */
972 u8 rsv[3];
973 u32 status;
974 u32 length;
975};
976
977/*
978 * Flash erase response
979 */
980struct bfi_flash_erase_rsp_s {
981 struct bfi_mhdr_s mh; /* Common msg header */
982 u32 type; /* partition type */
983 u8 instance; /* partition instance */
984 u8 rsv[3];
985 u32 status;
986};
987
988/*
989 * Flash event notification
990 */
991struct bfi_flash_event_s {
992 struct bfi_mhdr_s mh; /* Common msg header */
993 bfa_status_t status;
994 u32 param;
995};
996
997/*
998 *----------------------------------------------------------------------
999 * DIAG
1000 *----------------------------------------------------------------------
1001 */
1002enum bfi_diag_h2i {
1003 BFI_DIAG_H2I_PORTBEACON = 1,
1004 BFI_DIAG_H2I_LOOPBACK = 2,
1005 BFI_DIAG_H2I_FWPING = 3,
1006 BFI_DIAG_H2I_TEMPSENSOR = 4,
1007 BFI_DIAG_H2I_LEDTEST = 5,
1008 BFI_DIAG_H2I_QTEST = 6,
1009 BFI_DIAG_H2I_DPORT = 7,
1010};
1011
1012enum bfi_diag_i2h {
1013 BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
1014 BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
1015 BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
1016 BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
1017 BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
1018 BFI_DIAG_I2H_QTEST = BFA_I2HM(BFI_DIAG_H2I_QTEST),
1019 BFI_DIAG_I2H_DPORT = BFA_I2HM(BFI_DIAG_H2I_DPORT),
1020 BFI_DIAG_I2H_DPORT_SCN = BFA_I2HM(8),
1021};
1022
1023#define BFI_DIAG_MAX_SGES 2
1024#define BFI_DIAG_DMA_BUF_SZ (2 * 1024)
1025#define BFI_BOOT_MEMTEST_RES_ADDR 0x900
1026#define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3
1027
1028struct bfi_diag_lb_req_s {
1029 struct bfi_mhdr_s mh;
1030 u32 loopcnt;
1031 u32 pattern;
1032 u8 lb_mode; /*!< bfa_port_opmode_t */
1033 u8 speed; /*!< bfa_port_speed_t */
1034 u8 rsvd[2];
1035};
1036
1037struct bfi_diag_lb_rsp_s {
1038 struct bfi_mhdr_s mh; /* 4 bytes */
1039 struct bfa_diag_loopback_result_s res; /* 16 bytes */
1040};
1041
1042struct bfi_diag_fwping_req_s {
1043 struct bfi_mhdr_s mh; /* 4 bytes */
1044 struct bfi_alen_s alen; /* 12 bytes */
1045 u32 data; /* user input data pattern */
1046 u32 count; /* user input dma count */
1047 u8 qtag; /* track CPE vc */
1048 u8 rsv[3];
1049};
1050
1051struct bfi_diag_fwping_rsp_s {
1052 struct bfi_mhdr_s mh; /* 4 bytes */
1053 u32 data; /* user input data pattern */
1054 u8 qtag; /* track CPE vc */
1055 u8 dma_status; /* dma status */
1056 u8 rsv[2];
1057};
1058
1059/*
1060 * Temperature Sensor
1061 */
1062struct bfi_diag_ts_req_s {
1063 struct bfi_mhdr_s mh; /* 4 bytes */
1064 u16 temp; /* 10-bit A/D value */
1065 u16 brd_temp; /* 9-bit board temp */
1066 u8 status;
1067 u8 ts_junc; /* show junction tempsensor */
1068 u8 ts_brd; /* show board tempsensor */
1069 u8 rsv;
1070};
1071#define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1072
1073struct bfi_diag_ledtest_req_s {
1074 struct bfi_mhdr_s mh; /* 4 bytes */
1075 u8 cmd;
1076 u8 color;
1077 u8 portid;
1078 u8 led; /* bitmap of LEDs to be tested */
1079 u16 freq; /* no. of blinks every 10 secs */
1080 u8 rsv[2];
1081};
1082
1083/* notify host led operation is done */
1084struct bfi_diag_ledtest_rsp_s {
1085 struct bfi_mhdr_s mh; /* 4 bytes */
1086};
1087
1088struct bfi_diag_portbeacon_req_s {
1089 struct bfi_mhdr_s mh; /* 4 bytes */
1090 u32 period; /* beaconing period */
1091 u8 beacon; /* 1: beacon on */
1092 u8 rsvd[3];
1093};
1094
1095/* notify host the beacon is off */
1096struct bfi_diag_portbeacon_rsp_s {
1097 struct bfi_mhdr_s mh; /* 4 bytes */
1098};
1099
1100struct bfi_diag_qtest_req_s {
1101 struct bfi_mhdr_s mh; /* 4 bytes */
1102 u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1103};
1104#define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1105
1106/*
1107 * D-port test
1108 */
1109enum bfi_dport_req {
1110 BFI_DPORT_DISABLE = 0, /* disable dport request */
1111 BFI_DPORT_ENABLE = 1, /* enable dport request */
1112 BFI_DPORT_START = 2, /* start dport request */
1113 BFI_DPORT_SHOW = 3, /* show dport request */
1114 BFI_DPORT_DYN_DISABLE = 4, /* disable dynamic dport request */
1115};
1116
1117enum bfi_dport_scn {
1118 BFI_DPORT_SCN_TESTSTART = 1,
1119 BFI_DPORT_SCN_TESTCOMP = 2,
1120 BFI_DPORT_SCN_SFP_REMOVED = 3,
1121 BFI_DPORT_SCN_DDPORT_ENABLE = 4,
1122 BFI_DPORT_SCN_DDPORT_DISABLE = 5,
1123 BFI_DPORT_SCN_FCPORT_DISABLE = 6,
1124 BFI_DPORT_SCN_SUBTESTSTART = 7,
1125 BFI_DPORT_SCN_TESTSKIP = 8,
1126 BFI_DPORT_SCN_DDPORT_DISABLED = 9,
1127};
1128
1129struct bfi_diag_dport_req_s {
1130 struct bfi_mhdr_s mh; /* 4 bytes */
1131 u8 req; /* request 1: enable 0: disable */
1132 u8 rsvd[3];
1133 u32 lpcnt;
1134 u32 payload;
1135};
1136
1137struct bfi_diag_dport_rsp_s {
1138 struct bfi_mhdr_s mh; /* header 4 bytes */
1139 bfa_status_t status; /* reply status */
1140 wwn_t pwwn; /* switch port wwn. 8 bytes */
1141 wwn_t nwwn; /* switch node wwn. 8 bytes */
1142};
1143
1144struct bfi_diag_dport_scn_teststart_s {
1145 wwn_t pwwn; /* switch port wwn. 8 bytes */
1146 wwn_t nwwn; /* switch node wwn. 8 bytes */
1147 u8 type; /* bfa_diag_dport_test_type_e */
1148 u8 mode; /* bfa_diag_dport_test_opmode */
1149 u8 rsvd[2];
1150 u32 numfrm; /* from switch uint in 1M */
1151};
1152
1153struct bfi_diag_dport_scn_testcomp_s {
1154 u8 status; /* bfa_diag_dport_test_status_e */
1155 u8 speed; /* bfa_port_speed_t */
1156 u16 numbuffer; /* from switch */
1157 u8 subtest_status[DPORT_TEST_MAX]; /* 4 bytes */
1158 u32 latency; /* from switch */
1159 u32 distance; /* from swtich unit in meters */
1160 /* Buffers required to saturate the link */
1161 u16 frm_sz; /* from switch for buf_reqd */
1162 u8 rsvd[2];
1163};
1164
1165struct bfi_diag_dport_scn_s { /* max size == RDS_RMESZ */
1166 struct bfi_mhdr_s mh; /* header 4 bytes */
1167 u8 state; /* new state */
1168 u8 rsvd[3];
1169 union {
1170 struct bfi_diag_dport_scn_teststart_s teststart;
1171 struct bfi_diag_dport_scn_testcomp_s testcomp;
1172 } info;
1173};
1174
1175union bfi_diag_dport_msg_u {
1176 struct bfi_diag_dport_req_s req;
1177 struct bfi_diag_dport_rsp_s rsp;
1178 struct bfi_diag_dport_scn_s scn;
1179};
1180
1181/*
1182 * PHY module specific
1183 */
1184enum bfi_phy_h2i_msgs_e {
1185 BFI_PHY_H2I_QUERY_REQ = 1,
1186 BFI_PHY_H2I_STATS_REQ = 2,
1187 BFI_PHY_H2I_WRITE_REQ = 3,
1188 BFI_PHY_H2I_READ_REQ = 4,
1189};
1190
1191enum bfi_phy_i2h_msgs_e {
1192 BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1193 BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1194 BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1195 BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1196};
1197
1198/*
1199 * External PHY query request
1200 */
1201struct bfi_phy_query_req_s {
1202 struct bfi_mhdr_s mh; /* Common msg header */
1203 u8 instance;
1204 u8 rsv[3];
1205 struct bfi_alen_s alen;
1206};
1207
1208/*
1209 * External PHY stats request
1210 */
1211struct bfi_phy_stats_req_s {
1212 struct bfi_mhdr_s mh; /* Common msg header */
1213 u8 instance;
1214 u8 rsv[3];
1215 struct bfi_alen_s alen;
1216};
1217
1218/*
1219 * External PHY write request
1220 */
1221struct bfi_phy_write_req_s {
1222 struct bfi_mhdr_s mh; /* Common msg header */
1223 u8 instance;
1224 u8 last;
1225 u8 rsv[2];
1226 u32 offset;
1227 u32 length;
1228 struct bfi_alen_s alen;
1229};
1230
1231/*
1232 * External PHY read request
1233 */
1234struct bfi_phy_read_req_s {
1235 struct bfi_mhdr_s mh; /* Common msg header */
1236 u8 instance;
1237 u8 rsv[3];
1238 u32 offset;
1239 u32 length;
1240 struct bfi_alen_s alen;
1241};
1242
1243/*
1244 * External PHY query response
1245 */
1246struct bfi_phy_query_rsp_s {
1247 struct bfi_mhdr_s mh; /* Common msg header */
1248 u32 status;
1249};
1250
1251/*
1252 * External PHY stats response
1253 */
1254struct bfi_phy_stats_rsp_s {
1255 struct bfi_mhdr_s mh; /* Common msg header */
1256 u32 status;
1257};
1258
1259/*
1260 * External PHY read response
1261 */
1262struct bfi_phy_read_rsp_s {
1263 struct bfi_mhdr_s mh; /* Common msg header */
1264 u32 status;
1265 u32 length;
1266};
1267
1268/*
1269 * External PHY write response
1270 */
1271struct bfi_phy_write_rsp_s {
1272 struct bfi_mhdr_s mh; /* Common msg header */
1273 u32 status;
1274 u32 length;
1275};
1276
1277enum bfi_fru_h2i_msgs {
1278 BFI_FRUVPD_H2I_WRITE_REQ = 1,
1279 BFI_FRUVPD_H2I_READ_REQ = 2,
1280 BFI_TFRU_H2I_WRITE_REQ = 3,
1281 BFI_TFRU_H2I_READ_REQ = 4,
1282};
1283
1284enum bfi_fru_i2h_msgs {
1285 BFI_FRUVPD_I2H_WRITE_RSP = BFA_I2HM(1),
1286 BFI_FRUVPD_I2H_READ_RSP = BFA_I2HM(2),
1287 BFI_TFRU_I2H_WRITE_RSP = BFA_I2HM(3),
1288 BFI_TFRU_I2H_READ_RSP = BFA_I2HM(4),
1289};
1290
1291/*
1292 * FRU write request
1293 */
1294struct bfi_fru_write_req_s {
1295 struct bfi_mhdr_s mh; /* Common msg header */
1296 u8 last;
1297 u8 rsv_1[3];
1298 u8 trfr_cmpl;
1299 u8 rsv_2[3];
1300 u32 offset;
1301 u32 length;
1302 struct bfi_alen_s alen;
1303};
1304
1305/*
1306 * FRU read request
1307 */
1308struct bfi_fru_read_req_s {
1309 struct bfi_mhdr_s mh; /* Common msg header */
1310 u32 offset;
1311 u32 length;
1312 struct bfi_alen_s alen;
1313};
1314
1315/*
1316 * FRU response
1317 */
1318struct bfi_fru_rsp_s {
1319 struct bfi_mhdr_s mh; /* Common msg header */
1320 u32 status;
1321 u32 length;
1322};
1323#pragma pack()
1324
1325#endif /* __BFI_H__ */