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1/*
2 * drivers/s390/net/ctcm_fsms.h
3 *
4 * Copyright IBM Corp. 2001, 2007
5 * Authors: Fritz Elfert (felfert@millenux.com)
6 * Peter Tiedemann (ptiedem@de.ibm.com)
7 * MPC additions :
8 * Belinda Thompson (belindat@us.ibm.com)
9 * Andy Richter (richtera@us.ibm.com)
10 */
11#ifndef _CTCM_FSMS_H_
12#define _CTCM_FSMS_H_
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/slab.h>
18#include <linux/errno.h>
19#include <linux/types.h>
20#include <linux/interrupt.h>
21#include <linux/timer.h>
22#include <linux/bitops.h>
23
24#include <linux/signal.h>
25#include <linux/string.h>
26
27#include <linux/ip.h>
28#include <linux/if_arp.h>
29#include <linux/tcp.h>
30#include <linux/skbuff.h>
31#include <linux/ctype.h>
32#include <net/dst.h>
33
34#include <linux/io.h>
35#include <asm/ccwdev.h>
36#include <asm/ccwgroup.h>
37#include <linux/uaccess.h>
38
39#include <asm/idals.h>
40
41#include "fsm.h"
42#include "ctcm_main.h"
43
44/*
45 * Definitions for the channel statemachine(s) for ctc and ctcmpc
46 *
47 * To allow better kerntyping, prefix-less definitions for channel states
48 * and channel events have been replaced :
49 * ch_event... -> ctc_ch_event...
50 * CH_EVENT... -> CTC_EVENT...
51 * ch_state... -> ctc_ch_state...
52 * CH_STATE... -> CTC_STATE...
53 */
54/*
55 * Events of the channel statemachine(s) for ctc and ctcmpc
56 */
57enum ctc_ch_events {
58 /*
59 * Events, representing return code of
60 * I/O operations (ccw_device_start, ccw_device_halt et al.)
61 */
62 CTC_EVENT_IO_SUCCESS,
63 CTC_EVENT_IO_EBUSY,
64 CTC_EVENT_IO_ENODEV,
65 CTC_EVENT_IO_UNKNOWN,
66
67 CTC_EVENT_ATTNBUSY,
68 CTC_EVENT_ATTN,
69 CTC_EVENT_BUSY,
70 /*
71 * Events, representing unit-check
72 */
73 CTC_EVENT_UC_RCRESET,
74 CTC_EVENT_UC_RSRESET,
75 CTC_EVENT_UC_TXTIMEOUT,
76 CTC_EVENT_UC_TXPARITY,
77 CTC_EVENT_UC_HWFAIL,
78 CTC_EVENT_UC_RXPARITY,
79 CTC_EVENT_UC_ZERO,
80 CTC_EVENT_UC_UNKNOWN,
81 /*
82 * Events, representing subchannel-check
83 */
84 CTC_EVENT_SC_UNKNOWN,
85 /*
86 * Events, representing machine checks
87 */
88 CTC_EVENT_MC_FAIL,
89 CTC_EVENT_MC_GOOD,
90 /*
91 * Event, representing normal IRQ
92 */
93 CTC_EVENT_IRQ,
94 CTC_EVENT_FINSTAT,
95 /*
96 * Event, representing timer expiry.
97 */
98 CTC_EVENT_TIMER,
99 /*
100 * Events, representing commands from upper levels.
101 */
102 CTC_EVENT_START,
103 CTC_EVENT_STOP,
104 CTC_NR_EVENTS,
105 /*
106 * additional MPC events
107 */
108 CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
109 CTC_EVENT_RSWEEP_TIMER,
110 /*
111 * MUST be always the last element!!
112 */
113 CTC_MPC_NR_EVENTS,
114};
115
116/*
117 * States of the channel statemachine(s) for ctc and ctcmpc.
118 */
119enum ctc_ch_states {
120 /*
121 * Channel not assigned to any device,
122 * initial state, direction invalid
123 */
124 CTC_STATE_IDLE,
125 /*
126 * Channel assigned but not operating
127 */
128 CTC_STATE_STOPPED,
129 CTC_STATE_STARTWAIT,
130 CTC_STATE_STARTRETRY,
131 CTC_STATE_SETUPWAIT,
132 CTC_STATE_RXINIT,
133 CTC_STATE_TXINIT,
134 CTC_STATE_RX,
135 CTC_STATE_TX,
136 CTC_STATE_RXIDLE,
137 CTC_STATE_TXIDLE,
138 CTC_STATE_RXERR,
139 CTC_STATE_TXERR,
140 CTC_STATE_TERM,
141 CTC_STATE_DTERM,
142 CTC_STATE_NOTOP,
143 CTC_NR_STATES, /* MUST be the last element of non-expanded states */
144 /*
145 * additional MPC states
146 */
147 CH_XID0_PENDING = CTC_NR_STATES,
148 CH_XID0_INPROGRESS,
149 CH_XID7_PENDING,
150 CH_XID7_PENDING1,
151 CH_XID7_PENDING2,
152 CH_XID7_PENDING3,
153 CH_XID7_PENDING4,
154 CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
155};
156
157extern const char *ctc_ch_event_names[];
158
159extern const char *ctc_ch_state_names[];
160
161void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
162void ctcm_purge_skb_queue(struct sk_buff_head *q);
163void fsm_action_nop(fsm_instance *fi, int event, void *arg);
164
165/*
166 * ----- non-static actions for ctcm channel statemachine -----
167 *
168 */
169void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
170
171/*
172 * ----- FSM (state/event/action) of the ctcm channel statemachine -----
173 */
174extern const fsm_node ch_fsm[];
175extern int ch_fsm_len;
176
177
178/*
179 * ----- non-static actions for ctcmpc channel statemachine ----
180 *
181 */
182/* shared :
183void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
184 */
185void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
186
187/*
188 * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
189 */
190extern const fsm_node ctcmpc_ch_fsm[];
191extern int mpc_ch_fsm_len;
192
193/*
194 * Definitions for the device interface statemachine for ctc and mpc
195 */
196
197/*
198 * States of the device interface statemachine.
199 */
200enum dev_states {
201 DEV_STATE_STOPPED,
202 DEV_STATE_STARTWAIT_RXTX,
203 DEV_STATE_STARTWAIT_RX,
204 DEV_STATE_STARTWAIT_TX,
205 DEV_STATE_STOPWAIT_RXTX,
206 DEV_STATE_STOPWAIT_RX,
207 DEV_STATE_STOPWAIT_TX,
208 DEV_STATE_RUNNING,
209 /*
210 * MUST be always the last element!!
211 */
212 CTCM_NR_DEV_STATES
213};
214
215extern const char *dev_state_names[];
216
217/*
218 * Events of the device interface statemachine.
219 * ctcm and ctcmpc
220 */
221enum dev_events {
222 DEV_EVENT_START,
223 DEV_EVENT_STOP,
224 DEV_EVENT_RXUP,
225 DEV_EVENT_TXUP,
226 DEV_EVENT_RXDOWN,
227 DEV_EVENT_TXDOWN,
228 DEV_EVENT_RESTART,
229 /*
230 * MUST be always the last element!!
231 */
232 CTCM_NR_DEV_EVENTS
233};
234
235extern const char *dev_event_names[];
236
237/*
238 * Actions for the device interface statemachine.
239 * ctc and ctcmpc
240 */
241/*
242static void dev_action_start(fsm_instance * fi, int event, void *arg);
243static void dev_action_stop(fsm_instance * fi, int event, void *arg);
244static void dev_action_restart(fsm_instance *fi, int event, void *arg);
245static void dev_action_chup(fsm_instance * fi, int event, void *arg);
246static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
247*/
248
249/*
250 * The (state/event/action) fsm table of the device interface statemachine.
251 * ctcm and ctcmpc
252 */
253extern const fsm_node dev_fsm[];
254extern int dev_fsm_len;
255
256
257/*
258 * Definitions for the MPC Group statemachine
259 */
260
261/*
262 * MPC Group Station FSM States
263
264State Name When In This State
265====================== =======================================
266MPCG_STATE_RESET Initial State When Driver Loaded
267 We receive and send NOTHING
268
269MPCG_STATE_INOP INOP Received.
270 Group level non-recoverable error
271
272MPCG_STATE_READY XID exchanges for at least 1 write and
273 1 read channel have completed.
274 Group is ready for data transfer.
275
276States from ctc_mpc_alloc_channel
277==============================================================
278MPCG_STATE_XID2INITW Awaiting XID2(0) Initiation
279 ATTN from other side will start
280 XID negotiations.
281 Y-side protocol only.
282
283MPCG_STATE_XID2INITX XID2(0) negotiations are in progress.
284 At least 1, but not all, XID2(0)'s
285 have been received from partner.
286
287MPCG_STATE_XID7INITW XID2(0) complete
288 No XID2(7)'s have yet been received.
289 XID2(7) negotiations pending.
290
291MPCG_STATE_XID7INITX XID2(7) negotiations in progress.
292 At least 1, but not all, XID2(7)'s
293 have been received from partner.
294
295MPCG_STATE_XID7INITF XID2(7) negotiations complete.
296 Transitioning to READY.
297
298MPCG_STATE_READY Ready for Data Transfer.
299
300
301States from ctc_mpc_establish_connectivity call
302==============================================================
303MPCG_STATE_XID0IOWAIT Initiating XID2(0) negotiations.
304 X-side protocol only.
305 ATTN-BUSY from other side will convert
306 this to Y-side protocol and the
307 ctc_mpc_alloc_channel flow will begin.
308
309MPCG_STATE_XID0IOWAIX XID2(0) negotiations are in progress.
310 At least 1, but not all, XID2(0)'s
311 have been received from partner.
312
313MPCG_STATE_XID7INITI XID2(0) complete
314 No XID2(7)'s have yet been received.
315 XID2(7) negotiations pending.
316
317MPCG_STATE_XID7INITZ XID2(7) negotiations in progress.
318 At least 1, but not all, XID2(7)'s
319 have been received from partner.
320
321MPCG_STATE_XID7INITF XID2(7) negotiations complete.
322 Transitioning to READY.
323
324MPCG_STATE_READY Ready for Data Transfer.
325
326*/
327
328enum mpcg_events {
329 MPCG_EVENT_INOP,
330 MPCG_EVENT_DISCONC,
331 MPCG_EVENT_XID0DO,
332 MPCG_EVENT_XID2,
333 MPCG_EVENT_XID2DONE,
334 MPCG_EVENT_XID7DONE,
335 MPCG_EVENT_TIMER,
336 MPCG_EVENT_DOIO,
337 MPCG_NR_EVENTS,
338};
339
340enum mpcg_states {
341 MPCG_STATE_RESET,
342 MPCG_STATE_INOP,
343 MPCG_STATE_XID2INITW,
344 MPCG_STATE_XID2INITX,
345 MPCG_STATE_XID7INITW,
346 MPCG_STATE_XID7INITX,
347 MPCG_STATE_XID0IOWAIT,
348 MPCG_STATE_XID0IOWAIX,
349 MPCG_STATE_XID7INITI,
350 MPCG_STATE_XID7INITZ,
351 MPCG_STATE_XID7INITF,
352 MPCG_STATE_FLOWC,
353 MPCG_STATE_READY,
354 MPCG_NR_STATES,
355};
356
357#endif
358/* --- This is the END my friend --- */
1/*
2 * Copyright IBM Corp. 2001, 2007
3 * Authors: Fritz Elfert (felfert@millenux.com)
4 * Peter Tiedemann (ptiedem@de.ibm.com)
5 * MPC additions :
6 * Belinda Thompson (belindat@us.ibm.com)
7 * Andy Richter (richtera@us.ibm.com)
8 */
9#ifndef _CTCM_FSMS_H_
10#define _CTCM_FSMS_H_
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/slab.h>
16#include <linux/errno.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/timer.h>
20#include <linux/bitops.h>
21
22#include <linux/signal.h>
23#include <linux/string.h>
24
25#include <linux/ip.h>
26#include <linux/if_arp.h>
27#include <linux/tcp.h>
28#include <linux/skbuff.h>
29#include <linux/ctype.h>
30#include <net/dst.h>
31
32#include <linux/io.h>
33#include <asm/ccwdev.h>
34#include <asm/ccwgroup.h>
35#include <linux/uaccess.h>
36
37#include <asm/idals.h>
38
39#include "fsm.h"
40#include "ctcm_main.h"
41
42/*
43 * Definitions for the channel statemachine(s) for ctc and ctcmpc
44 *
45 * To allow better kerntyping, prefix-less definitions for channel states
46 * and channel events have been replaced :
47 * ch_event... -> ctc_ch_event...
48 * CH_EVENT... -> CTC_EVENT...
49 * ch_state... -> ctc_ch_state...
50 * CH_STATE... -> CTC_STATE...
51 */
52/*
53 * Events of the channel statemachine(s) for ctc and ctcmpc
54 */
55enum ctc_ch_events {
56 /*
57 * Events, representing return code of
58 * I/O operations (ccw_device_start, ccw_device_halt et al.)
59 */
60 CTC_EVENT_IO_SUCCESS,
61 CTC_EVENT_IO_EBUSY,
62 CTC_EVENT_IO_ENODEV,
63 CTC_EVENT_IO_UNKNOWN,
64
65 CTC_EVENT_ATTNBUSY,
66 CTC_EVENT_ATTN,
67 CTC_EVENT_BUSY,
68 /*
69 * Events, representing unit-check
70 */
71 CTC_EVENT_UC_RCRESET,
72 CTC_EVENT_UC_RSRESET,
73 CTC_EVENT_UC_TXTIMEOUT,
74 CTC_EVENT_UC_TXPARITY,
75 CTC_EVENT_UC_HWFAIL,
76 CTC_EVENT_UC_RXPARITY,
77 CTC_EVENT_UC_ZERO,
78 CTC_EVENT_UC_UNKNOWN,
79 /*
80 * Events, representing subchannel-check
81 */
82 CTC_EVENT_SC_UNKNOWN,
83 /*
84 * Events, representing machine checks
85 */
86 CTC_EVENT_MC_FAIL,
87 CTC_EVENT_MC_GOOD,
88 /*
89 * Event, representing normal IRQ
90 */
91 CTC_EVENT_IRQ,
92 CTC_EVENT_FINSTAT,
93 /*
94 * Event, representing timer expiry.
95 */
96 CTC_EVENT_TIMER,
97 /*
98 * Events, representing commands from upper levels.
99 */
100 CTC_EVENT_START,
101 CTC_EVENT_STOP,
102 CTC_NR_EVENTS,
103 /*
104 * additional MPC events
105 */
106 CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
107 CTC_EVENT_RSWEEP_TIMER,
108 /*
109 * MUST be always the last element!!
110 */
111 CTC_MPC_NR_EVENTS,
112};
113
114/*
115 * States of the channel statemachine(s) for ctc and ctcmpc.
116 */
117enum ctc_ch_states {
118 /*
119 * Channel not assigned to any device,
120 * initial state, direction invalid
121 */
122 CTC_STATE_IDLE,
123 /*
124 * Channel assigned but not operating
125 */
126 CTC_STATE_STOPPED,
127 CTC_STATE_STARTWAIT,
128 CTC_STATE_STARTRETRY,
129 CTC_STATE_SETUPWAIT,
130 CTC_STATE_RXINIT,
131 CTC_STATE_TXINIT,
132 CTC_STATE_RX,
133 CTC_STATE_TX,
134 CTC_STATE_RXIDLE,
135 CTC_STATE_TXIDLE,
136 CTC_STATE_RXERR,
137 CTC_STATE_TXERR,
138 CTC_STATE_TERM,
139 CTC_STATE_DTERM,
140 CTC_STATE_NOTOP,
141 CTC_NR_STATES, /* MUST be the last element of non-expanded states */
142 /*
143 * additional MPC states
144 */
145 CH_XID0_PENDING = CTC_NR_STATES,
146 CH_XID0_INPROGRESS,
147 CH_XID7_PENDING,
148 CH_XID7_PENDING1,
149 CH_XID7_PENDING2,
150 CH_XID7_PENDING3,
151 CH_XID7_PENDING4,
152 CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
153};
154
155extern const char *ctc_ch_event_names[];
156
157extern const char *ctc_ch_state_names[];
158
159void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
160void ctcm_purge_skb_queue(struct sk_buff_head *q);
161void fsm_action_nop(fsm_instance *fi, int event, void *arg);
162
163/*
164 * ----- non-static actions for ctcm channel statemachine -----
165 *
166 */
167void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
168
169/*
170 * ----- FSM (state/event/action) of the ctcm channel statemachine -----
171 */
172extern const fsm_node ch_fsm[];
173extern int ch_fsm_len;
174
175
176/*
177 * ----- non-static actions for ctcmpc channel statemachine ----
178 *
179 */
180/* shared :
181void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
182 */
183void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
184
185/*
186 * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
187 */
188extern const fsm_node ctcmpc_ch_fsm[];
189extern int mpc_ch_fsm_len;
190
191/*
192 * Definitions for the device interface statemachine for ctc and mpc
193 */
194
195/*
196 * States of the device interface statemachine.
197 */
198enum dev_states {
199 DEV_STATE_STOPPED,
200 DEV_STATE_STARTWAIT_RXTX,
201 DEV_STATE_STARTWAIT_RX,
202 DEV_STATE_STARTWAIT_TX,
203 DEV_STATE_STOPWAIT_RXTX,
204 DEV_STATE_STOPWAIT_RX,
205 DEV_STATE_STOPWAIT_TX,
206 DEV_STATE_RUNNING,
207 /*
208 * MUST be always the last element!!
209 */
210 CTCM_NR_DEV_STATES
211};
212
213extern const char *dev_state_names[];
214
215/*
216 * Events of the device interface statemachine.
217 * ctcm and ctcmpc
218 */
219enum dev_events {
220 DEV_EVENT_START,
221 DEV_EVENT_STOP,
222 DEV_EVENT_RXUP,
223 DEV_EVENT_TXUP,
224 DEV_EVENT_RXDOWN,
225 DEV_EVENT_TXDOWN,
226 DEV_EVENT_RESTART,
227 /*
228 * MUST be always the last element!!
229 */
230 CTCM_NR_DEV_EVENTS
231};
232
233extern const char *dev_event_names[];
234
235/*
236 * Actions for the device interface statemachine.
237 * ctc and ctcmpc
238 */
239/*
240static void dev_action_start(fsm_instance * fi, int event, void *arg);
241static void dev_action_stop(fsm_instance * fi, int event, void *arg);
242static void dev_action_restart(fsm_instance *fi, int event, void *arg);
243static void dev_action_chup(fsm_instance * fi, int event, void *arg);
244static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
245*/
246
247/*
248 * The (state/event/action) fsm table of the device interface statemachine.
249 * ctcm and ctcmpc
250 */
251extern const fsm_node dev_fsm[];
252extern int dev_fsm_len;
253
254
255/*
256 * Definitions for the MPC Group statemachine
257 */
258
259/*
260 * MPC Group Station FSM States
261
262State Name When In This State
263====================== =======================================
264MPCG_STATE_RESET Initial State When Driver Loaded
265 We receive and send NOTHING
266
267MPCG_STATE_INOP INOP Received.
268 Group level non-recoverable error
269
270MPCG_STATE_READY XID exchanges for at least 1 write and
271 1 read channel have completed.
272 Group is ready for data transfer.
273
274States from ctc_mpc_alloc_channel
275==============================================================
276MPCG_STATE_XID2INITW Awaiting XID2(0) Initiation
277 ATTN from other side will start
278 XID negotiations.
279 Y-side protocol only.
280
281MPCG_STATE_XID2INITX XID2(0) negotiations are in progress.
282 At least 1, but not all, XID2(0)'s
283 have been received from partner.
284
285MPCG_STATE_XID7INITW XID2(0) complete
286 No XID2(7)'s have yet been received.
287 XID2(7) negotiations pending.
288
289MPCG_STATE_XID7INITX XID2(7) negotiations in progress.
290 At least 1, but not all, XID2(7)'s
291 have been received from partner.
292
293MPCG_STATE_XID7INITF XID2(7) negotiations complete.
294 Transitioning to READY.
295
296MPCG_STATE_READY Ready for Data Transfer.
297
298
299States from ctc_mpc_establish_connectivity call
300==============================================================
301MPCG_STATE_XID0IOWAIT Initiating XID2(0) negotiations.
302 X-side protocol only.
303 ATTN-BUSY from other side will convert
304 this to Y-side protocol and the
305 ctc_mpc_alloc_channel flow will begin.
306
307MPCG_STATE_XID0IOWAIX XID2(0) negotiations are in progress.
308 At least 1, but not all, XID2(0)'s
309 have been received from partner.
310
311MPCG_STATE_XID7INITI XID2(0) complete
312 No XID2(7)'s have yet been received.
313 XID2(7) negotiations pending.
314
315MPCG_STATE_XID7INITZ XID2(7) negotiations in progress.
316 At least 1, but not all, XID2(7)'s
317 have been received from partner.
318
319MPCG_STATE_XID7INITF XID2(7) negotiations complete.
320 Transitioning to READY.
321
322MPCG_STATE_READY Ready for Data Transfer.
323
324*/
325
326enum mpcg_events {
327 MPCG_EVENT_INOP,
328 MPCG_EVENT_DISCONC,
329 MPCG_EVENT_XID0DO,
330 MPCG_EVENT_XID2,
331 MPCG_EVENT_XID2DONE,
332 MPCG_EVENT_XID7DONE,
333 MPCG_EVENT_TIMER,
334 MPCG_EVENT_DOIO,
335 MPCG_NR_EVENTS,
336};
337
338enum mpcg_states {
339 MPCG_STATE_RESET,
340 MPCG_STATE_INOP,
341 MPCG_STATE_XID2INITW,
342 MPCG_STATE_XID2INITX,
343 MPCG_STATE_XID7INITW,
344 MPCG_STATE_XID7INITX,
345 MPCG_STATE_XID0IOWAIT,
346 MPCG_STATE_XID0IOWAIX,
347 MPCG_STATE_XID7INITI,
348 MPCG_STATE_XID7INITZ,
349 MPCG_STATE_XID7INITF,
350 MPCG_STATE_FLOWC,
351 MPCG_STATE_READY,
352 MPCG_NR_STATES,
353};
354
355#endif
356/* --- This is the END my friend --- */