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1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef __RS690D_H__
29#define __RS690D_H__
30
31/* Registers */
32#define R_000078_MC_INDEX 0x000078
33#define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0)
34#define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF)
35#define C_000078_MC_IND_ADDR 0xFFFFFE00
36#define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9)
37#define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1)
38#define C_000078_MC_IND_WR_EN 0xFFFFFDFF
39#define R_00007C_MC_DATA 0x00007C
40#define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0)
41#define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
42#define C_00007C_MC_DATA 0x00000000
43#define R_0000F8_CONFIG_MEMSIZE 0x0000F8
44#define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)
45#define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)
46#define C_0000F8_CONFIG_MEMSIZE 0x00000000
47#define R_000134_HDP_FB_LOCATION 0x000134
48#define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)
49#define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)
50#define C_000134_HDP_FB_START 0xFFFF0000
51#define R_0007C0_CP_STAT 0x0007C0
52#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
53#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
54#define C_0007C0_MRU_BUSY 0xFFFFFFFE
55#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
56#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
57#define C_0007C0_MWU_BUSY 0xFFFFFFFD
58#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
59#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
60#define C_0007C0_RSIU_BUSY 0xFFFFFFFB
61#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
62#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
63#define C_0007C0_RCIU_BUSY 0xFFFFFFF7
64#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
65#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
66#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
67#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
68#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
69#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
70#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
71#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
72#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
73#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
74#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
75#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
76#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
77#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
78#define C_0007C0_CSI_BUSY 0xFFFFDFFF
79#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
80#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
81#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
82#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
83#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
84#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
85#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
86#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
87#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
88#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
89#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
90#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
91#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
92#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
93#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
94#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
95#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
96#define C_0007C0_CP_BUSY 0x7FFFFFFF
97#define R_000E40_RBBM_STATUS 0x000E40
98#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
99#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
100#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
101#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
102#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
103#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
104#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
105#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
106#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
107#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
108#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
109#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
110#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
111#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
112#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
113#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
114#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
115#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
116#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
117#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
118#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
119#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
120#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
121#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
122#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
123#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
124#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
125#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
126#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
127#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
128#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
129#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
130#define C_000E40_E2_BUSY 0xFFFDFFFF
131#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
132#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
133#define C_000E40_RB2D_BUSY 0xFFFBFFFF
134#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
135#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
136#define C_000E40_RB3D_BUSY 0xFFF7FFFF
137#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
138#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
139#define C_000E40_VAP_BUSY 0xFFEFFFFF
140#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
141#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
142#define C_000E40_RE_BUSY 0xFFDFFFFF
143#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
144#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
145#define C_000E40_TAM_BUSY 0xFFBFFFFF
146#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
147#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
148#define C_000E40_TDM_BUSY 0xFF7FFFFF
149#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
150#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
151#define C_000E40_PB_BUSY 0xFEFFFFFF
152#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
153#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
154#define C_000E40_TIM_BUSY 0xFDFFFFFF
155#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
156#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
157#define C_000E40_GA_BUSY 0xFBFFFFFF
158#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
159#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
160#define C_000E40_CBA2D_BUSY 0xF7FFFFFF
161#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
162#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
163#define C_000E40_GUI_ACTIVE 0x7FFFFFFF
164#define R_006520_DC_LB_MEMORY_SPLIT 0x006520
165#define S_006520_DC_LB_MEMORY_SPLIT(x) (((x) & 0x3) << 0)
166#define G_006520_DC_LB_MEMORY_SPLIT(x) (((x) >> 0) & 0x3)
167#define C_006520_DC_LB_MEMORY_SPLIT 0xFFFFFFFC
168#define S_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) & 0x1) << 2)
169#define G_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) >> 2) & 0x1)
170#define C_006520_DC_LB_MEMORY_SPLIT_MODE 0xFFFFFFFB
171#define V_006520_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0
172#define V_006520_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1
173#define V_006520_DC_LB_MEMORY_SPLIT_D1_ONLY 2
174#define V_006520_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3
175#define S_006520_DC_LB_DISP1_END_ADR(x) (((x) & 0x7FF) << 4)
176#define G_006520_DC_LB_DISP1_END_ADR(x) (((x) >> 4) & 0x7FF)
177#define C_006520_DC_LB_DISP1_END_ADR 0xFFFF800F
178#define R_006548_D1MODE_PRIORITY_A_CNT 0x006548
179#define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
180#define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
181#define C_006548_D1MODE_PRIORITY_MARK_A 0xFFFF8000
182#define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
183#define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
184#define C_006548_D1MODE_PRIORITY_A_OFF 0xFFFEFFFF
185#define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
186#define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
187#define C_006548_D1MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
188#define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
189#define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
190#define C_006548_D1MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
191#define R_00654C_D1MODE_PRIORITY_B_CNT 0x00654C
192#define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
193#define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
194#define C_00654C_D1MODE_PRIORITY_MARK_B 0xFFFF8000
195#define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
196#define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
197#define C_00654C_D1MODE_PRIORITY_B_OFF 0xFFFEFFFF
198#define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
199#define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
200#define C_00654C_D1MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
201#define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
202#define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
203#define C_00654C_D1MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
204#define R_006C9C_DCP_CONTROL 0x006C9C
205#define R_006D48_D2MODE_PRIORITY_A_CNT 0x006D48
206#define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
207#define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
208#define C_006D48_D2MODE_PRIORITY_MARK_A 0xFFFF8000
209#define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
210#define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
211#define C_006D48_D2MODE_PRIORITY_A_OFF 0xFFFEFFFF
212#define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
213#define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
214#define C_006D48_D2MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
215#define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
216#define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
217#define C_006D48_D2MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
218#define R_006D4C_D2MODE_PRIORITY_B_CNT 0x006D4C
219#define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
220#define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
221#define C_006D4C_D2MODE_PRIORITY_MARK_B 0xFFFF8000
222#define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
223#define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
224#define C_006D4C_D2MODE_PRIORITY_B_OFF 0xFFFEFFFF
225#define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
226#define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
227#define C_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
228#define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
229#define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
230#define C_006D4C_D2MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
231#define R_006D58_LB_MAX_REQ_OUTSTANDING 0x006D58
232#define S_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 0)
233#define G_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) >> 0) & 0xF)
234#define C_006D58_LB_D1_MAX_REQ_OUTSTANDING 0xFFFFFFF0
235#define S_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 16)
236#define G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) >> 16) & 0xF)
237#define C_006D58_LB_D2_MAX_REQ_OUTSTANDING 0xFFF0FFFF
238
239
240#define R_000090_MC_SYSTEM_STATUS 0x000090
241#define S_000090_MC_SYSTEM_IDLE(x) (((x) & 0x1) << 0)
242#define G_000090_MC_SYSTEM_IDLE(x) (((x) >> 0) & 0x1)
243#define C_000090_MC_SYSTEM_IDLE 0xFFFFFFFE
244#define S_000090_MC_SEQUENCER_IDLE(x) (((x) & 0x1) << 1)
245#define G_000090_MC_SEQUENCER_IDLE(x) (((x) >> 1) & 0x1)
246#define C_000090_MC_SEQUENCER_IDLE 0xFFFFFFFD
247#define S_000090_MC_ARBITER_IDLE(x) (((x) & 0x1) << 2)
248#define G_000090_MC_ARBITER_IDLE(x) (((x) >> 2) & 0x1)
249#define C_000090_MC_ARBITER_IDLE 0xFFFFFFFB
250#define S_000090_MC_SELECT_PM(x) (((x) & 0x1) << 3)
251#define G_000090_MC_SELECT_PM(x) (((x) >> 3) & 0x1)
252#define C_000090_MC_SELECT_PM 0xFFFFFFF7
253#define S_000090_RESERVED4(x) (((x) & 0xF) << 4)
254#define G_000090_RESERVED4(x) (((x) >> 4) & 0xF)
255#define C_000090_RESERVED4 0xFFFFFF0F
256#define S_000090_RESERVED8(x) (((x) & 0xF) << 8)
257#define G_000090_RESERVED8(x) (((x) >> 8) & 0xF)
258#define C_000090_RESERVED8 0xFFFFF0FF
259#define S_000090_RESERVED12(x) (((x) & 0xF) << 12)
260#define G_000090_RESERVED12(x) (((x) >> 12) & 0xF)
261#define C_000090_RESERVED12 0xFFFF0FFF
262#define S_000090_MCA_INIT_EXECUTED(x) (((x) & 0x1) << 16)
263#define G_000090_MCA_INIT_EXECUTED(x) (((x) >> 16) & 0x1)
264#define C_000090_MCA_INIT_EXECUTED 0xFFFEFFFF
265#define S_000090_MCA_IDLE(x) (((x) & 0x1) << 17)
266#define G_000090_MCA_IDLE(x) (((x) >> 17) & 0x1)
267#define C_000090_MCA_IDLE 0xFFFDFFFF
268#define S_000090_MCA_SEQ_IDLE(x) (((x) & 0x1) << 18)
269#define G_000090_MCA_SEQ_IDLE(x) (((x) >> 18) & 0x1)
270#define C_000090_MCA_SEQ_IDLE 0xFFFBFFFF
271#define S_000090_MCA_ARB_IDLE(x) (((x) & 0x1) << 19)
272#define G_000090_MCA_ARB_IDLE(x) (((x) >> 19) & 0x1)
273#define C_000090_MCA_ARB_IDLE 0xFFF7FFFF
274#define S_000090_RESERVED20(x) (((x) & 0xFFF) << 20)
275#define G_000090_RESERVED20(x) (((x) >> 20) & 0xFFF)
276#define C_000090_RESERVED20 0x000FFFFF
277#define R_000100_MCCFG_FB_LOCATION 0x000100
278#define S_000100_MC_FB_START(x) (((x) & 0xFFFF) << 0)
279#define G_000100_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
280#define C_000100_MC_FB_START 0xFFFF0000
281#define S_000100_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
282#define G_000100_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
283#define C_000100_MC_FB_TOP 0x0000FFFF
284#define R_000104_MC_INIT_MISC_LAT_TIMER 0x000104
285#define S_000104_MC_CPR_INIT_LAT(x) (((x) & 0xF) << 0)
286#define G_000104_MC_CPR_INIT_LAT(x) (((x) >> 0) & 0xF)
287#define C_000104_MC_CPR_INIT_LAT 0xFFFFFFF0
288#define S_000104_MC_VF_INIT_LAT(x) (((x) & 0xF) << 4)
289#define G_000104_MC_VF_INIT_LAT(x) (((x) >> 4) & 0xF)
290#define C_000104_MC_VF_INIT_LAT 0xFFFFFF0F
291#define S_000104_MC_DISP0R_INIT_LAT(x) (((x) & 0xF) << 8)
292#define G_000104_MC_DISP0R_INIT_LAT(x) (((x) >> 8) & 0xF)
293#define C_000104_MC_DISP0R_INIT_LAT 0xFFFFF0FF
294#define S_000104_MC_DISP1R_INIT_LAT(x) (((x) & 0xF) << 12)
295#define G_000104_MC_DISP1R_INIT_LAT(x) (((x) >> 12) & 0xF)
296#define C_000104_MC_DISP1R_INIT_LAT 0xFFFF0FFF
297#define S_000104_MC_FIXED_INIT_LAT(x) (((x) & 0xF) << 16)
298#define G_000104_MC_FIXED_INIT_LAT(x) (((x) >> 16) & 0xF)
299#define C_000104_MC_FIXED_INIT_LAT 0xFFF0FFFF
300#define S_000104_MC_E2R_INIT_LAT(x) (((x) & 0xF) << 20)
301#define G_000104_MC_E2R_INIT_LAT(x) (((x) >> 20) & 0xF)
302#define C_000104_MC_E2R_INIT_LAT 0xFF0FFFFF
303#define S_000104_SAME_PAGE_PRIO(x) (((x) & 0xF) << 24)
304#define G_000104_SAME_PAGE_PRIO(x) (((x) >> 24) & 0xF)
305#define C_000104_SAME_PAGE_PRIO 0xF0FFFFFF
306#define S_000104_MC_GLOBW_INIT_LAT(x) (((x) & 0xF) << 28)
307#define G_000104_MC_GLOBW_INIT_LAT(x) (((x) >> 28) & 0xF)
308#define C_000104_MC_GLOBW_INIT_LAT 0x0FFFFFFF
309
310#endif
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef __RS690D_H__
29#define __RS690D_H__
30
31/* Registers */
32#define R_00001E_K8_FB_LOCATION 0x00001E
33#define R_00005F_MC_MISC_UMA_CNTL 0x00005F
34#define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF)
35#define R_000078_MC_INDEX 0x000078
36#define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0)
37#define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF)
38#define C_000078_MC_IND_ADDR 0xFFFFFE00
39#define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9)
40#define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1)
41#define C_000078_MC_IND_WR_EN 0xFFFFFDFF
42#define R_00007C_MC_DATA 0x00007C
43#define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0)
44#define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
45#define C_00007C_MC_DATA 0x00000000
46#define R_0000F8_CONFIG_MEMSIZE 0x0000F8
47#define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)
48#define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)
49#define C_0000F8_CONFIG_MEMSIZE 0x00000000
50#define R_000134_HDP_FB_LOCATION 0x000134
51#define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)
52#define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)
53#define C_000134_HDP_FB_START 0xFFFF0000
54#define R_0007C0_CP_STAT 0x0007C0
55#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
56#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
57#define C_0007C0_MRU_BUSY 0xFFFFFFFE
58#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
59#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
60#define C_0007C0_MWU_BUSY 0xFFFFFFFD
61#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
62#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
63#define C_0007C0_RSIU_BUSY 0xFFFFFFFB
64#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
65#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
66#define C_0007C0_RCIU_BUSY 0xFFFFFFF7
67#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
68#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
69#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
70#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
71#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
72#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
73#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
74#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
75#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
76#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
77#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
78#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
79#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
80#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
81#define C_0007C0_CSI_BUSY 0xFFFFDFFF
82#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
83#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
84#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
85#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
86#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
87#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
88#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
89#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
90#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
91#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
92#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
93#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
94#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
95#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
96#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
97#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
98#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
99#define C_0007C0_CP_BUSY 0x7FFFFFFF
100#define R_000E40_RBBM_STATUS 0x000E40
101#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
102#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
103#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
104#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
105#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
106#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
107#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
108#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
109#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
110#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
111#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
112#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
113#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
114#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
115#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
116#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
117#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
118#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
119#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
120#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
121#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
122#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
123#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
124#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
125#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
126#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
127#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
128#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
129#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
130#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
131#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
132#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
133#define C_000E40_E2_BUSY 0xFFFDFFFF
134#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
135#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
136#define C_000E40_RB2D_BUSY 0xFFFBFFFF
137#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
138#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
139#define C_000E40_RB3D_BUSY 0xFFF7FFFF
140#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
141#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
142#define C_000E40_VAP_BUSY 0xFFEFFFFF
143#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
144#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
145#define C_000E40_RE_BUSY 0xFFDFFFFF
146#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
147#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
148#define C_000E40_TAM_BUSY 0xFFBFFFFF
149#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
150#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
151#define C_000E40_TDM_BUSY 0xFF7FFFFF
152#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
153#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
154#define C_000E40_PB_BUSY 0xFEFFFFFF
155#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
156#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
157#define C_000E40_TIM_BUSY 0xFDFFFFFF
158#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
159#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
160#define C_000E40_GA_BUSY 0xFBFFFFFF
161#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
162#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
163#define C_000E40_CBA2D_BUSY 0xF7FFFFFF
164#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
165#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
166#define C_000E40_GUI_ACTIVE 0x7FFFFFFF
167#define R_006520_DC_LB_MEMORY_SPLIT 0x006520
168#define S_006520_DC_LB_MEMORY_SPLIT(x) (((x) & 0x3) << 0)
169#define G_006520_DC_LB_MEMORY_SPLIT(x) (((x) >> 0) & 0x3)
170#define C_006520_DC_LB_MEMORY_SPLIT 0xFFFFFFFC
171#define S_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) & 0x1) << 2)
172#define G_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) >> 2) & 0x1)
173#define C_006520_DC_LB_MEMORY_SPLIT_MODE 0xFFFFFFFB
174#define V_006520_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0
175#define V_006520_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1
176#define V_006520_DC_LB_MEMORY_SPLIT_D1_ONLY 2
177#define V_006520_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3
178#define S_006520_DC_LB_DISP1_END_ADR(x) (((x) & 0x7FF) << 4)
179#define G_006520_DC_LB_DISP1_END_ADR(x) (((x) >> 4) & 0x7FF)
180#define C_006520_DC_LB_DISP1_END_ADR 0xFFFF800F
181#define R_006548_D1MODE_PRIORITY_A_CNT 0x006548
182#define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
183#define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
184#define C_006548_D1MODE_PRIORITY_MARK_A 0xFFFF8000
185#define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
186#define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
187#define C_006548_D1MODE_PRIORITY_A_OFF 0xFFFEFFFF
188#define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
189#define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
190#define C_006548_D1MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
191#define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
192#define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
193#define C_006548_D1MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
194#define R_00654C_D1MODE_PRIORITY_B_CNT 0x00654C
195#define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
196#define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
197#define C_00654C_D1MODE_PRIORITY_MARK_B 0xFFFF8000
198#define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
199#define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
200#define C_00654C_D1MODE_PRIORITY_B_OFF 0xFFFEFFFF
201#define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
202#define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
203#define C_00654C_D1MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
204#define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
205#define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
206#define C_00654C_D1MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
207#define R_006C9C_DCP_CONTROL 0x006C9C
208#define R_006D48_D2MODE_PRIORITY_A_CNT 0x006D48
209#define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0)
210#define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF)
211#define C_006D48_D2MODE_PRIORITY_MARK_A 0xFFFF8000
212#define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16)
213#define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1)
214#define C_006D48_D2MODE_PRIORITY_A_OFF 0xFFFEFFFF
215#define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20)
216#define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1)
217#define C_006D48_D2MODE_PRIORITY_A_ALWAYS_ON 0xFFEFFFFF
218#define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24)
219#define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1)
220#define C_006D48_D2MODE_PRIORITY_A_FORCE_MASK 0xFEFFFFFF
221#define R_006D4C_D2MODE_PRIORITY_B_CNT 0x006D4C
222#define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0)
223#define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF)
224#define C_006D4C_D2MODE_PRIORITY_MARK_B 0xFFFF8000
225#define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16)
226#define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1)
227#define C_006D4C_D2MODE_PRIORITY_B_OFF 0xFFFEFFFF
228#define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20)
229#define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1)
230#define C_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON 0xFFEFFFFF
231#define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24)
232#define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1)
233#define C_006D4C_D2MODE_PRIORITY_B_FORCE_MASK 0xFEFFFFFF
234#define R_006D58_LB_MAX_REQ_OUTSTANDING 0x006D58
235#define S_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 0)
236#define G_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) >> 0) & 0xF)
237#define C_006D58_LB_D1_MAX_REQ_OUTSTANDING 0xFFFFFFF0
238#define S_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 16)
239#define G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) >> 16) & 0xF)
240#define C_006D58_LB_D2_MAX_REQ_OUTSTANDING 0xFFF0FFFF
241
242
243#define R_000090_MC_SYSTEM_STATUS 0x000090
244#define S_000090_MC_SYSTEM_IDLE(x) (((x) & 0x1) << 0)
245#define G_000090_MC_SYSTEM_IDLE(x) (((x) >> 0) & 0x1)
246#define C_000090_MC_SYSTEM_IDLE 0xFFFFFFFE
247#define S_000090_MC_SEQUENCER_IDLE(x) (((x) & 0x1) << 1)
248#define G_000090_MC_SEQUENCER_IDLE(x) (((x) >> 1) & 0x1)
249#define C_000090_MC_SEQUENCER_IDLE 0xFFFFFFFD
250#define S_000090_MC_ARBITER_IDLE(x) (((x) & 0x1) << 2)
251#define G_000090_MC_ARBITER_IDLE(x) (((x) >> 2) & 0x1)
252#define C_000090_MC_ARBITER_IDLE 0xFFFFFFFB
253#define S_000090_MC_SELECT_PM(x) (((x) & 0x1) << 3)
254#define G_000090_MC_SELECT_PM(x) (((x) >> 3) & 0x1)
255#define C_000090_MC_SELECT_PM 0xFFFFFFF7
256#define S_000090_RESERVED4(x) (((x) & 0xF) << 4)
257#define G_000090_RESERVED4(x) (((x) >> 4) & 0xF)
258#define C_000090_RESERVED4 0xFFFFFF0F
259#define S_000090_RESERVED8(x) (((x) & 0xF) << 8)
260#define G_000090_RESERVED8(x) (((x) >> 8) & 0xF)
261#define C_000090_RESERVED8 0xFFFFF0FF
262#define S_000090_RESERVED12(x) (((x) & 0xF) << 12)
263#define G_000090_RESERVED12(x) (((x) >> 12) & 0xF)
264#define C_000090_RESERVED12 0xFFFF0FFF
265#define S_000090_MCA_INIT_EXECUTED(x) (((x) & 0x1) << 16)
266#define G_000090_MCA_INIT_EXECUTED(x) (((x) >> 16) & 0x1)
267#define C_000090_MCA_INIT_EXECUTED 0xFFFEFFFF
268#define S_000090_MCA_IDLE(x) (((x) & 0x1) << 17)
269#define G_000090_MCA_IDLE(x) (((x) >> 17) & 0x1)
270#define C_000090_MCA_IDLE 0xFFFDFFFF
271#define S_000090_MCA_SEQ_IDLE(x) (((x) & 0x1) << 18)
272#define G_000090_MCA_SEQ_IDLE(x) (((x) >> 18) & 0x1)
273#define C_000090_MCA_SEQ_IDLE 0xFFFBFFFF
274#define S_000090_MCA_ARB_IDLE(x) (((x) & 0x1) << 19)
275#define G_000090_MCA_ARB_IDLE(x) (((x) >> 19) & 0x1)
276#define C_000090_MCA_ARB_IDLE 0xFFF7FFFF
277#define S_000090_RESERVED20(x) (((x) & 0xFFF) << 20)
278#define G_000090_RESERVED20(x) (((x) >> 20) & 0xFFF)
279#define C_000090_RESERVED20 0x000FFFFF
280#define R_000100_MCCFG_FB_LOCATION 0x000100
281#define S_000100_MC_FB_START(x) (((x) & 0xFFFF) << 0)
282#define G_000100_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
283#define C_000100_MC_FB_START 0xFFFF0000
284#define S_000100_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
285#define G_000100_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
286#define C_000100_MC_FB_TOP 0x0000FFFF
287#define R_000104_MC_INIT_MISC_LAT_TIMER 0x000104
288#define S_000104_MC_CPR_INIT_LAT(x) (((x) & 0xF) << 0)
289#define G_000104_MC_CPR_INIT_LAT(x) (((x) >> 0) & 0xF)
290#define C_000104_MC_CPR_INIT_LAT 0xFFFFFFF0
291#define S_000104_MC_VF_INIT_LAT(x) (((x) & 0xF) << 4)
292#define G_000104_MC_VF_INIT_LAT(x) (((x) >> 4) & 0xF)
293#define C_000104_MC_VF_INIT_LAT 0xFFFFFF0F
294#define S_000104_MC_DISP0R_INIT_LAT(x) (((x) & 0xF) << 8)
295#define G_000104_MC_DISP0R_INIT_LAT(x) (((x) >> 8) & 0xF)
296#define C_000104_MC_DISP0R_INIT_LAT 0xFFFFF0FF
297#define S_000104_MC_DISP1R_INIT_LAT(x) (((x) & 0xF) << 12)
298#define G_000104_MC_DISP1R_INIT_LAT(x) (((x) >> 12) & 0xF)
299#define C_000104_MC_DISP1R_INIT_LAT 0xFFFF0FFF
300#define S_000104_MC_FIXED_INIT_LAT(x) (((x) & 0xF) << 16)
301#define G_000104_MC_FIXED_INIT_LAT(x) (((x) >> 16) & 0xF)
302#define C_000104_MC_FIXED_INIT_LAT 0xFFF0FFFF
303#define S_000104_MC_E2R_INIT_LAT(x) (((x) & 0xF) << 20)
304#define G_000104_MC_E2R_INIT_LAT(x) (((x) >> 20) & 0xF)
305#define C_000104_MC_E2R_INIT_LAT 0xFF0FFFFF
306#define S_000104_SAME_PAGE_PRIO(x) (((x) & 0xF) << 24)
307#define G_000104_SAME_PAGE_PRIO(x) (((x) >> 24) & 0xF)
308#define C_000104_SAME_PAGE_PRIO 0xF0FFFFFF
309#define S_000104_MC_GLOBW_INIT_LAT(x) (((x) & 0xF) << 28)
310#define G_000104_MC_GLOBW_INIT_LAT(x) (((x) >> 28) & 0xF)
311#define C_000104_MC_GLOBW_INIT_LAT 0x0FFFFFFF
312
313#endif