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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Slava Grigorev <slava.grigorev@amd.com>
23 */
24
25#include <linux/gcd.h>
26#include <drm/drmP.h>
27#include <drm/drm_crtc.h>
28#include "radeon.h"
29#include "atom.h"
30#include "radeon_audio.h"
31
32void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
33 u8 enable_mask);
34void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
35 u8 enable_mask);
36void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
37 u8 enable_mask);
38u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
39void dce6_endpoint_wreg(struct radeon_device *rdev,
40 u32 offset, u32 reg, u32 v);
41void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
42 struct cea_sad *sads, int sad_count);
43void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
44 struct cea_sad *sads, int sad_count);
45void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
46 struct cea_sad *sads, int sad_count);
47void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
48 u8 *sadb, int sad_count);
49void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
50 u8 *sadb, int sad_count);
51void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
52 u8 *sadb, int sad_count);
53void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
54 u8 *sadb, int sad_count);
55void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
56 u8 *sadb, int sad_count);
57void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
58 u8 *sadb, int sad_count);
59void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
60 struct drm_connector *connector, struct drm_display_mode *mode);
61void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
62 struct drm_connector *connector, struct drm_display_mode *mode);
63struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
64struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
65void dce6_afmt_select_pin(struct drm_encoder *encoder);
66void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
67 struct radeon_crtc *crtc, unsigned int clock);
68void dce3_2_audio_set_dto(struct radeon_device *rdev,
69 struct radeon_crtc *crtc, unsigned int clock);
70void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
71 struct radeon_crtc *crtc, unsigned int clock);
72void dce4_dp_audio_set_dto(struct radeon_device *rdev,
73 struct radeon_crtc *crtc, unsigned int clock);
74void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
75 struct radeon_crtc *crtc, unsigned int clock);
76void dce6_dp_audio_set_dto(struct radeon_device *rdev,
77 struct radeon_crtc *crtc, unsigned int clock);
78void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
79 unsigned char *buffer, size_t size);
80void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
81 unsigned char *buffer, size_t size);
82void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
83 const struct radeon_hdmi_acr *acr);
84void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
85 const struct radeon_hdmi_acr *acr);
86void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
87 const struct radeon_hdmi_acr *acr);
88void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
90void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
91 u32 offset, int bpc);
92void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
93void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
94void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
95void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
96void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
97void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
98static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
99 struct drm_display_mode *mode);
100static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
101 struct drm_display_mode *mode);
102void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
103void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
104void evergreen_dp_enable(struct drm_encoder *encoder, bool enable);
105
106static const u32 pin_offsets[7] =
107{
108 (0x5e00 - 0x5e00),
109 (0x5e18 - 0x5e00),
110 (0x5e30 - 0x5e00),
111 (0x5e48 - 0x5e00),
112 (0x5e60 - 0x5e00),
113 (0x5e78 - 0x5e00),
114 (0x5e90 - 0x5e00),
115};
116
117static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
118{
119 return RREG32(reg);
120}
121
122static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
123 u32 reg, u32 v)
124{
125 WREG32(reg, v);
126}
127
128static struct radeon_audio_basic_funcs r600_funcs = {
129 .endpoint_rreg = radeon_audio_rreg,
130 .endpoint_wreg = radeon_audio_wreg,
131 .enable = r600_audio_enable,
132};
133
134static struct radeon_audio_basic_funcs dce32_funcs = {
135 .endpoint_rreg = radeon_audio_rreg,
136 .endpoint_wreg = radeon_audio_wreg,
137 .enable = r600_audio_enable,
138};
139
140static struct radeon_audio_basic_funcs dce4_funcs = {
141 .endpoint_rreg = radeon_audio_rreg,
142 .endpoint_wreg = radeon_audio_wreg,
143 .enable = dce4_audio_enable,
144};
145
146static struct radeon_audio_basic_funcs dce6_funcs = {
147 .endpoint_rreg = dce6_endpoint_rreg,
148 .endpoint_wreg = dce6_endpoint_wreg,
149 .enable = dce6_audio_enable,
150};
151
152static struct radeon_audio_funcs r600_hdmi_funcs = {
153 .get_pin = r600_audio_get_pin,
154 .set_dto = r600_hdmi_audio_set_dto,
155 .update_acr = r600_hdmi_update_acr,
156 .set_vbi_packet = r600_set_vbi_packet,
157 .set_avi_packet = r600_set_avi_packet,
158 .set_audio_packet = r600_set_audio_packet,
159 .set_mute = r600_set_mute,
160 .mode_set = radeon_audio_hdmi_mode_set,
161 .dpms = r600_hdmi_enable,
162};
163
164static struct radeon_audio_funcs dce32_hdmi_funcs = {
165 .get_pin = r600_audio_get_pin,
166 .write_sad_regs = dce3_2_afmt_write_sad_regs,
167 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
168 .set_dto = dce3_2_audio_set_dto,
169 .update_acr = dce3_2_hdmi_update_acr,
170 .set_vbi_packet = r600_set_vbi_packet,
171 .set_avi_packet = r600_set_avi_packet,
172 .set_audio_packet = dce3_2_set_audio_packet,
173 .set_mute = dce3_2_set_mute,
174 .mode_set = radeon_audio_hdmi_mode_set,
175 .dpms = r600_hdmi_enable,
176};
177
178static struct radeon_audio_funcs dce32_dp_funcs = {
179 .get_pin = r600_audio_get_pin,
180 .write_sad_regs = dce3_2_afmt_write_sad_regs,
181 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
182 .set_dto = dce3_2_audio_set_dto,
183 .set_avi_packet = r600_set_avi_packet,
184 .set_audio_packet = dce3_2_set_audio_packet,
185};
186
187static struct radeon_audio_funcs dce4_hdmi_funcs = {
188 .get_pin = r600_audio_get_pin,
189 .write_sad_regs = evergreen_hdmi_write_sad_regs,
190 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
191 .write_latency_fields = dce4_afmt_write_latency_fields,
192 .set_dto = dce4_hdmi_audio_set_dto,
193 .update_acr = evergreen_hdmi_update_acr,
194 .set_vbi_packet = dce4_set_vbi_packet,
195 .set_color_depth = dce4_hdmi_set_color_depth,
196 .set_avi_packet = evergreen_set_avi_packet,
197 .set_audio_packet = dce4_set_audio_packet,
198 .set_mute = dce4_set_mute,
199 .mode_set = radeon_audio_hdmi_mode_set,
200 .dpms = evergreen_hdmi_enable,
201};
202
203static struct radeon_audio_funcs dce4_dp_funcs = {
204 .get_pin = r600_audio_get_pin,
205 .write_sad_regs = evergreen_hdmi_write_sad_regs,
206 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
207 .write_latency_fields = dce4_afmt_write_latency_fields,
208 .set_dto = dce4_dp_audio_set_dto,
209 .set_avi_packet = evergreen_set_avi_packet,
210 .set_audio_packet = dce4_set_audio_packet,
211 .mode_set = radeon_audio_dp_mode_set,
212 .dpms = evergreen_dp_enable,
213};
214
215static struct radeon_audio_funcs dce6_hdmi_funcs = {
216 .select_pin = dce6_afmt_select_pin,
217 .get_pin = dce6_audio_get_pin,
218 .write_sad_regs = dce6_afmt_write_sad_regs,
219 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
220 .write_latency_fields = dce6_afmt_write_latency_fields,
221 .set_dto = dce6_hdmi_audio_set_dto,
222 .update_acr = evergreen_hdmi_update_acr,
223 .set_vbi_packet = dce4_set_vbi_packet,
224 .set_color_depth = dce4_hdmi_set_color_depth,
225 .set_avi_packet = evergreen_set_avi_packet,
226 .set_audio_packet = dce4_set_audio_packet,
227 .set_mute = dce4_set_mute,
228 .mode_set = radeon_audio_hdmi_mode_set,
229 .dpms = evergreen_hdmi_enable,
230};
231
232static struct radeon_audio_funcs dce6_dp_funcs = {
233 .select_pin = dce6_afmt_select_pin,
234 .get_pin = dce6_audio_get_pin,
235 .write_sad_regs = dce6_afmt_write_sad_regs,
236 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
237 .write_latency_fields = dce6_afmt_write_latency_fields,
238 .set_dto = dce6_dp_audio_set_dto,
239 .set_avi_packet = evergreen_set_avi_packet,
240 .set_audio_packet = dce4_set_audio_packet,
241 .mode_set = radeon_audio_dp_mode_set,
242 .dpms = evergreen_dp_enable,
243};
244
245static void radeon_audio_enable(struct radeon_device *rdev,
246 struct r600_audio_pin *pin, u8 enable_mask)
247{
248 struct drm_encoder *encoder;
249 struct radeon_encoder *radeon_encoder;
250 struct radeon_encoder_atom_dig *dig;
251 int pin_count = 0;
252
253 if (!pin)
254 return;
255
256 if (rdev->mode_info.mode_config_initialized) {
257 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
258 if (radeon_encoder_is_digital(encoder)) {
259 radeon_encoder = to_radeon_encoder(encoder);
260 dig = radeon_encoder->enc_priv;
261 if (dig->pin == pin)
262 pin_count++;
263 }
264 }
265
266 if ((pin_count > 1) && (enable_mask == 0))
267 return;
268 }
269
270 if (rdev->audio.funcs->enable)
271 rdev->audio.funcs->enable(rdev, pin, enable_mask);
272}
273
274static void radeon_audio_interface_init(struct radeon_device *rdev)
275{
276 if (ASIC_IS_DCE6(rdev)) {
277 rdev->audio.funcs = &dce6_funcs;
278 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
279 rdev->audio.dp_funcs = &dce6_dp_funcs;
280 } else if (ASIC_IS_DCE4(rdev)) {
281 rdev->audio.funcs = &dce4_funcs;
282 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
283 rdev->audio.dp_funcs = &dce4_dp_funcs;
284 } else if (ASIC_IS_DCE32(rdev)) {
285 rdev->audio.funcs = &dce32_funcs;
286 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
287 rdev->audio.dp_funcs = &dce32_dp_funcs;
288 } else {
289 rdev->audio.funcs = &r600_funcs;
290 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
291 rdev->audio.dp_funcs = 0;
292 }
293}
294
295static int radeon_audio_chipset_supported(struct radeon_device *rdev)
296{
297 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
298}
299
300int radeon_audio_init(struct radeon_device *rdev)
301{
302 int i;
303
304 if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
305 return 0;
306
307 rdev->audio.enabled = true;
308
309 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
310 rdev->audio.num_pins = 3;
311 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
312 rdev->audio.num_pins = 7;
313 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
314 rdev->audio.num_pins = 7;
315 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
316 rdev->audio.num_pins = 2;
317 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
318 rdev->audio.num_pins = 6;
319 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
320 rdev->audio.num_pins = 6;
321 else
322 rdev->audio.num_pins = 1;
323
324 for (i = 0; i < rdev->audio.num_pins; i++) {
325 rdev->audio.pin[i].channels = -1;
326 rdev->audio.pin[i].rate = -1;
327 rdev->audio.pin[i].bits_per_sample = -1;
328 rdev->audio.pin[i].status_bits = 0;
329 rdev->audio.pin[i].category_code = 0;
330 rdev->audio.pin[i].connected = false;
331 rdev->audio.pin[i].offset = pin_offsets[i];
332 rdev->audio.pin[i].id = i;
333 }
334
335 radeon_audio_interface_init(rdev);
336
337 /* disable audio. it will be set up later */
338 for (i = 0; i < rdev->audio.num_pins; i++)
339 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
340
341 return 0;
342}
343
344u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
345{
346 if (rdev->audio.funcs->endpoint_rreg)
347 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
348
349 return 0;
350}
351
352void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
353 u32 reg, u32 v)
354{
355 if (rdev->audio.funcs->endpoint_wreg)
356 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
357}
358
359static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
360{
361 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
362 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
363 struct cea_sad *sads;
364 int sad_count;
365
366 if (!connector)
367 return;
368
369 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
370 if (sad_count <= 0) {
371 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
372 return;
373 }
374 BUG_ON(!sads);
375
376 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
377 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
378
379 kfree(sads);
380}
381
382static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
383{
384 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
385 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
386 u8 *sadb = NULL;
387 int sad_count;
388
389 if (!connector)
390 return;
391
392 sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector),
393 &sadb);
394 if (sad_count < 0) {
395 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
396 sad_count);
397 sad_count = 0;
398 }
399
400 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
401 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
402
403 kfree(sadb);
404}
405
406static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
407 struct drm_display_mode *mode)
408{
409 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
410 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
411
412 if (!connector)
413 return;
414
415 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
416 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
417}
418
419struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
420{
421 struct radeon_device *rdev = encoder->dev->dev_private;
422 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
423
424 if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
425 return radeon_encoder->audio->get_pin(rdev);
426
427 return NULL;
428}
429
430static void radeon_audio_select_pin(struct drm_encoder *encoder)
431{
432 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
433
434 if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
435 radeon_encoder->audio->select_pin(encoder);
436}
437
438void radeon_audio_detect(struct drm_connector *connector,
439 struct drm_encoder *encoder,
440 enum drm_connector_status status)
441{
442 struct drm_device *dev = connector->dev;
443 struct radeon_device *rdev = dev->dev_private;
444 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
445 struct radeon_encoder_atom_dig *dig;
446
447 if (!radeon_audio_chipset_supported(rdev))
448 return;
449
450 if (!radeon_encoder_is_digital(encoder))
451 return;
452
453 dig = radeon_encoder->enc_priv;
454
455 if (status == connector_status_connected) {
456 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
457 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
458
459 if (radeon_dp_getsinktype(radeon_connector) ==
460 CONNECTOR_OBJECT_ID_DISPLAYPORT)
461 radeon_encoder->audio = rdev->audio.dp_funcs;
462 else
463 radeon_encoder->audio = rdev->audio.hdmi_funcs;
464 } else {
465 radeon_encoder->audio = rdev->audio.hdmi_funcs;
466 }
467
468 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
469 if (!dig->pin)
470 dig->pin = radeon_audio_get_pin(encoder);
471 radeon_audio_enable(rdev, dig->pin, 0xf);
472 } else {
473 radeon_audio_enable(rdev, dig->pin, 0);
474 dig->pin = NULL;
475 }
476 } else {
477 radeon_audio_enable(rdev, dig->pin, 0);
478 dig->pin = NULL;
479 }
480}
481
482void radeon_audio_fini(struct radeon_device *rdev)
483{
484 int i;
485
486 if (!rdev->audio.enabled)
487 return;
488
489 for (i = 0; i < rdev->audio.num_pins; i++)
490 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
491
492 rdev->audio.enabled = false;
493}
494
495static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
496{
497 struct radeon_device *rdev = encoder->dev->dev_private;
498 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
499 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
500
501 if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
502 radeon_encoder->audio->set_dto(rdev, crtc, clock);
503}
504
505static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
506 struct drm_display_mode *mode)
507{
508 struct radeon_device *rdev = encoder->dev->dev_private;
509 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
510 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
511 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
512 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
513 struct hdmi_avi_infoframe frame;
514 int err;
515
516 if (!connector)
517 return -EINVAL;
518
519 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
520 if (err < 0) {
521 DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
522 return err;
523 }
524
525 if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) {
526 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) {
527 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB)
528 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED;
529 else
530 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL;
531 } else {
532 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
533 }
534 }
535
536 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
537 if (err < 0) {
538 DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
539 return err;
540 }
541
542 if (dig && dig->afmt && radeon_encoder->audio &&
543 radeon_encoder->audio->set_avi_packet)
544 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
545 buffer, sizeof(buffer));
546
547 return 0;
548}
549
550/*
551 * calculate CTS and N values if they are not found in the table
552 */
553static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
554{
555 int n, cts;
556 unsigned long div, mul;
557
558 /* Safe, but overly large values */
559 n = 128 * freq;
560 cts = clock * 1000;
561
562 /* Smallest valid fraction */
563 div = gcd(n, cts);
564
565 n /= div;
566 cts /= div;
567
568 /*
569 * The optimal N is 128*freq/1000. Calculate the closest larger
570 * value that doesn't truncate any bits.
571 */
572 mul = ((128*freq/1000) + (n-1))/n;
573
574 n *= mul;
575 cts *= mul;
576
577 /* Check that we are in spec (not always possible) */
578 if (n < (128*freq/1500))
579 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
580 if (n > (128*freq/300))
581 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
582
583 *N = n;
584 *CTS = cts;
585
586 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
587 *N, *CTS, freq);
588}
589
590static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
591{
592 static struct radeon_hdmi_acr res;
593 u8 i;
594
595 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
596 /* 32kHz 44.1kHz 48kHz */
597 /* Clock N CTS N CTS N CTS */
598 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
599 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
600 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
601 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
602 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
603 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
604 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
605 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
606 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
607 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
608 };
609
610 /* Precalculated values for common clocks */
611 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
612 if (hdmi_predefined_acr[i].clock == clock)
613 return &hdmi_predefined_acr[i];
614
615 /* And odd clocks get manually calculated */
616 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
617 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
618 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
619
620 return &res;
621}
622
623/*
624 * update the N and CTS parameters for a given pixel clock rate
625 */
626static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
627{
628 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
629 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
630 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
631
632 if (!dig || !dig->afmt)
633 return;
634
635 if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
636 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
637}
638
639static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
640{
641 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
642 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
643
644 if (!dig || !dig->afmt)
645 return;
646
647 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
648 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
649}
650
651static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
652{
653 int bpc = 8;
654 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
655 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
656
657 if (!dig || !dig->afmt)
658 return;
659
660 if (encoder->crtc) {
661 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
662 bpc = radeon_crtc->bpc;
663 }
664
665 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
666 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
667}
668
669static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
670{
671 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
672 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
673
674 if (!dig || !dig->afmt)
675 return;
676
677 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
678 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
679}
680
681static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
682{
683 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
684 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
685
686 if (!dig || !dig->afmt)
687 return;
688
689 if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
690 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
691}
692
693/*
694 * update the info frames with the data from the current display mode
695 */
696static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
697 struct drm_display_mode *mode)
698{
699 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
700 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
701 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
702
703 if (!dig || !dig->afmt)
704 return;
705
706 if (!connector)
707 return;
708
709 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
710 radeon_audio_set_mute(encoder, true);
711
712 radeon_audio_write_speaker_allocation(encoder);
713 radeon_audio_write_sad_regs(encoder);
714 radeon_audio_write_latency_fields(encoder, mode);
715 radeon_audio_set_dto(encoder, mode->clock);
716 radeon_audio_set_vbi_packet(encoder);
717 radeon_hdmi_set_color_depth(encoder);
718 radeon_audio_update_acr(encoder, mode->clock);
719 radeon_audio_set_audio_packet(encoder);
720 radeon_audio_select_pin(encoder);
721
722 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
723 return;
724
725 radeon_audio_set_mute(encoder, false);
726 } else {
727 radeon_hdmi_set_color_depth(encoder);
728
729 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
730 return;
731 }
732}
733
734static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
735 struct drm_display_mode *mode)
736{
737 struct drm_device *dev = encoder->dev;
738 struct radeon_device *rdev = dev->dev_private;
739 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
740 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
741 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
742
743 if (!dig || !dig->afmt)
744 return;
745
746 if (!connector)
747 return;
748
749 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
750 radeon_audio_write_speaker_allocation(encoder);
751 radeon_audio_write_sad_regs(encoder);
752 radeon_audio_write_latency_fields(encoder, mode);
753 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);
754 radeon_audio_set_audio_packet(encoder);
755 radeon_audio_select_pin(encoder);
756
757 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
758 return;
759 }
760}
761
762void radeon_audio_mode_set(struct drm_encoder *encoder,
763 struct drm_display_mode *mode)
764{
765 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
766
767 if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
768 radeon_encoder->audio->mode_set(encoder, mode);
769}
770
771void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
772{
773 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
774
775 if (radeon_encoder->audio && radeon_encoder->audio->dpms)
776 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
777}
778
779unsigned int radeon_audio_decode_dfs_div(unsigned int div)
780{
781 if (div >= 8 && div < 64)
782 return (div - 8) * 25 + 200;
783 else if (div >= 64 && div < 96)
784 return (div - 64) * 50 + 1600;
785 else if (div >= 96 && div < 128)
786 return (div - 96) * 100 + 3200;
787 else
788 return 0;
789}