1/*
  2 * Copyright 2012 Red Hat Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Ben Skeggs <bskeggs@redhat.com>
 23 */
 24
 25#include <nvif/os.h>
 26#include <nvif/class.h>
 27#include <nvif/cl0002.h>
 28
 29#include "nouveau_drm.h"
 30#include "nouveau_dma.h"
 31#include "nv10_fence.h"
 32
 33int
 34nv17_fence_sync(struct nouveau_fence *fence,
 35		struct nouveau_channel *prev, struct nouveau_channel *chan)
 36{
 37	struct nouveau_cli *cli = (void *)prev->user.client;
 38	struct nv10_fence_priv *priv = chan->drm->fence;
 39	struct nv10_fence_chan *fctx = chan->fence;
 40	u32 value;
 41	int ret;
 42
 43	if (!mutex_trylock(&cli->mutex))
 44		return -EBUSY;
 45
 46	spin_lock(&priv->lock);
 47	value = priv->sequence;
 48	priv->sequence += 2;
 49	spin_unlock(&priv->lock);
 50
 51	ret = RING_SPACE(prev, 5);
 52	if (!ret) {
 53		BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
 54		OUT_RING  (prev, fctx->sema.handle);
 55		OUT_RING  (prev, 0);
 56		OUT_RING  (prev, value + 0);
 57		OUT_RING  (prev, value + 1);
 58		FIRE_RING (prev);
 59	}
 60
 61	if (!ret && !(ret = RING_SPACE(chan, 5))) {
 62		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
 63		OUT_RING  (chan, fctx->sema.handle);
 64		OUT_RING  (chan, 0);
 65		OUT_RING  (chan, value + 1);
 66		OUT_RING  (chan, value + 2);
 67		FIRE_RING (chan);
 68	}
 69
 70	mutex_unlock(&cli->mutex);
 71	return 0;
 72}
 73
 74static int
 75nv17_fence_context_new(struct nouveau_channel *chan)
 76{
 77	struct nv10_fence_priv *priv = chan->drm->fence;
 78	struct nv10_fence_chan *fctx;
 79	struct ttm_mem_reg *mem = &priv->bo->bo.mem;
 80	u32 start = mem->start * PAGE_SIZE;
 81	u32 limit = start + mem->size - 1;
 82	int ret = 0;
 83
 84	fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
 85	if (!fctx)
 86		return -ENOMEM;
 87
 88	nouveau_fence_context_new(chan, &fctx->base);
 89	fctx->base.emit = nv10_fence_emit;
 90	fctx->base.read = nv10_fence_read;
 91	fctx->base.sync = nv17_fence_sync;
 92
 93	ret = nvif_object_init(&chan->user, NvSema, NV_DMA_FROM_MEMORY,
 94			       &(struct nv_dma_v0) {
 95					.target = NV_DMA_V0_TARGET_VRAM,
 96					.access = NV_DMA_V0_ACCESS_RDWR,
 97					.start = start,
 98					.limit = limit,
 99			       }, sizeof(struct nv_dma_v0),
100			       &fctx->sema);
101	if (ret)
102		nv10_fence_context_del(chan);
103	return ret;
104}
105
106void
107nv17_fence_resume(struct nouveau_drm *drm)
108{
109	struct nv10_fence_priv *priv = drm->fence;
110
111	nouveau_bo_wr32(priv->bo, 0, priv->sequence);
112}
113
114int
115nv17_fence_create(struct nouveau_drm *drm)
116{
117	struct nv10_fence_priv *priv;
118	int ret = 0;
119
120	priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
121	if (!priv)
122		return -ENOMEM;
123
124	priv->base.dtor = nv10_fence_destroy;
125	priv->base.resume = nv17_fence_resume;
126	priv->base.context_new = nv17_fence_context_new;
127	priv->base.context_del = nv10_fence_context_del;
128	priv->base.contexts = 31;
129	priv->base.context_base = fence_context_alloc(priv->base.contexts);
130	spin_lock_init(&priv->lock);
131
132	ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
133			     0, 0x0000, NULL, NULL, &priv->bo);
134	if (!ret) {
135		ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false);
136		if (!ret) {
137			ret = nouveau_bo_map(priv->bo);
138			if (ret)
139				nouveau_bo_unpin(priv->bo);
140		}
141		if (ret)
142			nouveau_bo_ref(NULL, &priv->bo);
143	}
144
145	if (ret) {
146		nv10_fence_destroy(drm);
147		return ret;
148	}
149
150	nouveau_bo_wr32(priv->bo, 0x000, 0x00000000);
151	return ret;
152}